diff options
Diffstat (limited to 'test/CodeGen/ARM/Windows')
33 files changed, 0 insertions, 1215 deletions
diff --git a/test/CodeGen/ARM/Windows/aapcs.ll b/test/CodeGen/ARM/Windows/aapcs.ll deleted file mode 100644 index 3f9a09f8e7f5..000000000000 --- a/test/CodeGen/ARM/Windows/aapcs.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -o - %s | FileCheck %s - -; AAPCS mandates an 8-byte stack alignment. The alloca is implicitly aligned, -; and no bic is required. - -declare void @callee(i8 *%i) - -define void @caller() { - %i = alloca i8, align 8 - call void @callee(i8* %i) - ret void -} - -; CHECK: sub sp, #8 -; CHECK-NOT: bic - diff --git a/test/CodeGen/ARM/Windows/alloca.ll b/test/CodeGen/ARM/Windows/alloca.ll deleted file mode 100644 index 0f20ffbd36db..000000000000 --- a/test/CodeGen/ARM/Windows/alloca.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: llc -O0 -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s - -declare arm_aapcs_vfpcc i32 @num_entries() - -define arm_aapcs_vfpcc void @test___builtin_alloca() { -entry: - %array = alloca i8*, align 4 - %call = call arm_aapcs_vfpcc i32 @num_entries() - %mul = mul i32 4, %call - %0 = alloca i8, i32 %mul - store i8* %0, i8** %array, align 4 - ret void -} - -; CHECK: bl num_entries -; Any register is actually valid here, but turns out we use lr, -; because we do not have the kill flag on R0. -; CHECK: mov.w [[R1:lr]], #7 -; CHECK: add.w [[R0:r[0-9]+]], [[R1]], [[R0]], lsl #2 -; CHECK: bic [[R0]], [[R0]], #7 -; CHECK: lsrs r4, [[R0]], #2 -; CHECK: bl __chkstk -; CHECK: sub.w sp, sp, r4 - diff --git a/test/CodeGen/ARM/Windows/builtin_longjmp.ll b/test/CodeGen/ARM/Windows/builtin_longjmp.ll deleted file mode 100644 index 52b6f301bb77..000000000000 --- a/test/CodeGen/ARM/Windows/builtin_longjmp.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s - -declare void @llvm.eh.sjlj.longjmp(i8*) - -define arm_aapcs_vfpcc void @test___builtin_longjump(i8* %b) { -entry: - tail call void @llvm.eh.sjlj.longjmp(i8* %b) - unreachable -} - -; CHECK: push.w {r11, lr} -; CHECK: ldr.w r11, [r0] -; CHECK: ldr.w sp, [r0, #8] -; CHECK: ldr.w pc, [r0, #4] - diff --git a/test/CodeGen/ARM/Windows/chkstk-movw-movt-isel.ll b/test/CodeGen/ARM/Windows/chkstk-movw-movt-isel.ll deleted file mode 100644 index a73a7cf8414f..000000000000 --- a/test/CodeGen/ARM/Windows/chkstk-movw-movt-isel.ll +++ /dev/null @@ -1,27 +0,0 @@ -; RUN: llc -mtriple thumbv7--windows-itanium -code-model large -verify-machineinstrs -filetype obj -o - %s \ -; RUN: | llvm-objdump -no-show-raw-insn -d - | FileCheck %s - -; ModuleID = 'reduced.c' -target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64" -target triple = "thumbv7--windows-itanium" - -define arm_aapcs_vfpcc i8 @isel(i32 %i) { -entry: - %i.addr = alloca i32, align 4 - %buffer = alloca [4096 x i8], align 1 - store i32 %i, i32* %i.addr, align 4 - %0 = load i32, i32* %i.addr, align 4 - %rem = urem i32 %0, 4096 - %arrayidx = getelementptr inbounds [4096 x i8], [4096 x i8]* %buffer, i32 0, i32 %rem - %1 = load volatile i8, i8* %arrayidx, align 1 - ret i8 %1 -} - -; CHECK-LABEL: isel -; CHECK: push {r4, r5} -; CHECK: movw r12, #0 -; CHECK: movt r12, #0 -; CHECK: movw r4, #{{\d*}} -; CHECK: blx r12 -; CHECK: sub.w sp, sp, r4 - diff --git a/test/CodeGen/ARM/Windows/chkstk.ll b/test/CodeGen/ARM/Windows/chkstk.ll deleted file mode 100644 index 330c1f458500..000000000000 --- a/test/CodeGen/ARM/Windows/chkstk.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows -mcpu=cortex-a9 -verify-machineinstrs %s -o - \ -; RUN: | FileCheck -check-prefix CHECK-DEFAULT-CODE-MODEL %s - -; RUN: llc -mtriple=thumbv7-windows -mcpu=cortex-a9 -code-model=large -verify-machineinstrs %s -o - \ -; RUN: | FileCheck -check-prefix CHECK-LARGE-CODE-MODEL %s - -define arm_aapcs_vfpcc void @check_watermark() { -entry: - %buffer = alloca [4096 x i8], align 1 - ret void -} - -; CHECK-DEFAULT-CODE-MODEL: check_watermark: -; CHECK-DEFAULT-CODE-MODEL: movw r4, #1024 -; CHECK-DEFAULT-CODE-MODEL: bl __chkstk -; CHECK-DEFAULT-CODE-MODEL: sub.w sp, sp, r4 - -; CHECK-LARGE-CODE-MODEL: check_watermark: -; CHECK-LARGE-CODE-MODEL: movw r12, :lower16:__chkstk -; CHECK-LARGE-CODE-MODEL: movt r12, :upper16:__chkstk -; CHECK-LARGE-CODE-MODEL: movw r4, #1024 -; CHECK-LARGE-CODE-MODEL: blx r12 -; CHECK-LARGE-CODE-MODEL: sub.w sp, sp, r4 - diff --git a/test/CodeGen/ARM/Windows/dbzchk.ll b/test/CodeGen/ARM/Windows/dbzchk.ll deleted file mode 100644 index aea37992de4e..000000000000 --- a/test/CodeGen/ARM/Windows/dbzchk.ll +++ /dev/null @@ -1,185 +0,0 @@ -; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-DIV - -; int f(int n, int d) { -; if (n / d) -; return 1; -; return 0; -; } - -define arm_aapcs_vfpcc i32 @f(i32 %n, i32 %d) { -entry: - %retval = alloca i32, align 4 - %n.addr = alloca i32, align 4 - %d.addr = alloca i32, align 4 - store i32 %n, i32* %n.addr, align 4 - store i32 %d, i32* %d.addr, align 4 - %0 = load i32, i32* %n.addr, align 4 - %1 = load i32, i32* %d.addr, align 4 - %div = sdiv i32 %0, %1 - %tobool = icmp ne i32 %div, 0 - br i1 %tobool, label %if.then, label %if.end - -if.then: - store i32 1, i32* %retval, align 4 - br label %return - -if.end: - store i32 0, i32* %retval, align 4 - br label %return - -return: - %2 = load i32, i32* %retval, align 4 - ret i32 %2 -} - -; CHECK-DIV-DAG: BB#0 -; CHECK-DIV-DAG: Successors according to CFG: BB#1({{.*}}) BB#2 -; CHECK-DIV-DAG: BB#1 -; CHECK-DIV-DAG: Successors according to CFG: BB#3 -; CHECK-DIV-DAG: BB#2 -; CHECK-DIV-DAG: Successors according to CFG: BB#3 -; CHECK-DIV-DAG: BB#3 - -; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-MOD - -; int r; -; int g(int l, int m) { -; if (m <= 0) -; return 0; -; return (r = l % m); -; } - -@r = common global i32 0, align 4 - -define arm_aapcs_vfpcc i32 @g(i32 %l, i32 %m) { -entry: - %cmp = icmp eq i32 %m, 0 - br i1 %cmp, label %return, label %if.end - -if.end: - %rem = urem i32 %l, %m - store i32 %rem, i32* @r, align 4 - br label %return - -return: - %retval.0 = phi i32 [ %rem, %if.end ], [ 0, %entry ] - ret i32 %retval.0 -} - -; CHECK-MOD-DAG: BB#0 -; CHECK-MOD-DAG: Successors according to CFG: BB#2({{.*}}) BB#1 -; CHECK-MOD-DAG: BB#1 -; CHECK-MOD-DAG: Successors according to CFG: BB#3 -; CHECK-MOD-DAG: BB#3 -; CHECK-MOD-DAG: Successors according to CFG: BB#2 -; CHECK-MOD-DAG: BB#2 - -; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -filetype asm -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-CFG -; RUN: llc -mtriple thumbv7--windows-itanium -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-CFG-ASM - -; unsigned c; -; extern unsigned long g(void); -; int f(unsigned u, signed char b) { -; if (b) -; c = g() % u; -; return c; -; } - -@c = common global i32 0, align 4 - -declare arm_aapcs_vfpcc i32 @i() - -define arm_aapcs_vfpcc i32 @h(i32 %u, i8 signext %b) #0 { -entry: - %tobool = icmp eq i8 %b, 0 - br i1 %tobool, label %entry.if.end_crit_edge, label %if.then - -entry.if.end_crit_edge: - %.pre = load i32, i32* @c, align 4 - br label %if.end - -if.then: - %call = tail call arm_aapcs_vfpcc i32 @i() - %rem = urem i32 %call, %u - store i32 %rem, i32* @c, align 4 - br label %if.end - -if.end: - %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %rem, %if.then ] - ret i32 %0 -} - -attributes #0 = { optsize } - -; CHECK-CFG-DAG: BB#0 -; CHECK-CFG-DAG: t2Bcc <BB#2> -; CHECK-CFG-DAG: t2B <BB#1> - -; CHECK-CFG-DAG: BB#1 -; CHECK-CFG-DAG: t2B <BB#3> - -; CHECK-CFG-DAG: BB#2 -; CHECK-CFG-DAG: tCMPi8 %vreg{{[0-9]}}, 0 -; CHECK-CFG-DAG: t2Bcc <BB#5> - -; CHECK-CFG-DAG: BB#4 - -; CHECK-CFG-DAG: BB#3 -; CHECK-CFG-DAG: tBX_RET - -; CHECK-CFG-DAG: BB#5 -; CHECK-CFG-DAG: t__brkdiv0 - -; CHECK-CFG-ASM-LABEL: h: -; CHECK-CFG-ASM: cbz r{{[0-9]}}, .LBB2_4 -; CHECK-CFG-ASM: bl __rt_udiv -; CHECK-CFG-ASM-LABEL: .LBB2_4: -; CHECK-CFG-ASM: __brkdiv0 - -; RUN: llc -O1 -mtriple thumbv7--windows-itanium -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-WIN__DBZCHK - -; long k(void); -; int l(void); -; int j(int i) { -; if (l() == -1) -; return 0; -; return k() % i; -; } - -declare arm_aapcs_vfpcc i32 @k() -declare arm_aapcs_vfpcc i32 @l() - -define arm_aapcs_vfpcc i32 @j(i32 %i) { -entry: - %retval = alloca i32, align 4 - %i.addr = alloca i32, align 4 - store i32 %i, i32* %i.addr, align 4 - %call = call arm_aapcs_vfpcc i32 @l() - %cmp = icmp eq i32 %call, -1 - br i1 %cmp, label %if.then, label %if.end - -if.then: - store i32 0, i32* %retval, align 4 - br label %return - -if.end: - %call1 = call arm_aapcs_vfpcc i32 @k() - %0 = load i32, i32* %i.addr, align 4 - %rem = srem i32 %call1, %0 - store i32 %rem, i32* %retval, align 4 - br label %return - -return: - %1 = load i32, i32* %retval, align 4 - ret i32 %1 -} - -; CHECK-WIN__DBZCHK-LABEL: j: -; CHECK-WIN__DBZCHK: cbz r{{[0-7]}}, .LBB -; CHECK-WIN__DBZCHK-NOT: cbz r8, .LBB -; CHECK-WIN__DBZCHK-NOT: cbz r9, .LBB -; CHECK-WIN__DBZCHK-NOT: cbz r10, .LBB -; CHECK-WIN__DBZCHK-NOT: cbz r11, .LBB -; CHECK-WIN__DBZCHK-NOT: cbz ip, .LBB -; CHECK-WIN__DBZCHK-NOT: cbz lr, .LBB - diff --git a/test/CodeGen/ARM/Windows/division-range.ll b/test/CodeGen/ARM/Windows/division-range.ll deleted file mode 100644 index b14339e30ad3..000000000000 --- a/test/CodeGen/ARM/Windows/division-range.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc -O0 -mtriple thumbv7--windows-itanium -filetype obj -o - %s | llvm-objdump -disassemble - | FileCheck %s - -declare i32 @llvm.arm.space(i32, i32) - -define arm_aapcs_vfpcc i32 @f(i32 %n, i32 %d) local_unnamed_addr { -entry: - %div = sdiv i32 %n, %d - call i32 @llvm.arm.space(i32 128, i32 undef) - ret i32 %div -} - -; CHECK: cmp r1, #0 -; CHECK: beq # -; CHECK: bl - diff --git a/test/CodeGen/ARM/Windows/division.ll b/test/CodeGen/ARM/Windows/division.ll deleted file mode 100644 index 10f86b08e634..000000000000 --- a/test/CodeGen/ARM/Windows/division.ll +++ /dev/null @@ -1,49 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s -; RUN: llc -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s - -define arm_aapcs_vfpcc i32 @sdiv32(i32 %divisor, i32 %divident) { -entry: - %div = sdiv i32 %divident, %divisor - ret i32 %div -} - -; CHECK-LABEL: sdiv32: -; CHECK: cbz r0 -; CHECK: bl __rt_sdiv -; CHECK: __brkdiv0 - -define arm_aapcs_vfpcc i32 @udiv32(i32 %divisor, i32 %divident) { -entry: - %div = udiv i32 %divident, %divisor - ret i32 %div -} - -; CHECK-LABEL: udiv32: -; CHECK: cbz r0 -; CHECK: bl __rt_udiv -; CHECK: __brkdiv0 - -define arm_aapcs_vfpcc i64 @sdiv64(i64 %divisor, i64 %divident) { -entry: - %div = sdiv i64 %divident, %divisor - ret i64 %div -} - -; CHECK-LABEL: sdiv64: -; CHECK: orrs.w r4, r0, r1 -; CHECK-NEXT: beq -; CHECK: bl __rt_sdiv64 -; CHECK: __brkdiv0 - -define arm_aapcs_vfpcc i64 @udiv64(i64 %divisor, i64 %divident) { -entry: - %div = udiv i64 %divident, %divisor - ret i64 %div -} - -; CHECK-LABEL: udiv64: -; CHECK: orrs.w r4, r0, r1 -; CHECK-NEXT: beq -; CHECK: bl __rt_udiv64 -; CHECK: __brkdiv0 - diff --git a/test/CodeGen/ARM/Windows/dllexport.ll b/test/CodeGen/ARM/Windows/dllexport.ll deleted file mode 100644 index 27496208862e..000000000000 --- a/test/CodeGen/ARM/Windows/dllexport.ll +++ /dev/null @@ -1,75 +0,0 @@ -; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-GNU -; RUN: llc -mtriple thumbv7--windows-gnu -filetype asm -o - %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-GNU -; RUN: llc -mtriple thumbv7--windows-msvc -filetype asm -o - %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-MSVC - -define void @f() { - ret void -} - -define dllexport void @g() { - ret void -} - -define dllexport void @h() unnamed_addr { - ret void -} - -declare dllexport void @i() - -define linkonce_odr dllexport void @j() { - ret void -} - -define linkonce_odr dllexport void @k() alwaysinline { - ret void -} - -define weak_odr dllexport void @l() { - ret void -} - -@m = dllexport global i32 0, align 4 -@n = dllexport unnamed_addr constant i32 0 -@o = common dllexport global i32 0, align 4 -@p = weak_odr dllexport global i32 0, align 4 -@q = weak_odr dllexport unnamed_addr constant i32 0 - -@r = dllexport alias void (), void () * @f -@s = dllexport alias void (), void () * @g -@t = dllexport alias void (), void () * @f -@u = weak_odr dllexport alias void (), void () * @g - -; CHECK: .section .drectve -; CHECK-GNU-NOT: -export:f -; CHECK-GNU: -export:g -; CHECK-GNU-SAME: -export:h -; CHECK-GNU-NOT: -export:i -; CHECK-GNU-SAME: -export:j -; CHECK-GNU-SAME: -export:k -; CHECK-GNU-SAME: -export:l -; CHECK-GNU-SAME: -export:m,data -; CHECK-GNU-SAME: -export:n,data -; CHECK-GNU-SAME: -export:o,data -; CHECK-GNU-SAME: -export:p,data -; CHECK-GNU-SAME: -export:q,data -; CHECK-GNU-SAME: -export:r -; CHECK-GNU-SAME: -export:s -; CHECK-GNU-SAME: -export:t -; CHECK-GNU-SAME: -export:u -; CHECK-MSVC-NOT: /EXPORT:f -; CHECK-MSVC: /EXPORT:g -; CHECK-MSVC-SAME: /EXPORT:h -; CHECK-MSVC-NOT: /EXPORT:i -; CHECK-MSVC-SAME: /EXPORT:j -; CHECK-MSVC-SAME: /EXPORT:k -; CHECK-MSVC-SAME: /EXPORT:l -; CHECK-MSVC-SAME: /EXPORT:m,DATA -; CHECK-MSVC-SAME: /EXPORT:n,DATA -; CHECK-MSVC-SAME: /EXPORT:o,DATA -; CHECK-MSVC-SAME: /EXPORT:p,DATA -; CHECK-MSVC-SAME: /EXPORT:q,DATA -; CHECK-MSVC-SAME: /EXPORT:r -; CHECK-MSVC-SAME: /EXPORT:s -; CHECK-MSVC-SAME: /EXPORT:t -; CHECK-MSVC-SAME: /EXPORT:u - diff --git a/test/CodeGen/ARM/Windows/dllimport.ll b/test/CodeGen/ARM/Windows/dllimport.ll deleted file mode 100644 index 6786be3322e3..000000000000 --- a/test/CodeGen/ARM/Windows/dllimport.ll +++ /dev/null @@ -1,61 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows -filetype asm -o - %s | FileCheck %s - -; ModuleID = 'dllimport.c' - -@var = external dllimport global i32 -@ext = external global i32 -declare dllimport arm_aapcs_vfpcc i32 @external() -declare arm_aapcs_vfpcc i32 @internal() - -define arm_aapcs_vfpcc i32 @get_var() { - %1 = load i32, i32* @var, align 4 - ret i32 %1 -} - -; CHECK-LABEL: get_var -; CHECK: movw r0, :lower16:__imp_var -; CHECK: movt r0, :upper16:__imp_var -; CHECK: ldr r0, [r0] -; CHECK: ldr r0, [r0] -; CHECK: bx lr - -define arm_aapcs_vfpcc i32 @get_ext() { - %1 = load i32, i32* @ext, align 4 - ret i32 %1 -} - -; CHECK-LABEL: get_ext -; CHECK: movw r0, :lower16:ext -; CHECK: movt r0, :upper16:ext -; CHECK: ldr r0, [r0] -; CHECK: bx lr - -define arm_aapcs_vfpcc i32* @get_var_pointer() { - ret i32* @var -} - -; CHECK-LABEL: get_var_pointer -; CHECK: movw r0, :lower16:__imp_var -; CHECK: movt r0, :upper16:__imp_var -; CHECK: ldr r0, [r0] -; CHECK: bx lr - -define arm_aapcs_vfpcc i32 @call_external() { - %call = tail call arm_aapcs_vfpcc i32 @external() - ret i32 %call -} - -; CHECK-LABEL: call_external -; CHECK: movw r0, :lower16:__imp_external -; CHECK: movt r0, :upper16:__imp_external -; CHECK: ldr r0, [r0] -; CHECK: bx r0 - -define arm_aapcs_vfpcc i32 @call_internal() { - %call = tail call arm_aapcs_vfpcc i32 @internal() - ret i32 %call -} - -; CHECK-LABEL: call_internal -; CHECK: b internal - diff --git a/test/CodeGen/ARM/Windows/frame-register.ll b/test/CodeGen/ARM/Windows/frame-register.ll deleted file mode 100644 index 7ecfc1a71714..000000000000 --- a/test/CodeGen/ARM/Windows/frame-register.ll +++ /dev/null @@ -1,22 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows -disable-fp-elim -filetype asm -o - %s \ -; RUN: | FileCheck %s - -declare void @callee(i32) - -define i32 @calleer(i32 %i) { -entry: - %i.addr = alloca i32, align 4 - %j = alloca i32, align 4 - store i32 %i, i32* %i.addr, align 4 - %0 = load i32, i32* %i.addr, align 4 - %add = add nsw i32 %0, 1 - store i32 %add, i32* %j, align 4 - %1 = load i32, i32* %j, align 4 - call void @callee(i32 %1) - %2 = load i32, i32* %j, align 4 - %add1 = add nsw i32 %2, 1 - ret i32 %add1 -} - -; CHECK: push.w {r11, lr} - diff --git a/test/CodeGen/ARM/Windows/global-minsize.ll b/test/CodeGen/ARM/Windows/global-minsize.ll deleted file mode 100644 index c0be36caa6c4..000000000000 --- a/test/CodeGen/ARM/Windows/global-minsize.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows -filetype asm -o - %s | FileCheck %s - -@i = internal global i32 0, align 4 - -; Function Attrs: minsize -define arm_aapcs_vfpcc i32* @function() #0 { -entry: - ret i32* @i -} - -attributes #0 = { minsize } - -; CHECK: function: -; CHECK: movw r0, :lower16:i -; CHECK: movt r0, :upper16:i -; CHECK: bx lr diff --git a/test/CodeGen/ARM/Windows/hard-float.ll b/test/CodeGen/ARM/Windows/hard-float.ll deleted file mode 100644 index 1ce02813dfc2..000000000000 --- a/test/CodeGen/ARM/Windows/hard-float.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-WIN - -; RUN: llc -mtriple=thumbv7-windows-gnu -mcpu=cortex-a9 -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-GNU - -define float @function(float %f, float %g) nounwind { -entry: - %h = fadd float %f, %g - ret float %h -} - -; CHECK-WIN: vadd.f32 s0, s0, s1 - -; CHECK-GNU: vadd.f32 s0, s0, s1 - diff --git a/test/CodeGen/ARM/Windows/if-cvt-bundle.ll b/test/CodeGen/ARM/Windows/if-cvt-bundle.ll deleted file mode 100644 index 5521ed72ee28..000000000000 --- a/test/CodeGen/ARM/Windows/if-cvt-bundle.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s - -declare void @llvm.trap() -declare arm_aapcs_vfpcc zeroext i1 @g() - -define arm_aapcs_vfpcc i8* @f() { -entry: - %call = tail call arm_aapcs_vfpcc zeroext i1 @g() - br i1 %call, label %if.then, label %if.end - -if.then: - ret i8* bitcast (i1 ()* @g to i8*) - -if.end: - tail call void @llvm.trap() - unreachable -} - -; CHECK: push.w {r11, lr} -; CHECK: bl g -; CHECK: movw [[REG:r[0-9]+]], :lower16:g -; CHECK: movt [[REG]], :upper16:g -; CHECK: pop.w {r11, pc} - diff --git a/test/CodeGen/ARM/Windows/libcalls.ll b/test/CodeGen/ARM/Windows/libcalls.ll deleted file mode 100644 index d8b498a40d97..000000000000 --- a/test/CodeGen/ARM/Windows/libcalls.ll +++ /dev/null @@ -1,75 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s -; RUN: llc -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s - -define arm_aapcs_vfpcc i64 @stoi64(float %f) { -entry: - %conv = fptosi float %f to i64 - ret i64 %conv -} - -; CHECK-LABEL: stoi64 -; CHECK: bl __stoi64 - -define arm_aapcs_vfpcc i64 @stou64(float %f) { -entry: - %conv = fptoui float %f to i64 - ret i64 %conv -} - -; CHECK-LABEL: stou64 -; CHECK: bl __stou64 - -define arm_aapcs_vfpcc float @i64tos(i64 %i64) { -entry: - %conv = sitofp i64 %i64 to float - ret float %conv -} - -; CHECK-LABEL: i64tos -; CHECK: bl __i64tos - -define arm_aapcs_vfpcc float @u64tos(i64 %u64) { -entry: - %conv = uitofp i64 %u64 to float - ret float %conv -} - -; CHECK-LABEL: u64tos -; CHECK: bl __u64tos - -define arm_aapcs_vfpcc i64 @dtoi64(double %d) { -entry: - %conv = fptosi double %d to i64 - ret i64 %conv -} - -; CHECK-LABEL: dtoi64 -; CHECK: bl __dtoi64 - -define arm_aapcs_vfpcc i64 @dtou64(double %d) { -entry: - %conv = fptoui double %d to i64 - ret i64 %conv -} - -; CHECK-LABEL: dtou64 -; CHECK: bl __dtou64 - -define arm_aapcs_vfpcc double @i64tod(i64 %i64) { -entry: - %conv = sitofp i64 %i64 to double - ret double %conv -} - -; CHECK-LABEL: i64tod -; CHECK: bl __i64tod - -define arm_aapcs_vfpcc double @u64tod(i64 %i64) { -entry: - %conv = uitofp i64 %i64 to double - ret double %conv -} - -; CHECK-LABEL: u64tod -; CHECK: bl __u64tod - diff --git a/test/CodeGen/ARM/Windows/long-calls.ll b/test/CodeGen/ARM/Windows/long-calls.ll deleted file mode 100644 index f56701df76c5..000000000000 --- a/test/CodeGen/ARM/Windows/long-calls.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows -mcpu=cortex-a9 -relocation-model pic -mattr=+long-calls -o - %s \ -; RUN: | FileCheck %s - -declare arm_aapcs_vfpcc void @callee() - -define arm_aapcs_vfpcc void @caller() nounwind { -entry: - tail call void @callee() - ret void -} - -; CHECK-LABEL: caller -; CHECK: ldr [[REG:r[0-9]+]], [[CPI:\.LCPI[_0-9]+]] -; CHECK: bx [[REG]] -; CHECK: .p2align 2 -; CHECK: [[CPI]]: -; CHECK: .long callee - diff --git a/test/CodeGen/ARM/Windows/mangling.ll b/test/CodeGen/ARM/Windows/mangling.ll deleted file mode 100644 index ce1fe2ee7e16..000000000000 --- a/test/CodeGen/ARM/Windows/mangling.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows -mcpu=cortex-a9 -o - %s | FileCheck %s - -define void @function() nounwind { -entry: - ret void -} - -; CHECK-LABEL: function - diff --git a/test/CodeGen/ARM/Windows/memset.ll b/test/CodeGen/ARM/Windows/memset.ll deleted file mode 100644 index 500e25e259c6..000000000000 --- a/test/CodeGen/ARM/Windows/memset.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s - -@source = common global [512 x i8] zeroinitializer, align 4 - -declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind - -define void @function() { -entry: - call void @llvm.memset.p0i8.i32(i8* bitcast ([512 x i8]* @source to i8*), i8 0, i32 512, i32 0, i1 false) - unreachable -} - -; CHECK: movw r0, :lower16:source -; CHECK: movt r0, :upper16:source -; CHECK: movs r1, #0 -; CHECK: mov.w r2, #512 -; CHECK: memset - diff --git a/test/CodeGen/ARM/Windows/mov32t-bundling.ll b/test/CodeGen/ARM/Windows/mov32t-bundling.ll deleted file mode 100644 index 5f838378fa87..000000000000 --- a/test/CodeGen/ARM/Windows/mov32t-bundling.ll +++ /dev/null @@ -1,28 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s - -@_begin = external global i8 -@_end = external global i8 - -declare arm_aapcs_vfpcc void @force_emission() - -define arm_aapcs_vfpcc void @bundle() { -entry: - br i1 icmp uge (i32 sub (i32 ptrtoint (i8* @_end to i32), i32 ptrtoint (i8* @_begin to i32)), i32 4), label %if.then, label %if.end - -if.then: - tail call arm_aapcs_vfpcc void @force_emission() - br label %if.end - -if.end: - ret void -} - -; CHECK-LABEL: bundle -; CHECK-NOT: subs r0, r1, r0 -; CHECK: movw r0, :lower16:_begin -; CHECK-NEXT: movt r0, :upper16:_begin -; CHECK-NEXT: movw r1, :lower16:_end -; CHECK-NEXT: movt r1, :upper16:_end -; CHECK-NEXT: subs r0, r1, r0 -; CHECK-NEXT: cmp r0, #4 - diff --git a/test/CodeGen/ARM/Windows/movw-movt-relocations.ll b/test/CodeGen/ARM/Windows/movw-movt-relocations.ll deleted file mode 100644 index c21aee087cf4..000000000000 --- a/test/CodeGen/ARM/Windows/movw-movt-relocations.ll +++ /dev/null @@ -1,27 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-WINDOWS - -; RUN: llc -mtriple=thumbv7-eabi -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-EABI - -@i = common global i32 0, align 4 -@j = common global i32 0, align 4 - -; Function Attrs: nounwind optsize readonly -define i32 @relocation(i32 %j, i32 %k) { -entry: - %0 = load i32, i32* @i, align 4 - %1 = load i32, i32* @j, align 4 - %add = add nsw i32 %1, %0 - ret i32 %add -} - -; CHECK-WINDOWS: movw r[[i:[0-4]]], :lower16:i -; CHECK-WINDOWS-NEXT: movt r[[i]], :upper16:i -; CHECK-WINDOWS: movw r[[j:[0-4]]], :lower16:j -; CHECK-WINDOWS-NEXT: movt r[[j]], :upper16:j - -; CHECK-EABI: movw r[[i:[0-4]]], :lower16:i -; CHECK-EABI: movw r[[j:[0-4]]], :lower16:j -; CHECK-EABI-NEXT: movt r[[i]], :upper16:i -; CHECK-EABI-NEXT: movt r[[j]], :upper16:j diff --git a/test/CodeGen/ARM/Windows/no-aeabi.ll b/test/CodeGen/ARM/Windows/no-aeabi.ll deleted file mode 100644 index a4103b0a676e..000000000000 --- a/test/CodeGen/ARM/Windows/no-aeabi.ll +++ /dev/null @@ -1,32 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -verify-machineinstrs -o - %s | FileCheck %s - -declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind -declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind - -@source = common global [512 x i8] zeroinitializer, align 4 -@target = common global [512 x i8] zeroinitializer, align 4 - -define void @move() nounwind { -entry: - call void @llvm.memmove.p0i8.p0i8.i32(i8* bitcast ([512 x i8]* @target to i8*), i8* bitcast ([512 x i8]* @source to i8*), i32 512, i32 0, i1 false) - unreachable -} - -; CHECK-NOT: __aeabi_memmove - -define void @copy() nounwind { -entry: - call void @llvm.memcpy.p0i8.p0i8.i32(i8* bitcast ([512 x i8]* @target to i8*), i8* bitcast ([512 x i8]* @source to i8*), i32 512, i32 0, i1 false) - unreachable -} - -; CHECK-NOT: __aeabi_memcpy - -define i32 @divide(i32 %i, i32 %j) nounwind { -entry: - %quotient = sdiv i32 %i, %j - ret i32 %quotient -} - -; CHECK-NOT: __aeabi_idiv - diff --git a/test/CodeGen/ARM/Windows/no-eabi.ll b/test/CodeGen/ARM/Windows/no-eabi.ll deleted file mode 100644 index 033ca0267ee0..000000000000 --- a/test/CodeGen/ARM/Windows/no-eabi.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: llc -O3 -mtriple thumbv7-windows %s -filetype asm -o - | FileCheck -check-prefix CHECK-NONEABI %s -; RUN: llc -O3 -mtriple armv7--linux-gnueabi %s -filetype asm -o - | FileCheck -check-prefix CHECK-EABI %s - -define arm_aapcs_vfpcc void @function() { - ret void -} - -; CHECK-EABI: .eabi_attribute -; CHECK-NONEABI-NOT: .eabi_attribute - diff --git a/test/CodeGen/ARM/Windows/no-ehabi.ll b/test/CodeGen/ARM/Windows/no-ehabi.ll deleted file mode 100644 index 4119b6da968e..000000000000 --- a/test/CodeGen/ARM/Windows/no-ehabi.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows -mcpu=cortex-a9 -o - %s | FileCheck %s - -declare void @callee(i32 %i) - -define i32 @caller(i32 %i, i32 %j, i32 %k, i32 %l, i32 %m, i32 %n, i32 %o, - i32 %p) { -entry: - %q = add nsw i32 %j, %i - %r = add nsw i32 %q, %k - %s = add nsw i32 %r, %l - call void @callee(i32 %s) - %t = add nsw i32 %n, %m - %u = add nsw i32 %t, %o - %v = add nsw i32 %u, %p - call void @callee(i32 %v) - %w = add nsw i32 %v, %s - ret i32 %w -} - -; CHECK-NOT: .save {{{.*}}} - diff --git a/test/CodeGen/ARM/Windows/no-frame-register.ll b/test/CodeGen/ARM/Windows/no-frame-register.ll deleted file mode 100644 index 80187af7ef22..000000000000 --- a/test/CodeGen/ARM/Windows/no-frame-register.ll +++ /dev/null @@ -1,22 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows -filetype asm -o - %s | FileCheck %s - -declare void @callee(i32) - -define i32 @calleer(i32 %i) { -entry: - %i.addr = alloca i32, align 4 - %j = alloca i32, align 4 - store i32 %i, i32* %i.addr, align 4 - %0 = load i32, i32* %i.addr, align 4 - %add = add nsw i32 %0, 1 - store i32 %add, i32* %j, align 4 - %1 = load i32, i32* %j, align 4 - call void @callee(i32 %1) - %2 = load i32, i32* %j, align 4 - %add1 = add nsw i32 %2, 1 - ret i32 %add1 -} - -; CHECK-NOT: push.w {r7, lr} -; CHECK: push.w {r11, lr} - diff --git a/test/CodeGen/ARM/Windows/pic.ll b/test/CodeGen/ARM/Windows/pic.ll deleted file mode 100644 index df4c400035a3..000000000000 --- a/test/CodeGen/ARM/Windows/pic.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows-itanium -relocation-model pic -filetype asm -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-WIN - -; RUN: llc -mtriple thumbv7-windows-gnu -relocation-model pic -filetype asm -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-GNU - -@external = external global i8 - -define arm_aapcs_vfpcc i8 @return_external() { -entry: - %0 = load i8, i8* @external, align 1 - ret i8 %0 -} - -; CHECK-WIN-LABEL: return_external -; CHECK-WIN: movw r0, :lower16:external -; CHECK-WIN: movt r0, :upper16:external -; CHECK-WIN: ldrb r0, [r0] - -; CHECK-GNU-LABEL: return_external -; CHECK-GNU: movw r0, :lower16:external -; CHECK-GNU: movt r0, :upper16:external -; CHECK-GNU: ldrb r0, [r0] diff --git a/test/CodeGen/ARM/Windows/powi.ll b/test/CodeGen/ARM/Windows/powi.ll deleted file mode 100644 index 4ec4b0abbdf1..000000000000 --- a/test/CodeGen/ARM/Windows/powi.ll +++ /dev/null @@ -1,57 +0,0 @@ -; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s - -declare double @llvm.powi.f64(double, i32) -declare float @llvm.powi.f32(float, i32) - -define arm_aapcs_vfpcc double @d(double %d, i32 %i) { -entry: - %0 = tail call double @llvm.powi.f64(double %d, i32 %i) - ret double %0 -} - -; CHECK-LABEL: d: -; CHECK: vmov s[[REGISTER:[0-9]+]], r0 -; CHECK-NEXT: vcvt.f64.s32 d1, s[[REGISTER]] -; CHECK-NEXT: b pow -; CHECK-NOT: __powisf2 - -define arm_aapcs_vfpcc float @f(float %f, i32 %i) { -entry: - %0 = tail call float @llvm.powi.f32(float %f, i32 %i) - ret float %0 -} - -; CHECK-LABEL: f: -; CHECK: vmov s[[REGISTER:[0-9]+]], r0 -; CHECK-NEXT: vcvt.f32.s32 s1, s[[REGISTER]] -; CHECK-NEXT: b pow -; CHECK-NOT: __powisf2 - -define arm_aapcs_vfpcc float @g(double %d, i32 %i) { -entry: - %0 = tail call double @llvm.powi.f64(double %d, i32 %i) - %conv = fptrunc double %0 to float - ret float %conv -} - -; CHECK-LABEL: g: -; CHECK: vmov s[[REGISTER:[0-9]+]], r0 -; CHECK-NEXT: vcvt.f64.s32 d1, s[[REGISTER]] -; CHECK-NEXT: bl pow -; CHECK-NOT: bl __powidf2 -; CHECK-NEXT: vcvt.f32.f64 s0, d0 - -define arm_aapcs_vfpcc double @h(float %f, i32 %i) { -entry: - %0 = tail call float @llvm.powi.f32(float %f, i32 %i) - %conv = fpext float %0 to double - ret double %conv -} - -; CHECK-LABEL: h: -; CHECK: vmov s[[REGISTER:[0-9]+]], r0 -; CHECK-NEXT: vcvt.f32.s32 s1, s[[REGISTER]] -; CHECK-NEXT: bl powf -; CHECK-NOT: bl __powisf2 -; CHECK-NEXT: vcvt.f64.f32 d0, s0 - diff --git a/test/CodeGen/ARM/Windows/read-only-data.ll b/test/CodeGen/ARM/Windows/read-only-data.ll deleted file mode 100644 index c387d1d5137c..000000000000 --- a/test/CodeGen/ARM/Windows/read-only-data.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows -filetype asm -o - %s | FileCheck %s - -@.str = private unnamed_addr constant [7 x i8] c"string\00", align 1 - -declare arm_aapcs_vfpcc void @callee(i8*) - -define arm_aapcs_vfpcc void @function() { -entry: - call arm_aapcs_vfpcc void @callee(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0)) - ret void -} - -; CHECK: .section .rdata,"dr" -; CHECK-NOT: .section ".rodata.str1.1" - diff --git a/test/CodeGen/ARM/Windows/stack-probe-non-default.ll b/test/CodeGen/ARM/Windows/stack-probe-non-default.ll deleted file mode 100644 index d66e93ad34ee..000000000000 --- a/test/CodeGen/ARM/Windows/stack-probe-non-default.ll +++ /dev/null @@ -1,27 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows -mcpu cortex-a9 -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-DEFAULT-CODE-MODEL - -; RUN: llc -mtriple thumbv7-windows -mcpu cortex-a9 -code-model large -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-LARGE-CODE-MODEL - -declare dllimport arm_aapcs_vfpcc void @initialise(i8*) - -define dllexport arm_aapcs_vfpcc signext i8 @function(i32 %offset) #0 { -entry: - %buffer = alloca [4096 x i8], align 1 - %0 = getelementptr inbounds [4096 x i8], [4096 x i8]* %buffer, i32 0, i32 0 - call arm_aapcs_vfpcc void @initialise(i8* %0) - %arrayidx = getelementptr inbounds [4096 x i8], [4096 x i8]* %buffer, i32 0, i32 %offset - %1 = load i8, i8* %arrayidx, align 1 - ret i8 %1 -} - -attributes #0 = { "stack-probe-size"="8096" } - -; CHECK-DEFAULT-CODE-MODEL-NOT: __chkstk -; CHECK-DEFAULT-CODE-MODEL: sub.w sp, sp, #4096 - -; CHECK-LARGE-CODE-MODEL-NOT: movw r12, :lower16:__chkstk -; CHECK-LARGE-CODE-MODEL-NOT: movt r12, :upper16:__chkstk -; CHECK-LARGE-CODE-MODEL: sub.w sp, sp, #4096 - diff --git a/test/CodeGen/ARM/Windows/structors.ll b/test/CodeGen/ARM/Windows/structors.ll deleted file mode 100644 index eff1c7f4b384..000000000000 --- a/test/CodeGen/ARM/Windows/structors.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llc -mtriple thumbv7-windows-itanium -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-WIN - -; RUN: llc -mtriple thumbv7-windows-gnu -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-GNU - -@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @function, i8* null }] - -define arm_aapcs_vfpcc void @function() { -entry: - ret void -} - -; CHECK-WIN: .section .CRT$XCU,"dr" -; CHECK-WIN: .long function - -; CHECK-GNU: .section .ctors,"dw" -; CHECK-GNU: .long function diff --git a/test/CodeGen/ARM/Windows/tls.ll b/test/CodeGen/ARM/Windows/tls.ll deleted file mode 100644 index 2c38ad3e58f7..000000000000 --- a/test/CodeGen/ARM/Windows/tls.ll +++ /dev/null @@ -1,157 +0,0 @@ -; RUN: llc -mtriple thumbv7--windows-itanium %s -o - | FileCheck %s - -@i = thread_local global i32 0 -@j = external thread_local global i32 -@k = internal thread_local global i32 0 -@l = hidden thread_local global i32 0 -@m = external hidden thread_local global i32 -@n = thread_local global i16 0 -@o = thread_local global i8 0 - -define i32 @f() { - %1 = load i32, i32* @i - ret i32 %1 -} - -; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2 - -; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44] -; CHECK: movw [[TLS_INDEX:r[0-9]]], :lower16:_tls_index -; CHECK-NEXT: movt [[TLS_INDEX]], :upper16:_tls_index -; CHECK-NEXT: ldr [[INDEX:r[0-9]]], {{\[}}[[TLS_INDEX]]] - -; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2] - -; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:\.LCPI[0-9]+_[0-9]+]] - -; CHECK-NEXT: ldr r0, {{\[}}[[TLS]], [[SLOT]]] - -; CHECK: [[CPI]]: -; CHECK-NEXT: .long i(SECREL32) - -define i32 @e() { - %1 = load i32, i32* @j - ret i32 %1 -} - -; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2 - -; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44] -; CHECK: movw [[TLS_INDEX:r[0-9]]], :lower16:_tls_index -; CHECK-NEXT: movt [[TLS_INDEX]], :upper16:_tls_index -; CHECK-NEXT: ldr [[INDEX:r[0-9]]], {{\[}}[[TLS_INDEX]]] - -; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2] - -; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:\.LCPI[0-9]+_[0-9]+]] - -; CHECK-NEXT: ldr r0, {{\[}}[[TLS]], [[SLOT]]] - -; CHECK: [[CPI]]: -; CHECK-NEXT: .long j(SECREL32) - -define i32 @d() { - %1 = load i32, i32* @k - ret i32 %1 -} - -; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2 - -; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44] -; CHECK: movw [[TLS_INDEX:r[0-9]]], :lower16:_tls_index -; CHECK-NEXT: movt [[TLS_INDEX]], :upper16:_tls_index -; CHECK-NEXT: ldr [[INDEX:r[0-9]]], {{\[}}[[TLS_INDEX]]] - -; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2] - -; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:\.LCPI[0-9]+_[0-9]+]] - -; CHECK-NEXT: ldr r0, {{\[}}[[TLS]], [[SLOT]]] - -; CHECK: [[CPI]]: -; CHECK-NEXT: .long k(SECREL32) - -define i32 @c() { - %1 = load i32, i32* @l - ret i32 %1 -} - -; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2 - -; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44] -; CHECK: movw [[TLS_INDEX:r[0-9]]], :lower16:_tls_index -; CHECK-NEXT: movt [[TLS_INDEX]], :upper16:_tls_index -; CHECK-NEXT: ldr [[INDEX:r[0-9]]], {{\[}}[[TLS_INDEX]]] - -; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2] - -; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:\.LCPI[0-9]+_[0-9]+]] - -; CHECK-NEXT: ldr r0, {{\[}}[[TLS]], [[SLOT]]] - -; CHECK: [[CPI]]: -; CHECK-NEXT: .long l(SECREL32) - -define i32 @b() { - %1 = load i32, i32* @m - ret i32 %1 -} - -; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2 - -; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44] -; CHECK: movw [[TLS_INDEX:r[0-9]]], :lower16:_tls_index -; CHECK-NEXT: movt [[TLS_INDEX]], :upper16:_tls_index -; CHECK-NEXT: ldr [[INDEX:r[0-9]]], {{\[}}[[TLS_INDEX]]] - -; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2] - -; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:\.LCPI[0-9]+_[0-9]+]] - -; CHECK-NEXT: ldr r0, {{\[}}[[TLS]], [[SLOT]]] - -; CHECK: [[CPI]]: -; CHECK: .long m(SECREL32) - -define i16 @a() { - %1 = load i16, i16* @n - ret i16 %1 -} - -; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2 - -; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44] -; CHECK: movw [[TLS_INDEX:r[0-9]]], :lower16:_tls_index -; CHECK-NEXT: movt [[TLS_INDEX]], :upper16:_tls_index -; CHECK-NEXT: ldr [[INDEX:r[0-9]]], {{\[}}[[TLS_INDEX]]] - -; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2] - -; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:\.LCPI[0-9]+_[0-9]+]] - -; CHECK-NEXT: ldrh r0, {{\[}}[[TLS]], [[SLOT]]] - -; CHECK: [[CPI]]: -; CHECK: .long n(SECREL32) - -define i8 @Z() { - %1 = load i8, i8* @o - ret i8 %1 -} - -; CHECK: mrc p15, #0, [[TEB:r[0-9]]], c13, c0, #2 - -; CHECK: ldr [[TLS_POINTER:r[0-9]]], {{\[}}[[TEB]], #44] -; CHECK: movw [[TLS_INDEX:r[0-9]]], :lower16:_tls_index -; CHECK-NEXT: movt [[TLS_INDEX]], :upper16:_tls_index -; CHECK-NEXT: ldr [[INDEX:r[0-9]]], {{\[}}[[TLS_INDEX]]] - -; CHECK-NEXT: ldr{{.w}} [[TLS:r[0-9]]], {{\[}}[[TLS_POINTER]], [[INDEX]], lsl #2] - -; CHECK-NEXT: ldr [[SLOT:r[0-9]]], [[CPI:\.LCPI[0-9]+_[0-9]+]] - -; CHECK-NEXT: ldrb r0, {{\[}}[[TLS]], [[SLOT]]] - -; CHECK: [[CPI]]: -; CHECK-NEXT: .long o(SECREL32) - diff --git a/test/CodeGen/ARM/Windows/trivial-gnu-object.ll b/test/CodeGen/ARM/Windows/trivial-gnu-object.ll deleted file mode 100644 index a242f39601cb..000000000000 --- a/test/CodeGen/ARM/Windows/trivial-gnu-object.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows-itanium -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s -; RUN: llc -mtriple=thumbv7-windows-gnu -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s - -define void @foo() { -; CHECK: file format COFF-ARM - -; CHECK-LABEL: foo: -; CHECK: bx lr - ret void -} diff --git a/test/CodeGen/ARM/Windows/vla.ll b/test/CodeGen/ARM/Windows/vla.ll deleted file mode 100644 index 1c0632e25e55..000000000000 --- a/test/CodeGen/ARM/Windows/vla.ll +++ /dev/null @@ -1,31 +0,0 @@ -; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-SMALL-CODE -; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -code-model=large -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-LARGE-CODE -; RUN: llc -mtriple=thumbv7-windows-msvc -mcpu=cortex-a9 -o - %s \ -; RUN: | FileCheck %s -check-prefix CHECK-MSVC - -define arm_aapcs_vfpcc i8 @function(i32 %sz, i32 %idx) { -entry: - %vla = alloca i8, i32 %sz, align 1 - %arrayidx = getelementptr inbounds i8, i8* %vla, i32 %idx - %0 = load volatile i8, i8* %arrayidx, align 1 - ret i8 %0 -} - -; CHECK-SMALL-CODE: adds [[R4:r[0-9]+]], #7 -; CHECK-SMALL-CODE: bic [[R4]], [[R4]], #7 -; CHECK-SMALL-CODE: lsrs r4, [[R4]], #2 -; CHECK-SMALL-CODE: bl __chkstk -; CHECK-SMALL-CODE: sub.w sp, sp, r4 - -; CHECK-LARGE-CODE: adds [[R4:r[0-9]+]], #7 -; CHECK-LARGE-CODE: bic [[R4]], [[R4]], #7 -; CHECK-LARGE-CODE: lsrs r4, [[R4]], #2 -; CHECK-LARGE-CODE: movw [[IP:r[0-9]+]], :lower16:__chkstk -; CHECK-LARGE-CODE: movt [[IP]], :upper16:__chkstk -; CHECK-LARGE-CODE: blx [[IP]] -; CHECK-LARGE-CODE: sub.w sp, sp, r4 - -; CHECK-MSVC-NOT: __chkstk - diff --git a/test/CodeGen/ARM/Windows/wineh-basic.ll b/test/CodeGen/ARM/Windows/wineh-basic.ll deleted file mode 100644 index 848ffbf506f2..000000000000 --- a/test/CodeGen/ARM/Windows/wineh-basic.ll +++ /dev/null @@ -1,48 +0,0 @@ -; RUN: llc < %s | FileCheck %s - -; CHECK: "??1field@@AAA@XZ": -; CHECK: bl free - -; C++ source: -; class field { ~field(); }; -; extern "C" void free(void *ptr); -; field::~field() { free((void *)0); } - -; ModuleID = 't.cpp' -source_filename = "t.cpp" -target datalayout = "e-m:w-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" -target triple = "thumbv7--windows-msvc19.0.24210" - -%class.field = type { i8 } - -; Function Attrs: nounwind -define arm_aapcs_vfpcc void @"\01??1field@@AAA@XZ"(%class.field* nocapture readnone %this) unnamed_addr #0 align 2 personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) { -entry: - invoke arm_aapcs_vfpcc void @free(i8* null) - to label %invoke.cont unwind label %terminate - -invoke.cont: ; preds = %entry - ret void - -terminate: ; preds = %entry - %0 = cleanuppad within none [] - tail call arm_aapcs_vfpcc void @__std_terminate() #2 [ "funclet"(token %0) ] - unreachable -} - -declare arm_aapcs_vfpcc void @free(i8*) local_unnamed_addr #1 - -declare arm_aapcs_vfpcc i32 @__CxxFrameHandler3(...) - -declare arm_aapcs_vfpcc void @__std_terminate() local_unnamed_addr - -attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a9" "target-features"="+dsp,+fp16,+neon,+strict-align,+vfp3" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a9" "target-features"="+dsp,+fp16,+neon,+strict-align,+vfp3" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { noreturn nounwind } - -!llvm.module.flags = !{!0, !1} -!llvm.ident = !{!2} - -!0 = !{i32 1, !"wchar_size", i32 2} -!1 = !{i32 1, !"min_enum_size", i32 4} -!2 = !{!"clang version 4.0.0 (trunk 284595) (llvm/trunk 284597)"} |