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-rw-r--r--test/CodeGen/Mips/llvm-ir/udiv.ll97
1 files changed, 71 insertions, 26 deletions
diff --git a/test/CodeGen/Mips/llvm-ir/udiv.ll b/test/CodeGen/Mips/llvm-ir/udiv.ll
index a7cafe52d1ac..6f4dcb5d7bb5 100644
--- a/test/CodeGen/Mips/llvm-ir/udiv.ll
+++ b/test/CodeGen/Mips/llvm-ir/udiv.ll
@@ -1,29 +1,37 @@
-; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP32
-; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP32
-; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP32
-; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP32
-; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP32
-; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
-; RUN: -check-prefix=R6 -check-prefix=GP32
-; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
-; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
-; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
-; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
-; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
-; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
-; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
-; RUN: -check-prefix=R6 -check-prefix=64R6
+; RUN: llc < %s -march=mips -mcpu=mips2 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP32
+; RUN: llc < %s -march=mips -mcpu=mips32 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP32
+; RUN: llc < %s -march=mips -mcpu=mips32r2 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP32
+; RUN: llc < %s -march=mips -mcpu=mips32r3 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP32
+; RUN: llc < %s -march=mips -mcpu=mips32r5 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP32
+; RUN: llc < %s -march=mips -mcpu=mips32r6 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,R6,GP32
+
+; RUN: llc < %s -march=mips64 -mcpu=mips3 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP64-NOT-R6
+; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP64-NOT-R6
+; RUN: llc < %s -march=mips64 -mcpu=mips64 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP64-NOT-R6
+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP64-NOT-R6
+; RUN: llc < %s -march=mips64 -mcpu=mips64r3 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP64-NOT-R6
+; RUN: llc < %s -march=mips64 -mcpu=mips64r5 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,NOT-R6,GP64-NOT-R6
+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,R6,64R6
+
+; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,MMR3,MM32
+; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,MMR6,MM32
+; RUN: llc < %s -march=mips -mcpu=mips64r6 -target-abi n64 -mattr=+micromips -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefixes=ALL,MMR6,MM64
define zeroext i1 @udiv_i1(i1 zeroext %a, i1 zeroext %b) {
entry:
@@ -36,6 +44,13 @@ entry:
; R6: divu $2, $4, $5
; R6: teq $5, $zero, 7
+ ; MMR3: divu $zero, $4, $5
+ ; MMR3: teq $5, $zero, 7
+ ; MMR3: mflo $2
+
+ ; MMR6: divu $2, $4, $5
+ ; MMR6: teq $5, $zero, 7
+
%r = udiv i1 %a, %b
ret i1 %r
}
@@ -51,6 +66,13 @@ entry:
; R6: divu $2, $4, $5
; R6: teq $5, $zero, 7
+ ; MMR3: divu $zero, $4, $5
+ ; MMR3: teq $5, $zero, 7
+ ; MMR3: mflo $2
+
+ ; MMR6: divu $2, $4, $5
+ ; MMR6: teq $5, $zero, 7
+
%r = udiv i8 %a, %b
ret i8 %r
}
@@ -66,6 +88,13 @@ entry:
; R6: divu $2, $4, $5
; R6: teq $5, $zero, 7
+ ; MMR3: divu $zero, $4, $5
+ ; MMR3: teq $5, $zero, 7
+ ; MMR3: mflo $2
+
+ ; MMR6: divu $2, $4, $5
+ ; MMR6: teq $5, $zero, 7
+
%r = udiv i16 %a, %b
ret i16 %r
}
@@ -81,6 +110,13 @@ entry:
; R6: divu $2, $4, $5
; R6: teq $5, $zero, 7
+ ; MMR3: divu $zero, $4, $5
+ ; MMR3: teq $5, $zero, 7
+ ; MMR3: mflo $2
+
+ ; MMR6: divu $2, $4, $5
+ ; MMR6: teq $5, $zero, 7
+
%r = udiv i32 %a, %b
ret i32 %r
}
@@ -98,6 +134,11 @@ entry:
; 64R6: ddivu $2, $4, $5
; 64R6: teq $5, $zero, 7
+ ; MM32: lw $25, %call16(__udivdi3)($2)
+
+ ; MM64: ddivu $2, $4, $5
+ ; MM64: teq $5, $zero, 7
+
%r = udiv i64 %a, %b
ret i64 %r
}
@@ -111,6 +152,10 @@ entry:
; GP64-NOT-R6: ld $25, %call16(__udivti3)($gp)
; 64-R6: ld $25, %call16(__udivti3)($gp)
+ ; MM32: lw $25, %call16(__udivti3)($2)
+
+ ; MM64: ld $25, %call16(__udivti3)($2)
+
%r = udiv i128 %a, %b
ret i128 %r
}