diff options
Diffstat (limited to 'test/CodeGen/R600/fcmp64.ll')
| -rw-r--r-- | test/CodeGen/R600/fcmp64.ll | 56 |
1 files changed, 25 insertions, 31 deletions
diff --git a/test/CodeGen/R600/fcmp64.ll b/test/CodeGen/R600/fcmp64.ll index 8cbe9f686648..032a4e416dc1 100644 --- a/test/CodeGen/R600/fcmp64.ll +++ b/test/CodeGen/R600/fcmp64.ll @@ -1,60 +1,55 @@ -; RUN: llc < %s -march=r600 -mcpu=tahiti -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s -; CHECK: @flt_f64 -; CHECK: V_CMP_LT_F64_e64 {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} - -define void @flt_f64(double addrspace(1)* %out, double addrspace(1)* %in1, +; CHECK-LABEL: {{^}}flt_f64: +; CHECK: v_cmp_nge_f64_e32 vcc, {{v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} +define void @flt_f64(i32 addrspace(1)* %out, double addrspace(1)* %in1, double addrspace(1)* %in2) { %r0 = load double addrspace(1)* %in1 %r1 = load double addrspace(1)* %in2 %r2 = fcmp ult double %r0, %r1 - %r3 = select i1 %r2, double %r0, double %r1 - store double %r3, double addrspace(1)* %out + %r3 = zext i1 %r2 to i32 + store i32 %r3, i32 addrspace(1)* %out ret void } -; CHECK: @fle_f64 -; CHECK: V_CMP_LE_F64_e64 {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} - -define void @fle_f64(double addrspace(1)* %out, double addrspace(1)* %in1, +; CHECK-LABEL: {{^}}fle_f64: +; CHECK: v_cmp_ngt_f64_e32 vcc, {{v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} +define void @fle_f64(i32 addrspace(1)* %out, double addrspace(1)* %in1, double addrspace(1)* %in2) { %r0 = load double addrspace(1)* %in1 %r1 = load double addrspace(1)* %in2 %r2 = fcmp ule double %r0, %r1 - %r3 = select i1 %r2, double %r0, double %r1 - store double %r3, double addrspace(1)* %out + %r3 = zext i1 %r2 to i32 + store i32 %r3, i32 addrspace(1)* %out ret void } -; CHECK: @fgt_f64 -; CHECK: V_CMP_GT_F64_e64 {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} - -define void @fgt_f64(double addrspace(1)* %out, double addrspace(1)* %in1, +; CHECK-LABEL: {{^}}fgt_f64: +; CHECK: v_cmp_nle_f64_e32 vcc, {{v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} +define void @fgt_f64(i32 addrspace(1)* %out, double addrspace(1)* %in1, double addrspace(1)* %in2) { %r0 = load double addrspace(1)* %in1 %r1 = load double addrspace(1)* %in2 %r2 = fcmp ugt double %r0, %r1 - %r3 = select i1 %r2, double %r0, double %r1 - store double %r3, double addrspace(1)* %out + %r3 = zext i1 %r2 to i32 + store i32 %r3, i32 addrspace(1)* %out ret void } -; CHECK: @fge_f64 -; CHECK: V_CMP_GE_F64_e64 {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} - -define void @fge_f64(double addrspace(1)* %out, double addrspace(1)* %in1, +; CHECK-LABEL: {{^}}fge_f64: +; CHECK: v_cmp_nlt_f64_e32 vcc, {{v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} +define void @fge_f64(i32 addrspace(1)* %out, double addrspace(1)* %in1, double addrspace(1)* %in2) { %r0 = load double addrspace(1)* %in1 %r1 = load double addrspace(1)* %in2 %r2 = fcmp uge double %r0, %r1 - %r3 = select i1 %r2, double %r0, double %r1 - store double %r3, double addrspace(1)* %out + %r3 = zext i1 %r2 to i32 + store i32 %r3, i32 addrspace(1)* %out ret void } -; CHECK: @fne_f64 -; CHECK: V_CMP_NEQ_F64_e32 vcc, {{v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} - +; CHECK-LABEL: {{^}}fne_f64: +; CHECK: v_cmp_neq_f64_e32 vcc, {{v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} define void @fne_f64(double addrspace(1)* %out, double addrspace(1)* %in1, double addrspace(1)* %in2) { %r0 = load double addrspace(1)* %in1 @@ -65,9 +60,8 @@ define void @fne_f64(double addrspace(1)* %out, double addrspace(1)* %in1, ret void } -; CHECK: @feq_f64 -; CHECK: V_CMP_EQ_F64_e64 {{s[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} - +; CHECK-LABEL: {{^}}feq_f64: +; CHECK: v_cmp_nlg_f64_e32 vcc, {{v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}} define void @feq_f64(double addrspace(1)* %out, double addrspace(1)* %in1, double addrspace(1)* %in2) { %r0 = load double addrspace(1)* %in1 |