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-rw-r--r--test/CodeGen/SystemZ/frame-18.ll9
1 files changed, 5 insertions, 4 deletions
diff --git a/test/CodeGen/SystemZ/frame-18.ll b/test/CodeGen/SystemZ/frame-18.ll
index a9977ed04b42..21dfc1238a13 100644
--- a/test/CodeGen/SystemZ/frame-18.ll
+++ b/test/CodeGen/SystemZ/frame-18.ll
@@ -1,11 +1,12 @@
-; Test spilling of GPRs.
+; Test spilling of GPRs. The tests here assume z10 register pressure,
+; without the high words being available.
;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; We need to allocate a 4-byte spill slot, rounded to 8 bytes. The frame
; size should be exactly 160 + 8 = 168.
define void @f1(i32 *%ptr) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
; CHECK: stmg %r6, %r15, 48(%r15)
; CHECK: aghi %r15, -168
; CHECK-NOT: 160(%r15)
@@ -50,7 +51,7 @@ define void @f1(i32 *%ptr) {
; Same for i64, except that the full spill slot is used.
define void @f2(i64 *%ptr) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
; CHECK: stmg %r6, %r15, 48(%r15)
; CHECK: aghi %r15, -168
; CHECK: stg [[REGISTER:%r[0-9]+]], 160(%r15)