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diff --git a/test/CodeGen/X86/GlobalISel/select-add.mir b/test/CodeGen/X86/GlobalISel/select-add.mir
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-# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=NO_AVX512VL --check-prefix=NO_AVX512F --check-prefix=SSE
-# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=NO_AVX512VL --check-prefix=NO_AVX512F --check-prefix=AVX
-# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=NO_AVX512VL --check-prefix=AVX512ALL --check-prefix=AVX512F
-# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX512ALL --check-prefix=AVX512VL
-
---- |
- define i64 @test_add_i64(i64 %arg1, i64 %arg2) {
- %ret = add i64 %arg1, %arg2
- ret i64 %ret
- }
-
- define i32 @test_add_i32(i32 %arg1, i32 %arg2) {
- %ret = add i32 %arg1, %arg2
- ret i32 %ret
- }
-
- define i16 @test_add_i16(i16 %arg1, i16 %arg2) {
- %ret = add i16 %arg1, %arg2
- ret i16 %ret
- }
-
- define i8 @test_add_i8(i8 %arg1, i8 %arg2) {
- %ret = add i8 %arg1, %arg2
- ret i8 %ret
- }
-
- define <4 x i32> @test_add_v4i32(<4 x i32> %arg1, <4 x i32> %arg2) {
- %ret = add <4 x i32> %arg1, %arg2
- ret <4 x i32> %ret
- }
-
- define <4 x float> @test_add_v4f32(<4 x float> %arg1, <4 x float> %arg2) {
- %ret = fadd <4 x float> %arg1, %arg2
- ret <4 x float> %ret
- }
-...
-
----
-name: test_add_i64
-# ALL-LABEL: name: test_add_i64
-legalized: true
-regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr64, preferred-register: '' }
-# ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' }
-# ALL-NEXT: - { id: 2, class: gr64, preferred-register: '' }
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
-# ALL: %0 = COPY %rdi
-# ALL-NEXT: %1 = COPY %rsi
-# ALL-NEXT: %2 = ADD64rr %0, %1
-body: |
- bb.1 (%ir-block.0):
- liveins: %edi, %esi
-
- %0(s64) = COPY %rdi
- %1(s64) = COPY %rsi
- %2(s64) = G_ADD %0, %1
- %rax = COPY %2(s64)
-
-...
-
----
-name: test_add_i32
-# ALL-LABEL: name: test_add_i32
-legalized: true
-regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' }
-# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
-# ALL-NEXT: - { id: 2, class: gr32, preferred-register: '' }
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
-# ALL: %0 = COPY %edi
-# ALL-NEXT: %1 = COPY %esi
-# ALL-NEXT: %2 = ADD32rr %0, %1
-body: |
- bb.1 (%ir-block.0):
- liveins: %edi, %esi
-
- %0(s32) = COPY %edi
- %1(s32) = COPY %esi
- %2(s32) = G_ADD %0, %1
- %rax = COPY %2(s32)
-
-...
----
-name: test_add_i16
-# ALL-LABEL: name: test_add_i16
-alignment: 4
-legalized: true
-regBankSelected: true
-selected: false
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr16, preferred-register: '' }
-# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '' }
-# ALL-NEXT: - { id: 2, class: gr16, preferred-register: '' }
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
-# ALL: %0 = COPY %di
-# ALL: %1 = COPY %si
-# ALL: %2 = ADD16rr %0, %1, implicit-def %eflags
-body: |
- bb.1 (%ir-block.0):
- liveins: %edi, %esi
-
- %0(s16) = COPY %edi
- %1(s16) = COPY %esi
- %2(s16) = G_ADD %0, %1
- %ax = COPY %2(s16)
- RET 0, implicit %ax
-
-...
----
-name: test_add_i8
-# ALL-LABEL: name: test_add_i8
-alignment: 4
-legalized: true
-regBankSelected: true
-selected: false
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '' }
-# ALL-NEXT: - { id: 1, class: gr8, preferred-register: '' }
-# ALL-NEXT: - { id: 2, class: gr8, preferred-register: '' }
-registers:
- - { id: 0, class: gpr }
- - { id: 1, class: gpr }
- - { id: 2, class: gpr }
-# ALL: %0 = COPY %dil
-# ALL: %1 = COPY %sil
-# ALL: %2 = ADD8rr %0, %1, implicit-def %eflags
-body: |
- bb.1 (%ir-block.0):
- liveins: %edi, %esi
-
- %0(s8) = COPY %edi
- %1(s8) = COPY %esi
- %2(s8) = G_ADD %0, %1
- %al = COPY %2(s8)
- RET 0, implicit %al
-
-...
----
-name: test_add_v4i32
-# ALL-LABEL: name: test_add_v4i32
-alignment: 4
-legalized: true
-regBankSelected: true
-selected: false
-tracksRegLiveness: true
-# ALL: registers:
-# NO_AVX512VL-NEXT: - { id: 0, class: vr128, preferred-register: '' }
-# NO_AVX512VL-NEXT: - { id: 1, class: vr128, preferred-register: '' }
-# NO_AVX512VL-NEXT: - { id: 2, class: vr128, preferred-register: '' }
-# AVX512VL-NEXT: - { id: 0, class: vr128x, preferred-register: '' }
-# AVX512VL-NEXT: - { id: 1, class: vr128x, preferred-register: '' }
-# AVX512VL-NEXT: - { id: 2, class: vr128x, preferred-register: '' }
-registers:
- - { id: 0, class: vecr }
- - { id: 1, class: vecr }
- - { id: 2, class: vecr }
-# ALL: %0 = COPY %xmm0
-# ALL-NEXT: %1 = COPY %xmm1
-# SSE-NEXT: %2 = PADDDrr %0, %1
-# AVX-NEXT: %2 = VPADDDrr %0, %1
-# AVX512F-NEXT: %2 = VPADDDrr %0, %1
-# AVX512VL-NEXT: %2 = VPADDDZ128rr %0, %1
-body: |
- bb.1 (%ir-block.0):
- liveins: %xmm0, %xmm1
-
- %0(<4 x s32>) = COPY %xmm0
- %1(<4 x s32>) = COPY %xmm1
- %2(<4 x s32>) = G_ADD %0, %1
- %xmm0 = COPY %2(<4 x s32>)
- RET 0, implicit %xmm0
-
-...
----
-name: test_add_v4f32
-# ALL-LABEL: name: test_add_v4f32
-alignment: 4
-legalized: true
-regBankSelected: true
-selected: false
-tracksRegLiveness: true
-# ALL: registers:
-# NO_AVX512VL-NEXT: - { id: 0, class: vr128, preferred-register: '' }
-# NO_AVX512VL-NEXT: - { id: 1, class: vr128, preferred-register: '' }
-# NO_AVX512VL-NEXT: - { id: 2, class: vr128, preferred-register: '' }
-# AVX512VL-NEXT: - { id: 0, class: vr128x, preferred-register: '' }
-# AVX512VL-NEXT: - { id: 1, class: vr128x, preferred-register: '' }
-# AVX512VL-NEXT: - { id: 2, class: vr128x, preferred-register: '' }
-registers:
- - { id: 0, class: vecr }
- - { id: 1, class: vecr }
- - { id: 2, class: vecr }
-# ALL: %0 = COPY %xmm0
-# ALL-NEXT: %1 = COPY %xmm1
-# SSE-NEXT: %2 = ADDPSrr %0, %1
-# AVX-NEXT: %2 = VADDPSrr %0, %1
-# AVX512F-NEXT: %2 = VADDPSrr %0, %1
-# AVX512VL-NEXT: %2 = VADDPSZ128rr %0, %1
-body: |
- bb.1 (%ir-block.0):
- liveins: %xmm0, %xmm1
-
- %0(<4 x s32>) = COPY %xmm0
- %1(<4 x s32>) = COPY %xmm1
- %2(<4 x s32>) = G_FADD %0, %1
- %xmm0 = COPY %2(<4 x s32>)
- RET 0, implicit %xmm0
-
-...