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-rw-r--r--test/CodeGen/X86/vec_set-3.ll44
1 files changed, 32 insertions, 12 deletions
diff --git a/test/CodeGen/X86/vec_set-3.ll b/test/CodeGen/X86/vec_set-3.ll
index d1d7608a0411..a13c813ea7b0 100644
--- a/test/CodeGen/X86/vec_set-3.ll
+++ b/test/CodeGen/X86/vec_set-3.ll
@@ -1,17 +1,37 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -o %t
-; RUN: grep pshufd %t | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn | FileCheck %s
-define <4 x float> @test(float %a) nounwind {
- %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 1 ; <<4 x float>> [#uses=1]
- %tmp5 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
- %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
- ret <4 x float> %tmp6
+define <4 x float> @test(float %a) {
+; CHECK-LABEL: test:
+; CHECK: insertps $29, {{.*}}, %xmm0
+; CHECK-NEXT: retl
+
+entry:
+ %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 1
+ %tmp5 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 2
+ %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, i32 3
+ ret <4 x float> %tmp6
}
-define <2 x i64> @test2(i32 %a) nounwind {
- %tmp7 = insertelement <4 x i32> zeroinitializer, i32 %a, i32 2 ; <<4 x i32>> [#uses=1]
- %tmp9 = insertelement <4 x i32> %tmp7, i32 0, i32 3 ; <<4 x i32>> [#uses=1]
- %tmp10 = bitcast <4 x i32> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
- ret <2 x i64> %tmp10
+define <2 x i64> @test2(i32 %a) {
+; CHECK-LABEL: test2:
+; CHECK: movd {{.*}}, %xmm0
+; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,0,1]
+; CHECK-NEXT: retl
+
+entry:
+ %tmp7 = insertelement <4 x i32> zeroinitializer, i32 %a, i32 2
+ %tmp9 = insertelement <4 x i32> %tmp7, i32 0, i32 3
+ %tmp10 = bitcast <4 x i32> %tmp9 to <2 x i64>
+ ret <2 x i64> %tmp10
}
+define <4 x float> @test3(<4 x float> %A) {
+; CHECK-LABEL: test3:
+; CHECK: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
+; CHECK-NEXT: retl
+
+ %tmp0 = extractelement <4 x float> %A, i32 0
+ %tmp1 = insertelement <4 x float> <float 0.000000e+00, float undef, float undef, float undef >, float %tmp0, i32 1
+ %tmp2 = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 2
+ ret <4 x float> %tmp2
+}