diff options
Diffstat (limited to 'test/CodeGen/X86/vector-sext.ll')
| -rw-r--r-- | test/CodeGen/X86/vector-sext.ll | 690 |
1 files changed, 356 insertions, 334 deletions
diff --git a/test/CodeGen/X86/vector-sext.ll b/test/CodeGen/X86/vector-sext.ll index 392c0de95f24..d46514a6dc7d 100644 --- a/test/CodeGen/X86/vector-sext.ll +++ b/test/CodeGen/X86/vector-sext.ll @@ -12,29 +12,29 @@ define <8 x i16> @sext_16i8_to_8i16(<16 x i8> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_16i8_to_8i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: psraw $8, %xmm0 ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_16i8_to_8i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSSE3-NEXT: psraw $8, %xmm0 ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_16i8_to_8i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbw %xmm0, %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: sext_16i8_to_8i16: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxbw %xmm0, %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: sext_16i8_to_8i16: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm0 ; X32-SSE41-NEXT: retl entry: @@ -45,7 +45,7 @@ entry: define <16 x i16> @sext_16i8_to_16i16(<16 x i8> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_16i8_to_16i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] ; SSE2-NEXT: psraw $8, %xmm2 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] @@ -54,7 +54,7 @@ define <16 x i16> @sext_16i8_to_16i16(<16 x i8> %A) nounwind uwtable readnone ss ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_16i8_to_16i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] ; SSSE3-NEXT: psraw $8, %xmm2 ; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] @@ -63,7 +63,7 @@ define <16 x i16> @sext_16i8_to_16i16(<16 x i8> %A) nounwind uwtable readnone ss ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_16i8_to_16i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbw %xmm0, %xmm2 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; SSE41-NEXT: pmovsxbw %xmm0, %xmm1 @@ -71,7 +71,7 @@ define <16 x i16> @sext_16i8_to_16i16(<16 x i8> %A) nounwind uwtable readnone ss ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_16i8_to_16i16: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; AVX1-NEXT: vpmovsxbw %xmm0, %xmm0 @@ -79,17 +79,17 @@ define <16 x i16> @sext_16i8_to_16i16(<16 x i8> %A) nounwind uwtable readnone ss ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_16i8_to_16i16: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_16i8_to_16i16: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxbw %xmm0, %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_16i8_to_16i16: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm2 ; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm1 @@ -102,7 +102,7 @@ entry: define <32 x i16> @sext_32i8_to_32i16(<32 x i8> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_32i8_to_32i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3],xmm4[4],xmm0[4],xmm4[5],xmm0[5],xmm4[6],xmm0[6],xmm4[7],xmm0[7] ; SSE2-NEXT: psraw $8, %xmm4 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm0[8],xmm5[9],xmm0[9],xmm5[10],xmm0[10],xmm5[11],xmm0[11],xmm5[12],xmm0[12],xmm5[13],xmm0[13],xmm5[14],xmm0[14],xmm5[15],xmm0[15] @@ -116,7 +116,7 @@ define <32 x i16> @sext_32i8_to_32i16(<32 x i8> %A) nounwind uwtable readnone ss ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_32i8_to_32i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3],xmm4[4],xmm0[4],xmm4[5],xmm0[5],xmm4[6],xmm0[6],xmm4[7],xmm0[7] ; SSSE3-NEXT: psraw $8, %xmm4 ; SSSE3-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm0[8],xmm5[9],xmm0[9],xmm5[10],xmm0[10],xmm5[11],xmm0[11],xmm5[12],xmm0[12],xmm5[13],xmm0[13],xmm5[14],xmm0[14],xmm5[15],xmm0[15] @@ -130,7 +130,7 @@ define <32 x i16> @sext_32i8_to_32i16(<32 x i8> %A) nounwind uwtable readnone ss ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_32i8_to_32i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbw %xmm0, %xmm5 ; SSE41-NEXT: pmovsxbw %xmm1, %xmm2 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] @@ -142,7 +142,7 @@ define <32 x i16> @sext_32i8_to_32i16(<32 x i8> %A) nounwind uwtable readnone ss ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_32i8_to_32i16: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] ; AVX1-NEXT: vpmovsxbw %xmm2, %xmm2 @@ -156,7 +156,7 @@ define <32 x i16> @sext_32i8_to_32i16(<32 x i8> %A) nounwind uwtable readnone ss ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_32i8_to_32i16: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxbw %xmm0, %ymm2 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 ; AVX2-NEXT: vpmovsxbw %xmm0, %ymm1 @@ -164,7 +164,7 @@ define <32 x i16> @sext_32i8_to_32i16(<32 x i8> %A) nounwind uwtable readnone ss ; AVX2-NEXT: retq ; ; AVX512F-LABEL: sext_32i8_to_32i16: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm2 ; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm0 ; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm1 @@ -172,12 +172,12 @@ define <32 x i16> @sext_32i8_to_32i16(<32 x i8> %A) nounwind uwtable readnone ss ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: sext_32i8_to_32i16: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vpmovsxbw %ymm0, %zmm0 ; AVX512BW-NEXT: retq ; ; X32-SSE41-LABEL: sext_32i8_to_32i16: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm5 ; X32-SSE41-NEXT: pmovsxbw %xmm1, %xmm2 ; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] @@ -194,31 +194,31 @@ entry: define <4 x i32> @sext_16i8_to_4i32(<16 x i8> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_16i8_to_4i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSE2-NEXT: psrad $24, %xmm0 ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_16i8_to_4i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSSE3-NEXT: psrad $24, %xmm0 ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_16i8_to_4i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbd %xmm0, %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: sext_16i8_to_4i32: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxbd %xmm0, %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: sext_16i8_to_4i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm0 ; X32-SSE41-NEXT: retl entry: @@ -229,7 +229,7 @@ entry: define <8 x i32> @sext_16i8_to_8i32(<16 x i8> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_16i8_to_8i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] ; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] ; SSE2-NEXT: psrad $24, %xmm2 @@ -241,7 +241,7 @@ define <8 x i32> @sext_16i8_to_8i32(<16 x i8> %A) nounwind uwtable readnone ssp ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_16i8_to_8i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa %xmm0, %xmm1 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] @@ -251,7 +251,7 @@ define <8 x i32> @sext_16i8_to_8i32(<16 x i8> %A) nounwind uwtable readnone ssp ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_16i8_to_8i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbd %xmm0, %xmm2 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] ; SSE41-NEXT: pmovsxbd %xmm0, %xmm1 @@ -259,7 +259,7 @@ define <8 x i32> @sext_16i8_to_8i32(<16 x i8> %A) nounwind uwtable readnone ssp ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_16i8_to_8i32: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxbd %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] ; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 @@ -267,17 +267,17 @@ define <8 x i32> @sext_16i8_to_8i32(<16 x i8> %A) nounwind uwtable readnone ssp ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_16i8_to_8i32: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_16i8_to_8i32: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxbd %xmm0, %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_16i8_to_8i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm2 ; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] ; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm1 @@ -291,7 +291,7 @@ entry: define <16 x i32> @sext_16i8_to_16i32(<16 x i8> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_16i8_to_16i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] ; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3] ; SSE2-NEXT: psrad $24, %xmm4 @@ -310,7 +310,7 @@ define <16 x i32> @sext_16i8_to_16i32(<16 x i8> %A) nounwind uwtable readnone ss ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_16i8_to_16i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa %xmm0, %xmm3 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] @@ -326,7 +326,7 @@ define <16 x i32> @sext_16i8_to_16i32(<16 x i8> %A) nounwind uwtable readnone ss ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_16i8_to_16i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbd %xmm0, %xmm4 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; SSE41-NEXT: pmovsxbd %xmm1, %xmm1 @@ -338,7 +338,7 @@ define <16 x i32> @sext_16i8_to_16i32(<16 x i8> %A) nounwind uwtable readnone ss ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_16i8_to_16i32: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxbd %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] ; AVX1-NEXT: vpmovsxbd %xmm2, %xmm2 @@ -352,7 +352,7 @@ define <16 x i32> @sext_16i8_to_16i32(<16 x i8> %A) nounwind uwtable readnone ss ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_16i8_to_16i32: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxbd %xmm0, %ymm2 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; AVX2-NEXT: vpmovsxbd %xmm0, %ymm1 @@ -360,12 +360,12 @@ define <16 x i32> @sext_16i8_to_16i32(<16 x i8> %A) nounwind uwtable readnone ss ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_16i8_to_16i32: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_16i8_to_16i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm4 ; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; X32-SSE41-NEXT: pmovsxbd %xmm1, %xmm1 @@ -382,7 +382,7 @@ entry: define <2 x i64> @sext_16i8_to_2i64(<16 x i8> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_16i8_to_2i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSE2-NEXT: movdqa %xmm0, %xmm1 @@ -392,7 +392,7 @@ define <2 x i64> @sext_16i8_to_2i64(<16 x i8> %A) nounwind uwtable readnone ssp ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_16i8_to_2i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSSE3-NEXT: movdqa %xmm0, %xmm1 @@ -402,17 +402,17 @@ define <2 x i64> @sext_16i8_to_2i64(<16 x i8> %A) nounwind uwtable readnone ssp ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_16i8_to_2i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbq %xmm0, %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: sext_16i8_to_2i64: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxbq %xmm0, %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: sext_16i8_to_2i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm0 ; X32-SSE41-NEXT: retl entry: @@ -423,7 +423,7 @@ entry: define <4 x i64> @sext_16i8_to_4i64(<16 x i8> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_16i8_to_4i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] ; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] ; SSE2-NEXT: movdqa %xmm2, %xmm1 @@ -441,7 +441,7 @@ define <4 x i64> @sext_16i8_to_4i64(<16 x i8> %A) nounwind uwtable readnone ssp ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_16i8_to_4i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa %xmm0, %xmm1 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] @@ -457,7 +457,7 @@ define <4 x i64> @sext_16i8_to_4i64(<16 x i8> %A) nounwind uwtable readnone ssp ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_16i8_to_4i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbq %xmm0, %xmm2 ; SSE41-NEXT: psrld $16, %xmm0 ; SSE41-NEXT: pmovsxbq %xmm0, %xmm1 @@ -465,7 +465,7 @@ define <4 x i64> @sext_16i8_to_4i64(<16 x i8> %A) nounwind uwtable readnone ssp ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_16i8_to_4i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxbq %xmm0, %xmm1 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 ; AVX1-NEXT: vpmovsxbq %xmm0, %xmm0 @@ -473,17 +473,17 @@ define <4 x i64> @sext_16i8_to_4i64(<16 x i8> %A) nounwind uwtable readnone ssp ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_16i8_to_4i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxbq %xmm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_16i8_to_4i64: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxbq %xmm0, %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_16i8_to_4i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm2 ; X32-SSE41-NEXT: psrld $16, %xmm0 ; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm1 @@ -497,7 +497,7 @@ entry: define <8 x i64> @sext_16i8_to_8i64(<16 x i8> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_16i8_to_8i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movdqa %xmm0, %xmm1 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] @@ -529,7 +529,7 @@ define <8 x i64> @sext_16i8_to_8i64(<16 x i8> %A) nounwind uwtable readnone ssp ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_16i8_to_8i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = <u,u,u,2,u,u,u,3,u,u,u,255,u,u,u,255> ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3],xmm4[4],xmm0[4],xmm4[5],xmm0[5],xmm4[6],xmm0[6],xmm4[7],xmm0[7] ; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,2,3] @@ -558,7 +558,7 @@ define <8 x i64> @sext_16i8_to_8i64(<16 x i8> %A) nounwind uwtable readnone ssp ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_16i8_to_8i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbq %xmm0, %xmm4 ; SSE41-NEXT: movdqa %xmm0, %xmm1 ; SSE41-NEXT: psrld $16, %xmm1 @@ -571,7 +571,7 @@ define <8 x i64> @sext_16i8_to_8i64(<16 x i8> %A) nounwind uwtable readnone ssp ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_16i8_to_8i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxbq %xmm0, %xmm1 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm2 ; AVX1-NEXT: vpmovsxbq %xmm2, %xmm2 @@ -585,7 +585,7 @@ define <8 x i64> @sext_16i8_to_8i64(<16 x i8> %A) nounwind uwtable readnone ssp ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_16i8_to_8i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxbq %xmm0, %ymm2 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] ; AVX2-NEXT: vpmovsxbq %xmm0, %ymm1 @@ -593,12 +593,12 @@ define <8 x i64> @sext_16i8_to_8i64(<16 x i8> %A) nounwind uwtable readnone ssp ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_16i8_to_8i64: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxbq %xmm0, %zmm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_16i8_to_8i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm4 ; X32-SSE41-NEXT: movdqa %xmm0, %xmm1 ; X32-SSE41-NEXT: psrld $16, %xmm1 @@ -617,29 +617,29 @@ entry: define <4 x i32> @sext_8i16_to_4i32(<8 x i16> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_8i16_to_4i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSE2-NEXT: psrad $16, %xmm0 ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_8i16_to_4i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSSE3-NEXT: psrad $16, %xmm0 ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_8i16_to_4i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxwd %xmm0, %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: sext_8i16_to_4i32: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxwd %xmm0, %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: sext_8i16_to_4i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm0 ; X32-SSE41-NEXT: retl entry: @@ -650,7 +650,7 @@ entry: define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_8i16_to_8i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] ; SSE2-NEXT: psrad $16, %xmm2 ; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] @@ -659,7 +659,7 @@ define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_8i16_to_8i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] ; SSSE3-NEXT: psrad $16, %xmm2 ; SSSE3-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] @@ -668,7 +668,7 @@ define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_8i16_to_8i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxwd %xmm0, %xmm2 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; SSE41-NEXT: pmovsxwd %xmm0, %xmm1 @@ -676,7 +676,7 @@ define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_8i16_to_8i32: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 @@ -684,17 +684,17 @@ define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_8i16_to_8i32: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_8i16_to_8i32: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_8i16_to_8i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm2 ; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm1 @@ -707,7 +707,7 @@ entry: define <16 x i32> @sext_16i16_to_16i32(<16 x i16> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_16i16_to_16i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] ; SSE2-NEXT: psrad $16, %xmm4 ; SSE2-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7] @@ -721,7 +721,7 @@ define <16 x i32> @sext_16i16_to_16i32(<16 x i16> %A) nounwind uwtable readnone ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_16i16_to_16i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] ; SSSE3-NEXT: psrad $16, %xmm4 ; SSSE3-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7] @@ -735,7 +735,7 @@ define <16 x i32> @sext_16i16_to_16i32(<16 x i16> %A) nounwind uwtable readnone ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_16i16_to_16i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxwd %xmm0, %xmm5 ; SSE41-NEXT: pmovsxwd %xmm1, %xmm2 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] @@ -747,7 +747,7 @@ define <16 x i32> @sext_16i16_to_16i32(<16 x i16> %A) nounwind uwtable readnone ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_16i16_to_16i32: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] ; AVX1-NEXT: vpmovsxwd %xmm2, %xmm2 @@ -761,7 +761,7 @@ define <16 x i32> @sext_16i16_to_16i32(<16 x i16> %A) nounwind uwtable readnone ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_16i16_to_16i32: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxwd %xmm0, %ymm2 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 ; AVX2-NEXT: vpmovsxwd %xmm0, %ymm1 @@ -769,12 +769,12 @@ define <16 x i32> @sext_16i16_to_16i32(<16 x i16> %A) nounwind uwtable readnone ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_16i16_to_16i32: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxwd %ymm0, %zmm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_16i16_to_16i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm5 ; X32-SSE41-NEXT: pmovsxwd %xmm1, %xmm2 ; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] @@ -791,7 +791,7 @@ entry: define <2 x i64> @sext_8i16_to_2i64(<8 x i16> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_8i16_to_2i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSE2-NEXT: movdqa %xmm0, %xmm1 ; SSE2-NEXT: psrad $31, %xmm1 @@ -800,7 +800,7 @@ define <2 x i64> @sext_8i16_to_2i64(<8 x i16> %A) nounwind uwtable readnone ssp ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_8i16_to_2i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSSE3-NEXT: movdqa %xmm0, %xmm1 ; SSSE3-NEXT: psrad $31, %xmm1 @@ -809,17 +809,17 @@ define <2 x i64> @sext_8i16_to_2i64(<8 x i16> %A) nounwind uwtable readnone ssp ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_8i16_to_2i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxwq %xmm0, %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: sext_8i16_to_2i64: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxwq %xmm0, %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: sext_8i16_to_2i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm0 ; X32-SSE41-NEXT: retl entry: @@ -830,7 +830,7 @@ entry: define <4 x i64> @sext_8i16_to_4i64(<8 x i16> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_8i16_to_4i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] ; SSE2-NEXT: movdqa %xmm2, %xmm1 ; SSE2-NEXT: psrad $31, %xmm1 @@ -846,7 +846,7 @@ define <4 x i64> @sext_8i16_to_4i64(<8 x i16> %A) nounwind uwtable readnone ssp ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_8i16_to_4i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] ; SSSE3-NEXT: movdqa %xmm2, %xmm1 ; SSSE3-NEXT: psrad $31, %xmm1 @@ -862,7 +862,7 @@ define <4 x i64> @sext_8i16_to_4i64(<8 x i16> %A) nounwind uwtable readnone ssp ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_8i16_to_4i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxwq %xmm0, %xmm2 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] ; SSE41-NEXT: pmovsxwq %xmm0, %xmm1 @@ -870,7 +870,7 @@ define <4 x i64> @sext_8i16_to_4i64(<8 x i16> %A) nounwind uwtable readnone ssp ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_8i16_to_4i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxwq %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] ; AVX1-NEXT: vpmovsxwq %xmm0, %xmm0 @@ -878,17 +878,17 @@ define <4 x i64> @sext_8i16_to_4i64(<8 x i16> %A) nounwind uwtable readnone ssp ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_8i16_to_4i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxwq %xmm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_8i16_to_4i64: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxwq %xmm0, %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_8i16_to_4i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm2 ; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] ; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm1 @@ -902,7 +902,7 @@ entry: define <8 x i64> @sext_8i16_to_8i64(<8 x i16> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_8i16_to_8i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] ; SSE2-NEXT: movdqa %xmm4, %xmm1 ; SSE2-NEXT: psrad $31, %xmm1 @@ -929,7 +929,7 @@ define <8 x i64> @sext_8i16_to_8i64(<8 x i16> %A) nounwind uwtable readnone ssp ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_8i16_to_8i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] ; SSSE3-NEXT: movdqa %xmm4, %xmm1 ; SSSE3-NEXT: psrad $31, %xmm1 @@ -956,7 +956,7 @@ define <8 x i64> @sext_8i16_to_8i64(<8 x i16> %A) nounwind uwtable readnone ssp ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_8i16_to_8i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxwq %xmm0, %xmm4 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; SSE41-NEXT: pmovsxwq %xmm1, %xmm1 @@ -968,7 +968,7 @@ define <8 x i64> @sext_8i16_to_8i64(<8 x i16> %A) nounwind uwtable readnone ssp ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_8i16_to_8i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxwq %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] ; AVX1-NEXT: vpmovsxwq %xmm2, %xmm2 @@ -982,7 +982,7 @@ define <8 x i64> @sext_8i16_to_8i64(<8 x i16> %A) nounwind uwtable readnone ssp ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_8i16_to_8i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxwq %xmm0, %ymm2 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; AVX2-NEXT: vpmovsxwq %xmm0, %ymm1 @@ -990,12 +990,12 @@ define <8 x i64> @sext_8i16_to_8i64(<8 x i16> %A) nounwind uwtable readnone ssp ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_8i16_to_8i64: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxwq %xmm0, %zmm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_8i16_to_8i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm4 ; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; X32-SSE41-NEXT: pmovsxwq %xmm1, %xmm1 @@ -1012,31 +1012,31 @@ entry: define <2 x i64> @sext_4i32_to_2i64(<4 x i32> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_4i32_to_2i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movdqa %xmm0, %xmm1 ; SSE2-NEXT: psrad $31, %xmm1 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_4i32_to_2i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa %xmm0, %xmm1 ; SSSE3-NEXT: psrad $31, %xmm1 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_4i32_to_2i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxdq %xmm0, %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: sext_4i32_to_2i64: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxdq %xmm0, %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: sext_4i32_to_2i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm0 ; X32-SSE41-NEXT: retl entry: @@ -1047,7 +1047,7 @@ entry: define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_4i32_to_4i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movdqa %xmm0, %xmm2 ; SSE2-NEXT: psrad $31, %xmm2 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] @@ -1058,7 +1058,7 @@ define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_4i32_to_4i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa %xmm0, %xmm2 ; SSSE3-NEXT: psrad $31, %xmm2 ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] @@ -1069,7 +1069,7 @@ define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_4i32_to_4i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; SSE41-NEXT: pmovsxdq %xmm0, %xmm1 @@ -1077,7 +1077,7 @@ define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_4i32_to_4i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 @@ -1085,17 +1085,17 @@ define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_4i32_to_4i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_4i32_to_4i64: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_4i32_to_4i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 ; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm1 @@ -1108,7 +1108,7 @@ entry: define <8 x i64> @sext_8i32_to_8i64(<8 x i32> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_8i32_to_8i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movdqa %xmm1, %xmm2 ; SSE2-NEXT: movdqa %xmm0, %xmm3 ; SSE2-NEXT: psrad $31, %xmm3 @@ -1127,7 +1127,7 @@ define <8 x i64> @sext_8i32_to_8i64(<8 x i32> %A) nounwind uwtable readnone ssp ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_8i32_to_8i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa %xmm1, %xmm2 ; SSSE3-NEXT: movdqa %xmm0, %xmm3 ; SSSE3-NEXT: psrad $31, %xmm3 @@ -1146,7 +1146,7 @@ define <8 x i64> @sext_8i32_to_8i64(<8 x i32> %A) nounwind uwtable readnone ssp ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_8i32_to_8i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxdq %xmm0, %xmm5 ; SSE41-NEXT: pmovsxdq %xmm1, %xmm2 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] @@ -1158,7 +1158,7 @@ define <8 x i64> @sext_8i32_to_8i64(<8 x i32> %A) nounwind uwtable readnone ssp ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_8i32_to_8i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] ; AVX1-NEXT: vpmovsxdq %xmm2, %xmm2 @@ -1172,7 +1172,7 @@ define <8 x i64> @sext_8i32_to_8i64(<8 x i32> %A) nounwind uwtable readnone ssp ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_8i32_to_8i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm2 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm1 @@ -1180,12 +1180,12 @@ define <8 x i64> @sext_8i32_to_8i64(<8 x i32> %A) nounwind uwtable readnone ssp ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_8i32_to_8i64: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxdq %ymm0, %zmm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_8i32_to_8i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm5 ; X32-SSE41-NEXT: pmovsxdq %xmm1, %xmm2 ; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] @@ -1202,7 +1202,7 @@ entry: define <2 x i64> @load_sext_2i1_to_2i64(<2 x i1> *%ptr) { ; SSE-LABEL: load_sext_2i1_to_2i64: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: movzbl (%rdi), %eax ; SSE-NEXT: movq %rax, %rcx ; SSE-NEXT: shlq $62, %rcx @@ -1215,7 +1215,7 @@ define <2 x i64> @load_sext_2i1_to_2i64(<2 x i1> *%ptr) { ; SSE-NEXT: retq ; ; AVX1-LABEL: load_sext_2i1_to_2i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: movzbl (%rdi), %eax ; AVX1-NEXT: movq %rax, %rcx ; AVX1-NEXT: shlq $62, %rcx @@ -1228,7 +1228,7 @@ define <2 x i64> @load_sext_2i1_to_2i64(<2 x i1> *%ptr) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_2i1_to_2i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: movzbl (%rdi), %eax ; AVX2-NEXT: movq %rax, %rcx ; AVX2-NEXT: shlq $62, %rcx @@ -1241,25 +1241,25 @@ define <2 x i64> @load_sext_2i1_to_2i64(<2 x i1> *%ptr) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: load_sext_2i1_to_2i64: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: movzbl (%rdi), %eax ; AVX512F-NEXT: kmovw %eax, %k1 ; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} -; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> +; AVX512F-NEXT: # kill: def %xmm0 killed %xmm0 killed %zmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: load_sext_2i1_to_2i64: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: movzbl (%rdi), %eax ; AVX512BW-NEXT: kmovd %eax, %k1 ; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} -; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> +; AVX512BW-NEXT: # kill: def %xmm0 killed %xmm0 killed %zmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_2i1_to_2i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: movzbl (%eax), %eax ; X32-SSE41-NEXT: movl %eax, %ecx @@ -1280,7 +1280,7 @@ entry: define <2 x i64> @load_sext_2i8_to_2i64(<2 x i8> *%ptr) { ; SSE2-LABEL: load_sext_2i8_to_2i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movzwl (%rdi), %eax ; SSE2-NEXT: movd %eax, %xmm0 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] @@ -1292,7 +1292,7 @@ define <2 x i64> @load_sext_2i8_to_2i64(<2 x i8> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_2i8_to_2i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movzwl (%rdi), %eax ; SSSE3-NEXT: movd %eax, %xmm0 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] @@ -1304,17 +1304,17 @@ define <2 x i64> @load_sext_2i8_to_2i64(<2 x i8> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_2i8_to_2i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: load_sext_2i8_to_2i64: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxbq (%rdi), %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_2i8_to_2i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 ; X32-SSE41-NEXT: retl @@ -1326,7 +1326,7 @@ entry: define <4 x i32> @load_sext_4i1_to_4i32(<4 x i1> *%ptr) { ; SSE2-LABEL: load_sext_4i1_to_4i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movzbl (%rdi), %eax ; SSE2-NEXT: movq %rax, %rcx ; SSE2-NEXT: shlq $60, %rcx @@ -1349,7 +1349,7 @@ define <4 x i32> @load_sext_4i1_to_4i32(<4 x i1> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_4i1_to_4i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movzbl (%rdi), %eax ; SSSE3-NEXT: movq %rax, %rcx ; SSSE3-NEXT: shlq $60, %rcx @@ -1372,7 +1372,7 @@ define <4 x i32> @load_sext_4i1_to_4i32(<4 x i1> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_4i1_to_4i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movzbl (%rdi), %eax ; SSE41-NEXT: movq %rax, %rcx ; SSE41-NEXT: shlq $62, %rcx @@ -1392,7 +1392,7 @@ define <4 x i32> @load_sext_4i1_to_4i32(<4 x i1> *%ptr) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_4i1_to_4i32: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: movzbl (%rdi), %eax ; AVX1-NEXT: movq %rax, %rcx ; AVX1-NEXT: shlq $62, %rcx @@ -1412,7 +1412,7 @@ define <4 x i32> @load_sext_4i1_to_4i32(<4 x i1> *%ptr) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_4i1_to_4i32: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: movzbl (%rdi), %eax ; AVX2-NEXT: movq %rax, %rcx ; AVX2-NEXT: shlq $62, %rcx @@ -1432,27 +1432,25 @@ define <4 x i32> @load_sext_4i1_to_4i32(<4 x i1> *%ptr) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: load_sext_4i1_to_4i32: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: movzbl (%rdi), %eax ; AVX512F-NEXT: kmovw %eax, %k1 -; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} -; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 -; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> +; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} +; AVX512F-NEXT: # kill: def %xmm0 killed %xmm0 killed %zmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: load_sext_4i1_to_4i32: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: movzbl (%rdi), %eax ; AVX512BW-NEXT: kmovd %eax, %k1 -; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} -; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 -; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> +; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} +; AVX512BW-NEXT: # kill: def %xmm0 killed %xmm0 killed %zmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_4i1_to_4i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: movl (%eax), %eax ; X32-SSE41-NEXT: movl %eax, %ecx @@ -1479,7 +1477,7 @@ entry: define <4 x i32> @load_sext_4i8_to_4i32(<4 x i8> *%ptr) { ; SSE2-LABEL: load_sext_4i8_to_4i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] @@ -1487,7 +1485,7 @@ define <4 x i32> @load_sext_4i8_to_4i32(<4 x i8> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_4i8_to_4i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] @@ -1495,17 +1493,17 @@ define <4 x i32> @load_sext_4i8_to_4i32(<4 x i8> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_4i8_to_4i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbd (%rdi), %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: load_sext_4i8_to_4i32: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxbd (%rdi), %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_4i8_to_4i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxbd (%eax), %xmm0 ; X32-SSE41-NEXT: retl @@ -1517,7 +1515,7 @@ entry: define <4 x i64> @load_sext_4i1_to_4i64(<4 x i1> *%ptr) { ; SSE2-LABEL: load_sext_4i1_to_4i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movl (%rdi), %eax ; SSE2-NEXT: movl %eax, %ecx ; SSE2-NEXT: shrl $3, %ecx @@ -1543,7 +1541,7 @@ define <4 x i64> @load_sext_4i1_to_4i64(<4 x i1> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_4i1_to_4i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movl (%rdi), %eax ; SSSE3-NEXT: movl %eax, %ecx ; SSSE3-NEXT: shrl $3, %ecx @@ -1569,7 +1567,7 @@ define <4 x i64> @load_sext_4i1_to_4i64(<4 x i1> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_4i1_to_4i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movl (%rdi), %eax ; SSE41-NEXT: movl %eax, %ecx ; SSE41-NEXT: shrl %ecx @@ -1592,7 +1590,7 @@ define <4 x i64> @load_sext_4i1_to_4i64(<4 x i1> *%ptr) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_4i1_to_4i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: movzbl (%rdi), %eax ; AVX1-NEXT: movq %rax, %rcx ; AVX1-NEXT: shlq $62, %rcx @@ -1616,7 +1614,7 @@ define <4 x i64> @load_sext_4i1_to_4i64(<4 x i1> *%ptr) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_4i1_to_4i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: movzbl (%rdi), %eax ; AVX2-NEXT: movq %rax, %rcx ; AVX2-NEXT: shlq $60, %rcx @@ -1639,23 +1637,23 @@ define <4 x i64> @load_sext_4i1_to_4i64(<4 x i1> *%ptr) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: load_sext_4i1_to_4i64: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: movzbl (%rdi), %eax ; AVX512F-NEXT: kmovw %eax, %k1 ; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} -; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> +; AVX512F-NEXT: # kill: def %ymm0 killed %ymm0 killed %zmm0 ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: load_sext_4i1_to_4i64: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: movzbl (%rdi), %eax ; AVX512BW-NEXT: kmovd %eax, %k1 ; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} -; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> +; AVX512BW-NEXT: # kill: def %ymm0 killed %ymm0 killed %zmm0 ; AVX512BW-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_4i1_to_4i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: movzbl (%eax), %eax ; X32-SSE41-NEXT: movl %eax, %ecx @@ -1685,7 +1683,7 @@ entry: define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) { ; SSE2-LABEL: load_sext_4i8_to_4i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movsbq 1(%rdi), %rax ; SSE2-NEXT: movq %rax, %xmm1 ; SSE2-NEXT: movsbq (%rdi), %rax @@ -1699,7 +1697,7 @@ define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_4i8_to_4i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movsbq 1(%rdi), %rax ; SSSE3-NEXT: movq %rax, %xmm1 ; SSSE3-NEXT: movsbq (%rdi), %rax @@ -1713,13 +1711,13 @@ define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_4i8_to_4i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 ; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm1 ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_4i8_to_4i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] @@ -1728,17 +1726,17 @@ define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_4i8_to_4i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: load_sext_4i8_to_4i64: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxbq (%rdi), %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_4i8_to_4i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 ; X32-SSE41-NEXT: pmovsxbq 2(%eax), %xmm1 @@ -1751,7 +1749,7 @@ entry: define <2 x i64> @load_sext_4i8_to_4i64_extract(<4 x i8> *%ptr) { ; SSE2-LABEL: load_sext_4i8_to_4i64_extract: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movsbq 3(%rdi), %rax ; SSE2-NEXT: movq %rax, %xmm1 ; SSE2-NEXT: movsbq 2(%rdi), %rax @@ -1760,7 +1758,7 @@ define <2 x i64> @load_sext_4i8_to_4i64_extract(<4 x i8> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_4i8_to_4i64_extract: -; SSSE3: # BB#0: +; SSSE3: # %bb.0: ; SSSE3-NEXT: movsbq 3(%rdi), %rax ; SSSE3-NEXT: movq %rax, %xmm1 ; SSSE3-NEXT: movsbq 2(%rdi), %rax @@ -1769,33 +1767,33 @@ define <2 x i64> @load_sext_4i8_to_4i64_extract(<4 x i8> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_4i8_to_4i64_extract: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_4i8_to_4i64_extract: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_4i8_to_4i64_extract: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq ; ; AVX512-LABEL: load_sext_4i8_to_4i64_extract: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpmovsxbq (%rdi), %ymm0 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm0 ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_4i8_to_4i64_extract: -; X32-SSE41: # BB#0: +; X32-SSE41: # %bb.0: ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxbq 2(%eax), %xmm0 ; X32-SSE41-NEXT: retl @@ -1807,7 +1805,7 @@ define <2 x i64> @load_sext_4i8_to_4i64_extract(<4 x i8> *%ptr) { define <8 x i16> @load_sext_8i1_to_8i16(<8 x i1> *%ptr) { ; SSE2-LABEL: load_sext_8i1_to_8i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movsbq (%rdi), %rax ; SSE2-NEXT: movq %rax, %rcx ; SSE2-NEXT: shrq $7, %rcx @@ -1849,7 +1847,7 @@ define <8 x i16> @load_sext_8i1_to_8i16(<8 x i1> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_8i1_to_8i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movsbq (%rdi), %rax ; SSSE3-NEXT: movq %rax, %rcx ; SSSE3-NEXT: shrq $7, %rcx @@ -1891,7 +1889,7 @@ define <8 x i16> @load_sext_8i1_to_8i16(<8 x i1> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_8i1_to_8i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movsbq (%rdi), %rax ; SSE41-NEXT: movq %rax, %rcx ; SSE41-NEXT: shlq $62, %rcx @@ -1926,7 +1924,7 @@ define <8 x i16> @load_sext_8i1_to_8i16(<8 x i1> *%ptr) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_8i1_to_8i16: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: movsbq (%rdi), %rax ; AVX1-NEXT: movq %rax, %rcx ; AVX1-NEXT: shlq $62, %rcx @@ -1961,7 +1959,7 @@ define <8 x i16> @load_sext_8i1_to_8i16(<8 x i1> *%ptr) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_8i1_to_8i16: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: movsbq (%rdi), %rax ; AVX2-NEXT: movq %rax, %rcx ; AVX2-NEXT: shlq $62, %rcx @@ -1996,25 +1994,26 @@ define <8 x i16> @load_sext_8i1_to_8i16(<8 x i1> *%ptr) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: load_sext_8i1_to_8i16: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: movzbl (%rdi), %eax ; AVX512F-NEXT: kmovw %eax, %k1 -; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} -; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 +; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} +; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 +; AVX512F-NEXT: # kill: def %xmm0 killed %xmm0 killed %ymm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: load_sext_8i1_to_8i16: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: movzbl (%rdi), %eax ; AVX512BW-NEXT: kmovd %eax, %k0 ; AVX512BW-NEXT: vpmovm2w %k0, %zmm0 -; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> +; AVX512BW-NEXT: # kill: def %xmm0 killed %xmm0 killed %zmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_8i1_to_8i16: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: movsbl (%eax), %eax ; X32-SSE41-NEXT: movl %eax, %ecx @@ -2056,31 +2055,31 @@ entry: define <8 x i16> @load_sext_8i8_to_8i16(<8 x i8> *%ptr) { ; SSE2-LABEL: load_sext_8i8_to_8i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: psraw $8, %xmm0 ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_8i8_to_8i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSSE3-NEXT: psraw $8, %xmm0 ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_8i8_to_8i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbw (%rdi), %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: load_sext_8i8_to_8i16: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxbw (%rdi), %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_8i8_to_8i16: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxbw (%eax), %xmm0 ; X32-SSE41-NEXT: retl @@ -2092,7 +2091,7 @@ entry: define <8 x i64> @load_sext_8i8_to_8i64(<8 x i8> *%ptr) { ; SSE2-LABEL: load_sext_8i8_to_8i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movsbq 1(%rdi), %rax ; SSE2-NEXT: movq %rax, %xmm1 ; SSE2-NEXT: movsbq (%rdi), %rax @@ -2116,7 +2115,7 @@ define <8 x i64> @load_sext_8i8_to_8i64(<8 x i8> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_8i8_to_8i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movsbq 1(%rdi), %rax ; SSSE3-NEXT: movq %rax, %xmm1 ; SSSE3-NEXT: movsbq (%rdi), %rax @@ -2140,7 +2139,7 @@ define <8 x i64> @load_sext_8i8_to_8i64(<8 x i8> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_8i8_to_8i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 ; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm1 ; SSE41-NEXT: pmovsxbq 4(%rdi), %xmm2 @@ -2148,7 +2147,7 @@ define <8 x i64> @load_sext_8i8_to_8i64(<8 x i8> *%ptr) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_8i8_to_8i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] @@ -2162,18 +2161,18 @@ define <8 x i64> @load_sext_8i8_to_8i64(<8 x i8> *%ptr) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_8i8_to_8i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0 ; AVX2-NEXT: vpmovsxbq 4(%rdi), %ymm1 ; AVX2-NEXT: retq ; ; AVX512-LABEL: load_sext_8i8_to_8i64: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxbq (%rdi), %zmm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_8i8_to_8i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 ; X32-SSE41-NEXT: pmovsxbq 2(%eax), %xmm1 @@ -2188,7 +2187,7 @@ entry: define <8 x i32> @load_sext_8i1_to_8i32(<8 x i1> *%ptr) { ; SSE2-LABEL: load_sext_8i1_to_8i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movzbl (%rdi), %eax ; SSE2-NEXT: movl %eax, %ecx ; SSE2-NEXT: shrl $3, %ecx @@ -2237,7 +2236,7 @@ define <8 x i32> @load_sext_8i1_to_8i32(<8 x i1> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_8i1_to_8i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movzbl (%rdi), %eax ; SSSE3-NEXT: movl %eax, %ecx ; SSSE3-NEXT: shrl $3, %ecx @@ -2286,7 +2285,7 @@ define <8 x i32> @load_sext_8i1_to_8i32(<8 x i1> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_8i1_to_8i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movzbl (%rdi), %eax ; SSE41-NEXT: movl %eax, %ecx ; SSE41-NEXT: shrl %ecx @@ -2327,7 +2326,7 @@ define <8 x i32> @load_sext_8i1_to_8i32(<8 x i1> *%ptr) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_8i1_to_8i32: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: movsbq (%rdi), %rax ; AVX1-NEXT: movq %rax, %rcx ; AVX1-NEXT: shlq $58, %rcx @@ -2363,7 +2362,7 @@ define <8 x i32> @load_sext_8i1_to_8i32(<8 x i1> *%ptr) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_8i1_to_8i32: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: movsbq (%rdi), %rax ; AVX2-NEXT: movq %rax, %rcx ; AVX2-NEXT: shlq $58, %rcx @@ -2399,23 +2398,23 @@ define <8 x i32> @load_sext_8i1_to_8i32(<8 x i1> *%ptr) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: load_sext_8i1_to_8i32: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: movzbl (%rdi), %eax ; AVX512F-NEXT: kmovw %eax, %k1 -; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} -; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 +; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} +; AVX512F-NEXT: # kill: def %ymm0 killed %ymm0 killed %zmm0 ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: load_sext_8i1_to_8i32: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: movzbl (%rdi), %eax ; AVX512BW-NEXT: kmovd %eax, %k1 -; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} -; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 +; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} +; AVX512BW-NEXT: # kill: def %ymm0 killed %ymm0 killed %zmm0 ; AVX512BW-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_8i1_to_8i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: movzbl (%eax), %eax ; X32-SSE41-NEXT: movl %eax, %ecx @@ -2462,7 +2461,7 @@ entry: define <8 x i32> @load_sext_8i8_to_8i32(<8 x i8> *%ptr) { ; SSE2-LABEL: load_sext_8i8_to_8i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] @@ -2474,7 +2473,7 @@ define <8 x i32> @load_sext_8i8_to_8i32(<8 x i8> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_8i8_to_8i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] @@ -2486,13 +2485,13 @@ define <8 x i32> @load_sext_8i8_to_8i32(<8 x i8> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_8i8_to_8i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbd (%rdi), %xmm0 ; SSE41-NEXT: pmovsxbd 4(%rdi), %xmm1 ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_8i8_to_8i32: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0 ; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] @@ -2501,17 +2500,17 @@ define <8 x i32> @load_sext_8i8_to_8i32(<8 x i8> *%ptr) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_8i8_to_8i32: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxbd (%rdi), %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: load_sext_8i8_to_8i32: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxbd (%rdi), %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_8i8_to_8i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxbd (%eax), %xmm0 ; X32-SSE41-NEXT: pmovsxbd 4(%eax), %xmm1 @@ -2524,7 +2523,7 @@ entry: define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone { ; SSE2-LABEL: load_sext_16i1_to_16i8: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pushq %rbp ; SSE2-NEXT: pushq %r15 ; SSE2-NEXT: pushq %r14 @@ -2618,7 +2617,7 @@ define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_16i1_to_16i8: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: pushq %rbp ; SSSE3-NEXT: pushq %r15 ; SSSE3-NEXT: pushq %r14 @@ -2712,7 +2711,7 @@ define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_16i1_to_16i8: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movswq (%rdi), %rax ; SSE41-NEXT: movq %rax, %rcx ; SSE41-NEXT: shlq $62, %rcx @@ -2778,7 +2777,7 @@ define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone { ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_16i1_to_16i8: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: movswq (%rdi), %rax ; AVX1-NEXT: movq %rax, %rcx ; AVX1-NEXT: shlq $62, %rcx @@ -2844,7 +2843,7 @@ define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_16i1_to_16i8: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: movswq (%rdi), %rax ; AVX2-NEXT: movq %rax, %rcx ; AVX2-NEXT: shlq $62, %rcx @@ -2910,7 +2909,7 @@ define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: load_sext_16i1_to_16i8: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: kmovw (%rdi), %k1 ; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 @@ -2918,15 +2917,15 @@ define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone { ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: load_sext_16i1_to_16i8: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: kmovw (%rdi), %k0 ; AVX512BW-NEXT: vpmovm2b %k0, %zmm0 -; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> +; AVX512BW-NEXT: # kill: def %xmm0 killed %xmm0 killed %zmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_16i1_to_16i8: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: movswl (%eax), %eax ; X32-SSE41-NEXT: movl %eax, %ecx @@ -2999,7 +2998,7 @@ entry: define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) { ; SSE2-LABEL: load_sext_16i1_to_16i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movzwl (%rdi), %eax ; SSE2-NEXT: movl %eax, %ecx ; SSE2-NEXT: shrl $7, %ecx @@ -3088,7 +3087,7 @@ define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_16i1_to_16i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movzwl (%rdi), %eax ; SSSE3-NEXT: movl %eax, %ecx ; SSSE3-NEXT: shrl $7, %ecx @@ -3177,7 +3176,7 @@ define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_16i1_to_16i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movzwl (%rdi), %eax ; SSE41-NEXT: movl %eax, %ecx ; SSE41-NEXT: shrl %ecx @@ -3250,36 +3249,24 @@ define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_16i1_to_16i16: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: pushq %rbp -; AVX1-NEXT: .Lcfi0: ; AVX1-NEXT: .cfi_def_cfa_offset 16 ; AVX1-NEXT: pushq %r15 -; AVX1-NEXT: .Lcfi1: ; AVX1-NEXT: .cfi_def_cfa_offset 24 ; AVX1-NEXT: pushq %r14 -; AVX1-NEXT: .Lcfi2: ; AVX1-NEXT: .cfi_def_cfa_offset 32 ; AVX1-NEXT: pushq %r13 -; AVX1-NEXT: .Lcfi3: ; AVX1-NEXT: .cfi_def_cfa_offset 40 ; AVX1-NEXT: pushq %r12 -; AVX1-NEXT: .Lcfi4: ; AVX1-NEXT: .cfi_def_cfa_offset 48 ; AVX1-NEXT: pushq %rbx -; AVX1-NEXT: .Lcfi5: ; AVX1-NEXT: .cfi_def_cfa_offset 56 -; AVX1-NEXT: .Lcfi6: ; AVX1-NEXT: .cfi_offset %rbx, -56 -; AVX1-NEXT: .Lcfi7: ; AVX1-NEXT: .cfi_offset %r12, -48 -; AVX1-NEXT: .Lcfi8: ; AVX1-NEXT: .cfi_offset %r13, -40 -; AVX1-NEXT: .Lcfi9: ; AVX1-NEXT: .cfi_offset %r14, -32 -; AVX1-NEXT: .Lcfi10: ; AVX1-NEXT: .cfi_offset %r15, -24 -; AVX1-NEXT: .Lcfi11: ; AVX1-NEXT: .cfi_offset %rbp, -16 ; AVX1-NEXT: movswq (%rdi), %rax ; AVX1-NEXT: movq %rax, %rcx @@ -3353,36 +3340,24 @@ define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_16i1_to_16i16: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: pushq %rbp -; AVX2-NEXT: .Lcfi0: ; AVX2-NEXT: .cfi_def_cfa_offset 16 ; AVX2-NEXT: pushq %r15 -; AVX2-NEXT: .Lcfi1: ; AVX2-NEXT: .cfi_def_cfa_offset 24 ; AVX2-NEXT: pushq %r14 -; AVX2-NEXT: .Lcfi2: ; AVX2-NEXT: .cfi_def_cfa_offset 32 ; AVX2-NEXT: pushq %r13 -; AVX2-NEXT: .Lcfi3: ; AVX2-NEXT: .cfi_def_cfa_offset 40 ; AVX2-NEXT: pushq %r12 -; AVX2-NEXT: .Lcfi4: ; AVX2-NEXT: .cfi_def_cfa_offset 48 ; AVX2-NEXT: pushq %rbx -; AVX2-NEXT: .Lcfi5: ; AVX2-NEXT: .cfi_def_cfa_offset 56 -; AVX2-NEXT: .Lcfi6: ; AVX2-NEXT: .cfi_offset %rbx, -56 -; AVX2-NEXT: .Lcfi7: ; AVX2-NEXT: .cfi_offset %r12, -48 -; AVX2-NEXT: .Lcfi8: ; AVX2-NEXT: .cfi_offset %r13, -40 -; AVX2-NEXT: .Lcfi9: ; AVX2-NEXT: .cfi_offset %r14, -32 -; AVX2-NEXT: .Lcfi10: ; AVX2-NEXT: .cfi_offset %r15, -24 -; AVX2-NEXT: .Lcfi11: ; AVX2-NEXT: .cfi_offset %rbp, -16 ; AVX2-NEXT: movswq (%rdi), %rax ; AVX2-NEXT: movq %rax, %rcx @@ -3456,21 +3431,21 @@ define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: load_sext_16i1_to_16i16: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: kmovw (%rdi), %k1 ; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} ; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: load_sext_16i1_to_16i16: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: kmovw (%rdi), %k0 ; AVX512BW-NEXT: vpmovm2w %k0, %zmm0 -; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> +; AVX512BW-NEXT: # kill: def %ymm0 killed %ymm0 killed %zmm0 ; AVX512BW-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_16i1_to_16i16: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: movzwl (%eax), %eax ; X32-SSE41-NEXT: movl %eax, %ecx @@ -3549,7 +3524,7 @@ entry: define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone { ; SSE2-LABEL: load_sext_32i1_to_32i8: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pushq %rbp ; SSE2-NEXT: pushq %r15 ; SSE2-NEXT: pushq %r14 @@ -3721,7 +3696,7 @@ define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_32i1_to_32i8: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: pushq %rbp ; SSSE3-NEXT: pushq %r15 ; SSSE3-NEXT: pushq %r14 @@ -3893,7 +3868,7 @@ define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_32i1_to_32i8: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movswq (%rdi), %rax ; SSE41-NEXT: movq %rax, %rcx ; SSE41-NEXT: shlq $62, %rcx @@ -4021,7 +3996,7 @@ define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone { ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_32i1_to_32i8: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: pushq %rbp ; AVX1-NEXT: pushq %r15 ; AVX1-NEXT: pushq %r14 @@ -4164,7 +4139,7 @@ define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_32i1_to_32i8: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: pushq %rbp ; AVX2-NEXT: pushq %r15 ; AVX2-NEXT: pushq %r14 @@ -4307,7 +4282,7 @@ define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: load_sext_32i1_to_32i8: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: kmovw (%rdi), %k1 ; AVX512F-NEXT: kmovw 2(%rdi), %k2 ; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} @@ -4318,14 +4293,14 @@ define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone { ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: load_sext_32i1_to_32i8: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: kmovd (%rdi), %k0 ; AVX512BW-NEXT: vpmovm2b %k0, %zmm0 -; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> +; AVX512BW-NEXT: # kill: def %ymm0 killed %ymm0 killed %zmm0 ; AVX512BW-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_32i1_to_32i8: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pushl %esi ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: movswl (%eax), %ecx @@ -4462,7 +4437,7 @@ entry: define <16 x i16> @load_sext_16i8_to_16i16(<16 x i8> *%ptr) { ; SSE2-LABEL: load_sext_16i8_to_16i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: psraw $8, %xmm0 @@ -4472,7 +4447,7 @@ define <16 x i16> @load_sext_16i8_to_16i16(<16 x i8> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_16i8_to_16i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSSE3-NEXT: psraw $8, %xmm0 @@ -4482,30 +4457,30 @@ define <16 x i16> @load_sext_16i8_to_16i16(<16 x i8> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_16i8_to_16i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbw (%rdi), %xmm0 ; SSE41-NEXT: pmovsxbw 8(%rdi), %xmm1 ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_16i8_to_16i16: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0 ; AVX1-NEXT: vpmovsxbw 8(%rdi), %xmm1 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_16i8_to_16i16: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxbw (%rdi), %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: load_sext_16i8_to_16i16: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxbw (%rdi), %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_16i8_to_16i16: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxbw (%eax), %xmm0 ; X32-SSE41-NEXT: pmovsxbw 8(%eax), %xmm1 @@ -4518,7 +4493,7 @@ entry: define <2 x i64> @load_sext_2i16_to_2i64(<2 x i16> *%ptr) { ; SSE2-LABEL: load_sext_2i16_to_2i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,1,4,5,6,7] ; SSE2-NEXT: movdqa %xmm0, %xmm1 @@ -4528,7 +4503,7 @@ define <2 x i64> @load_sext_2i16_to_2i64(<2 x i16> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_2i16_to_2i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,1,4,5,6,7] ; SSSE3-NEXT: movdqa %xmm0, %xmm1 @@ -4538,17 +4513,17 @@ define <2 x i64> @load_sext_2i16_to_2i64(<2 x i16> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_2i16_to_2i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxwq (%rdi), %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: load_sext_2i16_to_2i64: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxwq (%rdi), %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_2i16_to_2i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxwq (%eax), %xmm0 ; X32-SSE41-NEXT: retl @@ -4560,31 +4535,31 @@ entry: define <4 x i32> @load_sext_4i16_to_4i32(<4 x i16> *%ptr) { ; SSE2-LABEL: load_sext_4i16_to_4i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSE2-NEXT: psrad $16, %xmm0 ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_4i16_to_4i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSSE3-NEXT: psrad $16, %xmm0 ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_4i16_to_4i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxwd (%rdi), %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: load_sext_4i16_to_4i32: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxwd (%rdi), %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_4i16_to_4i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxwd (%eax), %xmm0 ; X32-SSE41-NEXT: retl @@ -4596,7 +4571,7 @@ entry: define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) { ; SSE2-LABEL: load_sext_4i16_to_4i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movswq 2(%rdi), %rax ; SSE2-NEXT: movq %rax, %xmm1 ; SSE2-NEXT: movswq (%rdi), %rax @@ -4610,7 +4585,7 @@ define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_4i16_to_4i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movswq 2(%rdi), %rax ; SSSE3-NEXT: movq %rax, %xmm1 ; SSSE3-NEXT: movswq (%rdi), %rax @@ -4624,13 +4599,13 @@ define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_4i16_to_4i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxwq (%rdi), %xmm0 ; SSE41-NEXT: pmovsxwq 4(%rdi), %xmm1 ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_4i16_to_4i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] @@ -4639,17 +4614,17 @@ define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_4i16_to_4i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxwq (%rdi), %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: load_sext_4i16_to_4i64: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxwq (%rdi), %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_4i16_to_4i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxwq (%eax), %xmm0 ; X32-SSE41-NEXT: pmovsxwq 4(%eax), %xmm1 @@ -4662,7 +4637,7 @@ entry: define <8 x i32> @load_sext_8i16_to_8i32(<8 x i16> *%ptr) { ; SSE2-LABEL: load_sext_8i16_to_8i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSE2-NEXT: psrad $16, %xmm0 @@ -4672,7 +4647,7 @@ define <8 x i32> @load_sext_8i16_to_8i32(<8 x i16> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_8i16_to_8i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] ; SSSE3-NEXT: psrad $16, %xmm0 @@ -4682,30 +4657,30 @@ define <8 x i32> @load_sext_8i16_to_8i32(<8 x i16> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_8i16_to_8i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxwd (%rdi), %xmm0 ; SSE41-NEXT: pmovsxwd 8(%rdi), %xmm1 ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_8i16_to_8i32: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0 ; AVX1-NEXT: vpmovsxwd 8(%rdi), %xmm1 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_8i16_to_8i32: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxwd (%rdi), %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: load_sext_8i16_to_8i32: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxwd (%rdi), %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_8i16_to_8i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxwd (%eax), %xmm0 ; X32-SSE41-NEXT: pmovsxwd 8(%eax), %xmm1 @@ -4718,7 +4693,7 @@ entry: define <2 x i64> @load_sext_2i32_to_2i64(<2 x i32> *%ptr) { ; SSE2-LABEL: load_sext_2i32_to_2i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; SSE2-NEXT: movdqa %xmm0, %xmm1 ; SSE2-NEXT: psrad $31, %xmm1 @@ -4726,7 +4701,7 @@ define <2 x i64> @load_sext_2i32_to_2i64(<2 x i32> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_2i32_to_2i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; SSSE3-NEXT: movdqa %xmm0, %xmm1 ; SSSE3-NEXT: psrad $31, %xmm1 @@ -4734,17 +4709,17 @@ define <2 x i64> @load_sext_2i32_to_2i64(<2 x i32> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_2i32_to_2i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxdq (%rdi), %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: load_sext_2i32_to_2i64: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxdq (%rdi), %xmm0 ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_2i32_to_2i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxdq (%eax), %xmm0 ; X32-SSE41-NEXT: retl @@ -4756,7 +4731,7 @@ entry: define <4 x i64> @load_sext_4i32_to_4i64(<4 x i32> *%ptr) { ; SSE2-LABEL: load_sext_4i32_to_4i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movdqa (%rdi), %xmm0 ; SSE2-NEXT: movdqa %xmm0, %xmm2 ; SSE2-NEXT: psrad $31, %xmm2 @@ -4768,7 +4743,7 @@ define <4 x i64> @load_sext_4i32_to_4i64(<4 x i32> *%ptr) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: load_sext_4i32_to_4i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa (%rdi), %xmm0 ; SSSE3-NEXT: movdqa %xmm0, %xmm2 ; SSSE3-NEXT: psrad $31, %xmm2 @@ -4780,30 +4755,30 @@ define <4 x i64> @load_sext_4i32_to_4i64(<4 x i32> *%ptr) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: load_sext_4i32_to_4i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxdq (%rdi), %xmm0 ; SSE41-NEXT: pmovsxdq 8(%rdi), %xmm1 ; SSE41-NEXT: retq ; ; AVX1-LABEL: load_sext_4i32_to_4i64: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vpmovsxdq (%rdi), %xmm0 ; AVX1-NEXT: vpmovsxdq 8(%rdi), %xmm1 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: load_sext_4i32_to_4i64: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpmovsxdq (%rdi), %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: load_sext_4i32_to_4i64: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovsxdq (%rdi), %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: load_sext_4i32_to_4i64: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-SSE41-NEXT: pmovsxdq (%eax), %xmm0 ; X32-SSE41-NEXT: pmovsxdq 8(%eax), %xmm1 @@ -4816,35 +4791,34 @@ entry: define i32 @sext_2i8_to_i32(<16 x i8> %A) nounwind uwtable readnone ssp { ; SSE2-LABEL: sext_2i8_to_i32: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: psraw $8, %xmm0 ; SSE2-NEXT: movd %xmm0, %eax ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_2i8_to_i32: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSSE3-NEXT: psraw $8, %xmm0 ; SSSE3-NEXT: movd %xmm0, %eax ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_2i8_to_i32: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pmovsxbw %xmm0, %xmm0 ; SSE41-NEXT: movd %xmm0, %eax ; SSE41-NEXT: retq ; ; AVX-LABEL: sext_2i8_to_i32: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpmovsxbw %xmm0, %xmm0 ; AVX-NEXT: vmovd %xmm0, %eax ; AVX-NEXT: retq ; ; X32-SSE41-LABEL: sext_2i8_to_i32: -; X32-SSE41: # BB#0: # %entry +; X32-SSE41: # %bb.0: # %entry ; X32-SSE41-NEXT: pushl %eax -; X32-SSE41-NEXT: .Lcfi0: ; X32-SSE41-NEXT: .cfi_def_cfa_offset 8 ; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm0 ; X32-SSE41-NEXT: movd %xmm0, %eax @@ -4859,7 +4833,7 @@ entry: define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) { ; SSE2-LABEL: sext_4i1_to_4i64: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: pslld $31, %xmm0 ; SSE2-NEXT: psrad $31, %xmm0 ; SSE2-NEXT: movdqa %xmm0, %xmm2 @@ -4872,7 +4846,7 @@ define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_4i1_to_4i64: -; SSSE3: # BB#0: +; SSSE3: # %bb.0: ; SSSE3-NEXT: pslld $31, %xmm0 ; SSSE3-NEXT: psrad $31, %xmm0 ; SSSE3-NEXT: movdqa %xmm0, %xmm2 @@ -4885,7 +4859,7 @@ define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_4i1_to_4i64: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pslld $31, %xmm0 ; SSE41-NEXT: psrad $31, %xmm0 ; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 @@ -4895,7 +4869,7 @@ define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_4i1_to_4i64: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpslld $31, %xmm0, %xmm0 ; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 @@ -4905,21 +4879,21 @@ define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_4i1_to_4i64: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpslld $31, %xmm0, %xmm0 ; AVX2-NEXT: vpsrad $31, %xmm0, %xmm0 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_4i1_to_4i64: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpslld $31, %xmm0, %xmm0 ; AVX512-NEXT: vpsrad $31, %xmm0, %xmm0 ; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_4i1_to_4i64: -; X32-SSE41: # BB#0: +; X32-SSE41: # %bb.0: ; X32-SSE41-NEXT: pslld $31, %xmm0 ; X32-SSE41-NEXT: psrad $31, %xmm0 ; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 @@ -4933,7 +4907,7 @@ define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) { define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) { ; SSE2-LABEL: sext_4i8_to_4i64: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: pslld $24, %xmm0 ; SSE2-NEXT: psrad $24, %xmm0 ; SSE2-NEXT: movdqa %xmm0, %xmm2 @@ -4946,7 +4920,7 @@ define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: sext_4i8_to_4i64: -; SSSE3: # BB#0: +; SSSE3: # %bb.0: ; SSSE3-NEXT: pslld $24, %xmm0 ; SSSE3-NEXT: psrad $24, %xmm0 ; SSSE3-NEXT: movdqa %xmm0, %xmm2 @@ -4959,7 +4933,7 @@ define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: sext_4i8_to_4i64: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pslld $24, %xmm0 ; SSE41-NEXT: psrad $24, %xmm0 ; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 @@ -4969,7 +4943,7 @@ define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: sext_4i8_to_4i64: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpslld $24, %xmm0, %xmm0 ; AVX1-NEXT: vpsrad $24, %xmm0, %xmm0 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 @@ -4979,21 +4953,21 @@ define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_4i8_to_4i64: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpslld $24, %xmm0, %xmm0 ; AVX2-NEXT: vpsrad $24, %xmm0, %xmm0 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: sext_4i8_to_4i64: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpslld $24, %xmm0, %xmm0 ; AVX512-NEXT: vpsrad $24, %xmm0, %xmm0 ; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 ; AVX512-NEXT: retq ; ; X32-SSE41-LABEL: sext_4i8_to_4i64: -; X32-SSE41: # BB#0: +; X32-SSE41: # %bb.0: ; X32-SSE41-NEXT: pslld $24, %xmm0 ; X32-SSE41-NEXT: psrad $24, %xmm0 ; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 @@ -5007,7 +4981,7 @@ define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) { define <32 x i8> @sext_32xi1_to_32xi8(<32 x i16> %c1, <32 x i16> %c2)nounwind { ; SSE-LABEL: sext_32xi1_to_32xi8: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pcmpeqw %xmm5, %xmm1 ; SSE-NEXT: pcmpeqw %xmm4, %xmm0 ; SSE-NEXT: packsswb %xmm1, %xmm0 @@ -5018,7 +4992,7 @@ define <32 x i8> @sext_32xi1_to_32xi8(<32 x i16> %c1, <32 x i16> %c2)nounwind { ; SSE-NEXT: retq ; ; AVX1-LABEL: sext_32xi1_to_32xi8: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5 ; AVX1-NEXT: vpcmpeqw %xmm4, %xmm5, %xmm4 @@ -5033,7 +5007,7 @@ define <32 x i8> @sext_32xi1_to_32xi8(<32 x i16> %c1, <32 x i16> %c2)nounwind { ; AVX1-NEXT: retq ; ; AVX2-LABEL: sext_32xi1_to_32xi8: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 ; AVX2-NEXT: vpcmpeqw %ymm2, %ymm0, %ymm0 ; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 @@ -5041,7 +5015,7 @@ define <32 x i8> @sext_32xi1_to_32xi8(<32 x i16> %c1, <32 x i16> %c2)nounwind { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: sext_32xi1_to_32xi8: -; AVX512F: # BB#0: +; AVX512F: # %bb.0: ; AVX512F-NEXT: vpcmpeqw %ymm2, %ymm0, %ymm0 ; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 @@ -5052,14 +5026,14 @@ define <32 x i8> @sext_32xi1_to_32xi8(<32 x i16> %c1, <32 x i16> %c2)nounwind { ; AVX512F-NEXT: retq ; ; AVX512BW-LABEL: sext_32xi1_to_32xi8: -; AVX512BW: # BB#0: +; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 ; AVX512BW-NEXT: vpmovm2b %k0, %zmm0 -; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> +; AVX512BW-NEXT: # kill: def %ymm0 killed %ymm0 killed %zmm0 ; AVX512BW-NEXT: retq ; ; X32-SSE41-LABEL: sext_32xi1_to_32xi8: -; X32-SSE41: # BB#0: +; X32-SSE41: # %bb.0: ; X32-SSE41-NEXT: pushl %ebp ; X32-SSE41-NEXT: movl %esp, %ebp ; X32-SSE41-NEXT: andl $-16, %esp @@ -5079,3 +5053,51 @@ define <32 x i8> @sext_32xi1_to_32xi8(<32 x i16> %c1, <32 x i16> %c2)nounwind { %b = sext <32 x i1> %a to <32 x i8> ret <32 x i8> %b } + +define <2 x i32> @sext_2i8_to_2i32(<2 x i8>* %addr) { +; SSE2-LABEL: sext_2i8_to_2i32: +; SSE2: # %bb.0: +; SSE2-NEXT: movzwl (%rdi), %eax +; SSE2-NEXT: movd %eax, %xmm0 +; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] +; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] +; SSE2-NEXT: psrad $24, %xmm0 +; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3] +; SSE2-NEXT: paddq %xmm0, %xmm0 +; SSE2-NEXT: retq +; +; SSSE3-LABEL: sext_2i8_to_2i32: +; SSSE3: # %bb.0: +; SSSE3-NEXT: movzwl (%rdi), %eax +; SSSE3-NEXT: movd %eax, %xmm0 +; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] +; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] +; SSSE3-NEXT: psrad $24, %xmm0 +; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3] +; SSSE3-NEXT: paddq %xmm0, %xmm0 +; SSSE3-NEXT: retq +; +; SSE41-LABEL: sext_2i8_to_2i32: +; SSE41: # %bb.0: +; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 +; SSE41-NEXT: paddq %xmm0, %xmm0 +; SSE41-NEXT: retq +; +; AVX-LABEL: sext_2i8_to_2i32: +; AVX: # %bb.0: +; AVX-NEXT: vpmovsxbq (%rdi), %xmm0 +; AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm0 +; AVX-NEXT: retq +; +; X32-SSE41-LABEL: sext_2i8_to_2i32: +; X32-SSE41: # %bb.0: +; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 +; X32-SSE41-NEXT: paddq %xmm0, %xmm0 +; X32-SSE41-NEXT: retl + %x = load <2 x i8>, <2 x i8>* %addr, align 1 + %y = sext <2 x i8> %x to <2 x i32> + %z = add <2 x i32>%y, %y + ret <2 x i32>%z +} + |