diff options
Diffstat (limited to 'test/CodeGen/builtins-arm.c')
-rw-r--r-- | test/CodeGen/builtins-arm.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/test/CodeGen/builtins-arm.c b/test/CodeGen/builtins-arm.c index 9f3ed9ac78a1..2b81856e6b48 100644 --- a/test/CodeGen/builtins-arm.c +++ b/test/CodeGen/builtins-arm.c @@ -84,3 +84,42 @@ void prefetch(int i) { __builtin_arm_prefetch(&i, 1, 0); // CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0) } + +unsigned rsr() { + // CHECK: [[V0:[%A-Za-z0-9.]+]] = {{.*}} call i32 @llvm.read_register.i32(metadata !7) + // CHECK-NEXT: ret i32 [[V0]] + return __builtin_arm_rsr("cp1:2:c3:c4:5"); +} + +unsigned long long rsr64() { + // CHECK: [[V0:[%A-Za-z0-9.]+]] = {{.*}} call i64 @llvm.read_register.i64(metadata !8) + // CHECK-NEXT: ret i64 [[V0]] + return __builtin_arm_rsr64("cp1:2:c3"); +} + +void *rsrp() { + // CHECK: [[V0:[%A-Za-z0-9.]+]] = {{.*}} call i32 @llvm.read_register.i32(metadata !9) + // CHECK-NEXT: [[V1:[%A-Za-z0-9.]+]] = inttoptr i32 [[V0]] to i8* + // CHECK-NEXT: ret i8* [[V1]] + return __builtin_arm_rsrp("sysreg"); +} + +void wsr(unsigned v) { + // CHECK: call void @llvm.write_register.i32(metadata !7, i32 %v) + __builtin_arm_wsr("cp1:2:c3:c4:5", v); +} + +void wsr64(unsigned long long v) { + // CHECK: call void @llvm.write_register.i64(metadata !8, i64 %v) + __builtin_arm_wsr64("cp1:2:c3", v); +} + +void wsrp(void *v) { + // CHECK: [[V0:[%A-Za-z0-9.]+]] = ptrtoint i8* %v to i32 + // CHECK-NEXT: call void @llvm.write_register.i32(metadata !9, i32 [[V0]]) + __builtin_arm_wsrp("sysreg", v); +} + +// CHECK: !7 = !{!"cp1:2:c3:c4:5"} +// CHECK: !8 = !{!"cp1:2:c3"} +// CHECK: !9 = !{!"sysreg"} |