6 files changed, 46 insertions, 18 deletions
diff --git a/test/CodeGen/always_inline.c b/test/CodeGen/always_inline.c
index 19d93d9db066..8e4a7c70b183 100644
--- a/test/CodeGen/always_inline.c
+++ b/test/CodeGen/always_inline.c
@@ -1,7 +1,7 @@
 // RUN: %clang -emit-llvm -S -o %t %s
 // RUN: not grep '@f0' %t
 // RUN: not grep 'call ' %t
-// RUN: %clang -mllvm -disable-llvm-passes -emit-llvm -S -o %t %s
+// RUN: %clang -Xclang -disable-llvm-passes -emit-llvm -S -o %t %s
 // RUN: grep '@f0' %t | count 2
 
 //static int f0() { 
diff --git a/test/CodeGen/arm_acle.c b/test/CodeGen/arm_acle.c
index 0884394fbf19..b4f39bef1572 100644
--- a/test/CodeGen/arm_acle.c
+++ b/test/CodeGen/arm_acle.c
@@ -244,23 +244,23 @@ int16_t test_revsh(int16_t t) {
 }
 
 // ARM-LABEL: test_rbit
-// AArch32: call i32 @llvm.arm.rbit
-// AArch64: call i32 @llvm.aarch64.rbit.i32
+// AArch32: call i32 @llvm.bitreverse.i32
+// AArch64: call i32 @llvm.bitreverse.i32
 uint32_t test_rbit(uint32_t t) {
   return __rbit(t);
 }
 
 // ARM-LABEL: test_rbitl
-// AArch32: call i32 @llvm.arm.rbit
-// AArch64: call i64 @llvm.aarch64.rbit.i64
+// AArch32: call i32 @llvm.bitreverse.i32
+// AArch64: call i64 @llvm.bitreverse.i64
 long test_rbitl(long t) {
   return __rbitl(t);
 }
 
 // ARM-LABEL: test_rbitll
-// AArch32: call i32 @llvm.arm.rbit
-// AArch32: call i32 @llvm.arm.rbit
-// AArch64: call i64 @llvm.aarch64.rbit.i64
+// AArch32: call i32 @llvm.bitreverse.i32
+// AArch32: call i32 @llvm.bitreverse.i32
+// AArch64: call i64 @llvm.bitreverse.i64
 uint64_t test_rbitll(uint64_t t) {
   return __rbitll(t);
 }
diff --git a/test/CodeGen/builtins-arm.c b/test/CodeGen/builtins-arm.c
index a385bd27546a..0dc4c7dd7790 100644
--- a/test/CodeGen/builtins-arm.c
+++ b/test/CodeGen/builtins-arm.c
@@ -68,7 +68,7 @@ void test_barrier() {
   __builtin_arm_isb(3); //CHECK: call {{.*}} @llvm.arm.isb(i32 3)
 }
 
-// CHECK: call {{.*}} @llvm.arm.rbit(i32 %a)
+// CHECK: call {{.*}} @llvm.bitreverse.i32(i32 %a)
 
 unsigned rbit(unsigned a) {
   return __builtin_arm_rbit(a);
diff --git a/test/CodeGen/builtins-arm64.c b/test/CodeGen/builtins-arm64.c
index 20eb2abc9476..dc5fb6f31cff 100644
--- a/test/CodeGen/builtins-arm64.c
+++ b/test/CodeGen/builtins-arm64.c
@@ -10,12 +10,12 @@ void *tp (void) {
 // CHECK: call {{.*}} @llvm.thread.pointer()
 }
 
-// CHECK: call {{.*}} @llvm.aarch64.rbit.i32(i32 %a)
+// CHECK: call {{.*}} @llvm.bitreverse.i32(i32 %a)
 unsigned rbit(unsigned a) {
   return __builtin_arm_rbit(a);
 }
 
-// CHECK: call {{.*}} @llvm.aarch64.rbit.i64(i64 %a)
+// CHECK: call {{.*}} @llvm.bitreverse.i64(i64 %a)
 unsigned long long rbit64(unsigned long long a) {
   return __builtin_arm_rbit64(a);
 }
diff --git a/test/CodeGen/builtins-ppc-p9vector.c b/test/CodeGen/builtins-ppc-p9vector.c
index bd0ad182f15f..42316970d8da 100644
--- a/test/CodeGen/builtins-ppc-p9vector.c
+++ b/test/CodeGen/builtins-ppc-p9vector.c
@@ -868,20 +868,24 @@ vector unsigned long long test76(void) {
   return vec_rlmi(vula, vula, vula);
 }
 vector unsigned int test77(void) {
+// CHECK-BE: %[[RES1:.+]] = shl <4 x i32
+// CHECK-BE: %[[RES2:.+]] = or <4 x i32> %[[RES1]]
 // CHECK-BE: @llvm.ppc.altivec.vrlwnm(<4 x i32
-// CHECK-BE: and <4 x i32
 // CHECK-BE: ret <4 x i32>
+// CHECK: %[[RES1:.+]] = shl <4 x i32
+// CHECK: %[[RES2:.+]] = or <4 x i32> %[[RES1]]
 // CHECK: @llvm.ppc.altivec.vrlwnm(<4 x i32
-// CHECK: and <4 x i32
 // CHECK: ret <4 x i32>
   return vec_rlnm(vuia, vuia, vuia);
 }
 vector unsigned long long test78(void) {
+// CHECK-BE: %[[RES1:.+]] = shl <2 x i64
+// CHECK-BE: %[[RES2:.+]] = or <2 x i64> %[[RES1]]
 // CHECK-BE: @llvm.ppc.altivec.vrldnm(<2 x i64
-// CHECK-BE: and <2 x i64
 // CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: %[[RES1:.+]] = shl <2 x i64
+// CHECK: %[[RES2:.+]] = or <2 x i64> %[[RES1]]
 // CHECK: @llvm.ppc.altivec.vrldnm(<2 x i64
-// CHECK: and <2 x i64
 // CHECK-NEXT: ret <2 x i64>
   return vec_rlnm(vula, vula, vula);
 }
diff --git a/test/CodeGen/integer-overflow.c b/test/CodeGen/integer-overflow.c
index 6a7c3e51ee1b..0b28bc5b8a2d 100644
--- a/test/CodeGen/integer-overflow.c
+++ b/test/CodeGen/integer-overflow.c
@@ -65,13 +65,37 @@ void test1() {
   // TRAPV: getelementptr inbounds i32, i32*
   // CATCH_UB: getelementptr inbounds i32, i32*
 
-  // PR9350: char increment never overflows.
-  extern volatile signed char PR9350;
+  // PR9350: char pre-increment never overflows.
+  extern volatile signed char PR9350_char_inc;
   // DEFAULT: add i8 {{.*}}, 1
   // WRAPV: add i8 {{.*}}, 1
   // TRAPV: add i8 {{.*}}, 1
   // CATCH_UB: add i8 {{.*}}, 1
-  ++PR9350;
+  ++PR9350_char_inc;
+
+  // PR9350: char pre-decrement never overflows.
+  extern volatile signed char PR9350_char_dec;
+  // DEFAULT: add i8 {{.*}}, -1
+  // WRAPV: add i8 {{.*}}, -1
+  // TRAPV: add i8 {{.*}}, -1
+  // CATCH_UB: add i8 {{.*}}, -1
+  --PR9350_char_dec;
+
+  // PR9350: short pre-increment never overflows.
+  extern volatile signed short PR9350_short_inc;
+  // DEFAULT: add i16 {{.*}}, 1
+  // WRAPV: add i16 {{.*}}, 1
+  // TRAPV: add i16 {{.*}}, 1
+  // CATCH_UB: add i16 {{.*}}, 1
+  ++PR9350_short_inc;
+
+  // PR9350: short pre-decrement never overflows.
+  extern volatile signed short PR9350_short_dec;
+  // DEFAULT: add i16 {{.*}}, -1
+  // WRAPV: add i16 {{.*}}, -1
+  // TRAPV: add i16 {{.*}}, -1
+  // CATCH_UB: add i16 {{.*}}, -1
+  --PR9350_short_dec;
 
   // PR24256: don't instrument __builtin_frame_address.
   __builtin_frame_address(0 + 0);