diff options
Diffstat (limited to 'test/MC/AArch64/SVE/ldff1sb-diagnostics.s')
| -rw-r--r-- | test/MC/AArch64/SVE/ldff1sb-diagnostics.s | 117 |
1 files changed, 117 insertions, 0 deletions
diff --git a/test/MC/AArch64/SVE/ldff1sb-diagnostics.s b/test/MC/AArch64/SVE/ldff1sb-diagnostics.s new file mode 100644 index 000000000000..b9bd9e470c34 --- /dev/null +++ b/test/MC/AArch64/SVE/ldff1sb-diagnostics.s @@ -0,0 +1,117 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +// --------------------------------------------------------------------------// +// Invalid operand (.b) + +ldff1sb z27.b, p7/z, [x0] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width +// CHECK-NEXT: ldff1sb z27.b, p7/z, [x0] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// restricted predicate has range [0, 7]. + +ldff1sb z9.h, p8/z, [x0] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: ldff1sb z9.h, p8/z, [x0] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z12.s, p8/z, [x0] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: ldff1sb z12.s, p8/z, [x0] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z4.d, p8/z, [x0] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. +// CHECK-NEXT: ldff1sb z4.d, p8/z, [x0] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Invalid scalar + scalar addressing modes + +ldff1sb z0.h, p0/z, [x0, sp] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, without shift +// CHECK-NEXT: ldff1sb z0.h, p0/z, [x0, sp] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.h, p0/z, [x0, x0, lsl #1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, without shift +// CHECK-NEXT: ldff1sb z0.h, p0/z, [x0, x0, lsl #1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.h, p0/z, [x0, w0] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, without shift +// CHECK-NEXT: ldff1sb z0.h, p0/z, [x0, w0] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.h, p0/z, [x0, w0, uxtw] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, without shift +// CHECK-NEXT: ldff1sb z0.h, p0/z, [x0, w0, uxtw] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// --------------------------------------------------------------------------// +// Invalid scalar + vector addressing modes + +ldff1sb z0.d, p0/z, [x0, z0.b] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.b] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.d, p0/z, [x0, z0.h] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.h] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.d, p0/z, [x0, z0.s] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.s] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.s, p0/z, [x0, z0.s] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)' +// CHECK-NEXT: ldff1sb z0.s, p0/z, [x0, z0.s] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.s, p0/z, [x0, z0.s, uxtw #1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)' +// CHECK-NEXT: ldff1sb z0.s, p0/z, [x0, z0.s, uxtw #1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.s, p0/z, [x0, z0.s, lsl #0] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)' +// CHECK-NEXT: ldff1sb z0.s, p0/z, [x0, z0.s, lsl #0] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.d, p0/z, [x0, z0.d, lsl #1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)' +// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.d, lsl #1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.d, p0/z, [x0, z0.d, sxtw #1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)' +// CHECK-NEXT: ldff1sb z0.d, p0/z, [x0, z0.d, sxtw #1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + + +// --------------------------------------------------------------------------// +// Invalid vector + immediate addressing modes + +ldff1sb z0.s, p0/z, [z0.s, #-1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. +// CHECK-NEXT: ldff1sb z0.s, p0/z, [z0.s, #-1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.s, p0/z, [z0.s, #32] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. +// CHECK-NEXT: ldff1sb z0.s, p0/z, [z0.s, #32] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.d, p0/z, [z0.d, #-1] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. +// CHECK-NEXT: ldff1sb z0.d, p0/z, [z0.d, #-1] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +ldff1sb z0.d, p0/z, [z0.d, #32] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31]. +// CHECK-NEXT: ldff1sb z0.d, p0/z, [z0.d, #32] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |