diff options
Diffstat (limited to 'test/MC')
66 files changed, 4246 insertions, 1241 deletions
diff --git a/test/MC/AArch64/arm64-leaf-compact-unwind.s b/test/MC/AArch64/arm64-leaf-compact-unwind.s index 27d3d51c2935..a0703f6360db 100644 --- a/test/MC/AArch64/arm64-leaf-compact-unwind.s +++ b/test/MC/AArch64/arm64-leaf-compact-unwind.s @@ -1,5 +1,5 @@ // RUN: llvm-mc -triple=arm64-apple-ios -filetype=obj < %s | \ -// RUN: llvm-readobj -sections -section-relocations -section-data | \ +// RUN: llvm-readobj --expand-relocs -sections -section-relocations -section-data | \ // RUN: FileCheck %s // // rdar://13070556 @@ -23,10 +23,34 @@ // CHECK-NEXT: Reserved1: // CHECK-NEXT: Reserved2: // CHECK-NEXT: Relocations [ -// CHECK-NEXT: 0x60 0 3 0 ARM64_RELOC_UNSIGNED 0 0x1 -// CHECK-NEXT: 0x40 0 3 0 ARM64_RELOC_UNSIGNED 0 0x1 -// CHECK-NEXT: 0x20 0 3 0 ARM64_RELOC_UNSIGNED 0 0x1 -// CHECK-NEXT: 0x0 0 3 0 ARM64_RELOC_UNSIGNED 0 0x1 +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: 0x60 +// CHECK-NEXT: PCRel: 0 +// CHECK-NEXT: Length: 3 +// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) +// CHECK-NEXT: Section: __text (1) +// CHECK-NEXT: } +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: PCRel: 0 +// CHECK-NEXT: Length: 3 +// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) +// CHECK-NEXT: Section: __text (1) +// CHECK-NEXT: } +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: 0x20 +// CHECK-NEXT: PCRel: 0 +// CHECK-NEXT: Length: 3 +// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) +// CHECK-NEXT: Section: __text (1) +// CHECK-NEXT: } +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: 0x0 +// CHECK-NEXT: PCRel: 0 +// CHECK-NEXT: Length: 3 +// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) +// CHECK-NEXT: Section: __text (1) +// CHECK-NEXT: } // CHECK-NEXT: ] // CHECK-NEXT: SectionData ( // CHECK-NEXT: 0000: 00000000 00000000 08000000 00000002 diff --git a/test/MC/R600/ds-err.s b/test/MC/AMDGPU/ds-err.s index 52c2740bec25..52c2740bec25 100644 --- a/test/MC/R600/ds-err.s +++ b/test/MC/AMDGPU/ds-err.s diff --git a/test/MC/R600/ds.s b/test/MC/AMDGPU/ds.s index ad63229ba2e1..ad63229ba2e1 100644 --- a/test/MC/R600/ds.s +++ b/test/MC/AMDGPU/ds.s diff --git a/test/MC/AMDGPU/flat.s b/test/MC/AMDGPU/flat.s new file mode 100644 index 000000000000..adad29a5595b --- /dev/null +++ b/test/MC/AMDGPU/flat.s @@ -0,0 +1,477 @@ +// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=CIVI --check-prefix=CI +// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=CIVI + +// FIXME: These instructions give an 'invalid operand' error on SI and should +// instead be reporting an 'instruction not supported' error. + +// XUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=NOVI +// XUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI +// XUN: not llvm-mc -arch=amdgcn -mcpu=SI -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI + +//===----------------------------------------------------------------------===// +// Operands +//===----------------------------------------------------------------------===// + +flat_load_dword v1, v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x30,0xdc,0x03,0x00,0x00,0x01] + +flat_load_dword v1, v[3:4] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc ; encoding: [0x00,0x00,0x31,0xdc,0x03,0x00,0x00,0x01] + +flat_load_dword v1, v[3:4] glc slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc slc ; encoding: [0x00,0x00,0x33,0xdc,0x03,0x00,0x00,0x01] + +flat_load_dword v1, v[3:4] glc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc tfe ; encoding: [0x00,0x00,0x31,0xdc,0x03,0x00,0x80,0x01] + +flat_load_dword v1, v[3:4] glc slc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x33,0xdc,0x03,0x00,0x80,0x01] + +flat_load_dword v1, v[3:4] glc tfe slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x33,0xdc,0x03,0x00,0x80,0x01] + +flat_load_dword v1, v[3:4] slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] slc ; encoding: [0x00,0x00,0x32,0xdc,0x03,0x00,0x00,0x01] + +flat_load_dword v1, v[3:4] slc glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc slc ; encoding: [0x00,0x00,0x33,0xdc,0x03,0x00,0x00,0x01] + +flat_load_dword v1, v[3:4] slc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] slc tfe ; encoding: [0x00,0x00,0x32,0xdc,0x03,0x00,0x80,0x01] + +flat_load_dword v1, v[3:4] slc glc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x33,0xdc,0x03,0x00,0x80,0x01] + +flat_load_dword v1, v[3:4] slc tfe glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x33,0xdc,0x03,0x00,0x80,0x01] + +flat_load_dword v1, v[3:4] tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] tfe ; encoding: [0x00,0x00,0x30,0xdc,0x03,0x00,0x80,0x01] + +flat_load_dword v1, v[3:4] tfe glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc tfe ; encoding: [0x00,0x00,0x31,0xdc,0x03,0x00,0x80,0x01] + +flat_load_dword v1, v[3:4] tfe slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] slc tfe ; encoding: [0x00,0x00,0x32,0xdc,0x03,0x00,0x80,0x01] + +flat_load_dword v1, v[3:4] tfe glc slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x33,0xdc,0x03,0x00,0x80,0x01] + +flat_load_dword v1, v[3:4] tfe slc glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x33,0xdc,0x03,0x00,0x80,0x01] + +flat_store_dword v1, v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] ; encoding: [0x00,0x00,0x70,0xdc,0x03,0x01,0x00,0x00] + +flat_store_dword v1, v[3:4] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc ; encoding: [0x00,0x00,0x71,0xdc,0x03,0x01,0x00,0x00] + +flat_store_dword v1, v[3:4] glc slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc slc ; encoding: [0x00,0x00,0x73,0xdc,0x03,0x01,0x00,0x00] + +flat_store_dword v1, v[3:4] glc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc tfe ; encoding: [0x00,0x00,0x71,0xdc,0x03,0x01,0x80,0x00] + +flat_store_dword v1, v[3:4] glc slc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x73,0xdc,0x03,0x01,0x80,0x00] + +flat_store_dword v1, v[3:4] glc tfe slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x73,0xdc,0x03,0x01,0x80,0x00] + +flat_store_dword v1, v[3:4] slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] slc ; encoding: [0x00,0x00,0x72,0xdc,0x03,0x01,0x00,0x00] + +flat_store_dword v1, v[3:4] slc glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc slc ; encoding: [0x00,0x00,0x73,0xdc,0x03,0x01,0x00,0x00] + +flat_store_dword v1, v[3:4] slc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] slc tfe ; encoding: [0x00,0x00,0x72,0xdc,0x03,0x01,0x80,0x00] + +flat_store_dword v1, v[3:4] slc glc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x73,0xdc,0x03,0x01,0x80,0x00] + +flat_store_dword v1, v[3:4] slc tfe glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x73,0xdc,0x03,0x01,0x80,0x00] + +flat_store_dword v1, v[3:4] tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] tfe ; encoding: [0x00,0x00,0x70,0xdc,0x03,0x01,0x80,0x00] + +flat_store_dword v1, v[3:4] tfe glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc tfe ; encoding: [0x00,0x00,0x71,0xdc,0x03,0x01,0x80,0x00] + +flat_store_dword v1, v[3:4] tfe slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] slc tfe ; encoding: [0x00,0x00,0x72,0xdc,0x03,0x01,0x80,0x00] + +flat_store_dword v1, v[3:4] tfe glc slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x73,0xdc,0x03,0x01,0x80,0x00] + +flat_store_dword v1, v[3:4] tfe slc glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x73,0xdc,0x03,0x01,0x80,0x00] + +// FIXME: For atomic instructions, glc must be placed immediately following +// the data regiser. These forms aren't currently supported: +// flat_atomic_add v1, v[3:4], v5 slc glc +// flat_atomic_add v1, v[3:4], v5 slc glc tfe +// flat_atomic_add v1, v[3:4], v5 slc tfe glc +// flat_atomic_add v1, v[3:4], v5 tfe glc +// flat_atomic_add v[3:4], v5 tfe glc +// flat_atomic_add v1, v[3:4], v5 tfe glc slc +// flat_atomic_add v1, v[3:4], v5 tfe slc glc + +flat_atomic_add v1 v[3:4], v5 glc slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add v1, v[3:4], v5 glc slc ; encoding: [0x00,0x00,0xcb,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_add v1 v[3:4], v5 glc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add v1, v[3:4], v5 glc tfe ; encoding: [0x00,0x00,0xc9,0xdc,0x03,0x05,0x80,0x01] + +flat_atomic_add v1 v[3:4], v5 glc slc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add v1, v[3:4], v5 glc slc tfe ; encoding: [0x00,0x00,0xcb,0xdc,0x03,0x05,0x80,0x01] + +flat_atomic_add v1 v[3:4], v5 glc tfe slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add v1, v[3:4], v5 glc slc tfe ; encoding: [0x00,0x00,0xcb,0xdc,0x03,0x05,0x80,0x01] + +flat_atomic_add v[3:4], v5 slc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add v[3:4], v5 slc ; encoding: [0x00,0x00,0xca,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_add v[3:4], v5 slc tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add v[3:4], v5 slc tfe ; encoding: [0x00,0x00,0xca,0xdc,0x03,0x05,0x80,0x00] + +flat_atomic_add v[3:4], v5 tfe +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add v[3:4], v5 tfe ; encoding: [0x00,0x00,0xc8,0xdc,0x03,0x05,0x80,0x00] + +//===----------------------------------------------------------------------===// +// Instructions +//===----------------------------------------------------------------------===// + +flat_load_ubyte v1, v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_ubyte v1, v[3:4] ; encoding: [0x00,0x00,0x20,0xdc,0x03,0x00,0x00,0x01] + +flat_load_sbyte v1, v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_sbyte v1, v[3:4] ; encoding: [0x00,0x00,0x24,0xdc,0x03,0x00,0x00,0x01] + +flat_load_ushort v1, v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_ushort v1, v[3:4] ; encoding: [0x00,0x00,0x28,0xdc,0x03,0x00,0x00,0x01] + +flat_load_sshort v1, v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_sshort v1, v[3:4] ; encoding: [0x00,0x00,0x2c,0xdc,0x03,0x00,0x00,0x01] + +flat_load_dword v1, v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x30,0xdc,0x03,0x00,0x00,0x01] + +flat_load_dwordx2 v[1:2], v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dwordx2 v[1:2], v[3:4] ; encoding: [0x00,0x00,0x34,0xdc,0x03,0x00,0x00,0x01] + +flat_load_dwordx4 v[5:8], v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dwordx4 v[5:8], v[3:4] ; encoding: [0x00,0x00,0x38,0xdc,0x03,0x00,0x00,0x05] + +flat_load_dwordx3 v[5:7], v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_load_dwordx3 v[5:7], v[3:4] ; encoding: [0x00,0x00,0x3c,0xdc,0x03,0x00,0x00,0x05] + +flat_store_byte v1, v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_byte v1, v[3:4] ; encoding: [0x00,0x00,0x60,0xdc,0x03,0x01,0x00,0x00] + +flat_store_short v1, v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_short v1, v[3:4] ; encoding: [0x00,0x00,0x68,0xdc,0x03,0x01,0x00,0x00] + +flat_store_dword v1, v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dword v1, v[3:4] ; encoding: [0x00,0x00,0x70,0xdc,0x03,0x01,0x00,0x00] + +flat_store_dwordx2 v[1:2], v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dwordx2 v[1:2], v[3:4] ; encoding: [0x00,0x00,0x74,0xdc,0x03,0x01,0x00,0x00] + +flat_store_dwordx4 v[5:8], v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dwordx4 v[5:8], v[3:4] ; encoding: [0x00,0x00,0x78,0xdc,0x03,0x05,0x00,0x00] + +flat_store_dwordx3 v[5:7], v[3:4] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_store_dwordx3 v[5:7], v[3:4] ; encoding: [0x00,0x00,0x7c,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_swap v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_swap v[3:4], v5 ; encoding: [0x00,0x00,0xc0,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_swap v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_swap v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xc1,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_cmpswap v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_cmpswap v[3:4], v[5:6] ; encoding: [0x00,0x00,0xc4,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_cmpswap v1, v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_cmpswap v1, v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xc5,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_add v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add v[3:4], v5 ; encoding: [0x00,0x00,0xc8,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_add v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xc9,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_sub v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_sub v[3:4], v5 ; encoding: [0x00,0x00,0xcc,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_sub v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_sub v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xcd,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_smin v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_smin v[3:4], v5 ; encoding: [0x00,0x00,0xd4,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_smin v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_smin v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xd5,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_umin v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_umin v[3:4], v5 ; encoding: [0x00,0x00,0xd8,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_umin v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_umin v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xd9,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_smax v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_smax v[3:4], v5 ; encoding: [0x00,0x00,0xdc,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_smax v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_smax v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xdd,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_umax v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_umax v[3:4], v5 ; encoding: [0x00,0x00,0xe0,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_umax v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_umax v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xe1,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_and v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_and v[3:4], v5 ; encoding: [0x00,0x00,0xe4,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_and v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_and v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xe5,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_or v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_or v[3:4], v5 ; encoding: [0x00,0x00,0xe8,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_or v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_or v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xe9,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_xor v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_xor v[3:4], v5 ; encoding: [0x00,0x00,0xec,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_xor v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_xor v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xed,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_inc v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_inc v[3:4], v5 ; encoding: [0x00,0x00,0xf0,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_inc v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_inc v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xf1,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_dec v[3:4], v5 +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_dec v[3:4], v5 ; encoding: [0x00,0x00,0xf4,0xdc,0x03,0x05,0x00,0x00] + +flat_atomic_dec v1, v[3:4], v5 glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_dec v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xf5,0xdc,0x03,0x05,0x00,0x01] + +flat_atomic_swap_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_swap_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x40,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_swap_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_swap_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x41,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_cmpswap_x2 v[3:4], v[5:8] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_cmpswap_x2 v[3:4], v[5:8] ; encoding: [0x00,0x00,0x44,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_cmpswap_x2 v[1:2], v[3:4], v[5:8] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_cmpswap_x2 v[1:2], v[3:4], v[5:8] glc ; encoding: [0x00,0x00,0x45,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_add_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x48,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_add_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_add_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x49,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_sub_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_sub_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x4c,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_sub_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_sub_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x4d,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_smin_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_smin_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x54,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_smin_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_smin_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x55,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_umin_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_umin_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x58,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_umin_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_umin_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x59,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_smax_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_smax_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x5c,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_smax_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_smax_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x5d,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_umax_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_umax_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x60,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_umax_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_umax_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x61,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_and_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_and_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x64,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_and_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_and_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x65,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_or_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_or_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x68,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_or_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_or_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x69,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_xor_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_xor_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x6c,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_xor_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_xor_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x6d,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_inc_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_inc_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x70,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_inc_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_inc_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x71,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_dec_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_dec_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x74,0xdd,0x03,0x05,0x00,0x00] + +flat_atomic_dec_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CIVI: flat_atomic_dec_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x75,0xdd,0x03,0x05,0x00,0x01] + +flat_atomic_fcmpswap_x2 v[3:4], v[5:8] +// NOSI: error: instruction not supported on this GPU +// CI: flat_atomic_fcmpswap_x2 v[3:4], v[5:8] ; encoding: [0x00,0x00,0x78,0xdd,0x03,0x05,0x00,0x00] +// NOVI: error: instruction not supported on this GPU + +flat_atomic_fcmpswap_x2 v[1:2], v[3:4], v[5:8] glc +// NOSI: error: instruction not supported on this GPU +// CI: flat_atomic_fcmpswap_x2 v[1:2], v[3:4], v[5:8] glc ; encoding: [0x00,0x00,0x79,0xdd,0x03,0x05,0x00,0x01] +// NOVI: error: instruction not supported on this GPU + +flat_atomic_fmin_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CI: flat_atomic_fmin_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x7c,0xdd,0x03,0x05,0x00,0x00] +// NOVI: error: instruction not supported on this GPU + +flat_atomic_fmin_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CI: flat_atomic_fmin_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x7d,0xdd,0x03,0x05,0x00,0x01] +// NOVI: error: instruction not supported on this GPU + +flat_atomic_fmax_x2 v[3:4], v[5:6] +// NOSI: error: instruction not supported on this GPU +// CI: flat_atomic_fmax_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x80,0xdd,0x03,0x05,0x00,0x00] +// NOVI: error: instruction not supported on this GPU + +flat_atomic_fmax_x2 v[1:2], v[3:4], v[5:6] glc +// NOSI: error: instruction not supported on this GPU +// CI: flat_atomic_fmax_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x81,0xdd,0x03,0x05,0x00,0x01] +// NOVI: error: instruction not supported on this GPU diff --git a/test/MC/AMDGPU/lit.local.cfg b/test/MC/AMDGPU/lit.local.cfg new file mode 100644 index 000000000000..2a665f06be72 --- /dev/null +++ b/test/MC/AMDGPU/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'AMDGPU' in config.root.targets: + config.unsupported = True diff --git a/test/MC/R600/mubuf.s b/test/MC/AMDGPU/mubuf.s index 78d365abef13..78d365abef13 100644 --- a/test/MC/R600/mubuf.s +++ b/test/MC/AMDGPU/mubuf.s diff --git a/test/MC/R600/smrd.s b/test/MC/AMDGPU/smrd.s index b67abf7e6890..b67abf7e6890 100644 --- a/test/MC/R600/smrd.s +++ b/test/MC/AMDGPU/smrd.s diff --git a/test/MC/R600/sop1-err.s b/test/MC/AMDGPU/sop1-err.s index f892356b623d..f892356b623d 100644 --- a/test/MC/R600/sop1-err.s +++ b/test/MC/AMDGPU/sop1-err.s diff --git a/test/MC/R600/sop1.s b/test/MC/AMDGPU/sop1.s index 92ca73f25004..92ca73f25004 100644 --- a/test/MC/R600/sop1.s +++ b/test/MC/AMDGPU/sop1.s diff --git a/test/MC/R600/sop2.s b/test/MC/AMDGPU/sop2.s index 9a7a1c01064b..9a7a1c01064b 100644 --- a/test/MC/R600/sop2.s +++ b/test/MC/AMDGPU/sop2.s diff --git a/test/MC/R600/sopc.s b/test/MC/AMDGPU/sopc.s index 0899c1a2eede..0899c1a2eede 100644 --- a/test/MC/R600/sopc.s +++ b/test/MC/AMDGPU/sopc.s diff --git a/test/MC/R600/sopk.s b/test/MC/AMDGPU/sopk.s index 6c27aaccb80c..6c27aaccb80c 100644 --- a/test/MC/R600/sopk.s +++ b/test/MC/AMDGPU/sopk.s diff --git a/test/MC/R600/sopp.s b/test/MC/AMDGPU/sopp.s index b072c16fdb24..b072c16fdb24 100644 --- a/test/MC/R600/sopp.s +++ b/test/MC/AMDGPU/sopp.s diff --git a/test/MC/R600/vop1.s b/test/MC/AMDGPU/vop1.s index d0b00fcd1897..d0b00fcd1897 100644 --- a/test/MC/R600/vop1.s +++ b/test/MC/AMDGPU/vop1.s diff --git a/test/MC/R600/vop2-err.s b/test/MC/AMDGPU/vop2-err.s index a1131000a909..a1131000a909 100644 --- a/test/MC/R600/vop2-err.s +++ b/test/MC/AMDGPU/vop2-err.s diff --git a/test/MC/R600/vop2.s b/test/MC/AMDGPU/vop2.s index a1f3b8d89365..a1f3b8d89365 100644 --- a/test/MC/R600/vop2.s +++ b/test/MC/AMDGPU/vop2.s diff --git a/test/MC/R600/vop3-errs.s b/test/MC/AMDGPU/vop3-errs.s index b57fe6d5314b..b57fe6d5314b 100644 --- a/test/MC/R600/vop3-errs.s +++ b/test/MC/AMDGPU/vop3-errs.s diff --git a/test/MC/R600/vop3.s b/test/MC/AMDGPU/vop3.s index 205623359748..205623359748 100644 --- a/test/MC/R600/vop3.s +++ b/test/MC/AMDGPU/vop3.s diff --git a/test/MC/R600/vopc.s b/test/MC/AMDGPU/vopc.s index f44919a4f1e0..f44919a4f1e0 100644 --- a/test/MC/R600/vopc.s +++ b/test/MC/AMDGPU/vopc.s diff --git a/test/MC/ARM/elf-reloc-01.ll b/test/MC/ARM/elf-reloc-01.ll deleted file mode 100644 index 7f3cc185af1c..000000000000 --- a/test/MC/ARM/elf-reloc-01.ll +++ /dev/null @@ -1,67 +0,0 @@ -;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ -;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ -;; RUN: -filetype=obj %s -o - | \ -;; RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s - -;; FIXME: This file needs to be in .s form! -;; The args to llc are there to constrain the codegen only. -;; -;; Ensure no regression on ARM/gcc compatibility for -;; emitting explicit symbol relocs for nonexternal symbols -;; versus section symbol relocs (with offset) - -;; -;; Default llvm behavior is to emit as section symbol relocs nearly -;; everything that is not an undefined external. Unfortunately, this -;; diverges from what codesourcery ARM/gcc does! -;; -;; Tests that reloc to _MergedGlobals show up as explicit symbol reloc - - -target triple = "armv7-none-linux-gnueabi" - -@var_tls = thread_local global i32 1 -@var_tls_double = thread_local global double 1.000000e+00 -@var_static = internal global i32 1 -@var_static_double = internal global double 1.000000e+00 -@var_global = global i32 1 -@var_global_double = global double 1.000000e+00 - -declare i32 @mystrlen(i8* nocapture %s) nounwind - -declare void @myhextochar(i32 %n, i8* nocapture %buffer) - -declare void @__aeabi_read_tp() nounwind - -declare void @__nacl_read_tp() nounwind - -define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { -entry: - switch i32 %argc, label %bb3 [ - i32 555, label %bb - i32 6666, label %bb2 - ] - -bb: ; preds = %entry - store volatile i32 11, i32* @var_tls, align 4 - store volatile double 2.200000e+01, double* @var_tls_double, align 8 - store volatile i32 33, i32* @var_static, align 4 - store volatile double 4.400000e+01, double* @var_static_double, align 8 - store volatile i32 55, i32* @var_global, align 4 - store volatile double 6.600000e+01, double* @var_global_double, align 8 - br label %bb3 - -bb2: ; preds = %entry - ret i32 add (i32 add (i32 add (i32 ptrtoint (i32* @var_tls to i32), i32 add (i32 ptrtoint (i32* @var_static to i32), i32 ptrtoint (i32* @var_global to i32))), i32 ptrtoint (double* @var_tls_double to i32)), i32 add (i32 ptrtoint (double* @var_static_double to i32), i32 ptrtoint (double* @var_global_double to i32))) - -bb3: ; preds = %bb, %entry - tail call void @exit(i32 55) noreturn nounwind - unreachable -} - -declare void @exit(i32) noreturn nounwind - -; OBJ: Relocations [ -; OBJ: Section {{.*}} .rel.text { -; OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC _MergedGlobals -; OBJ: } -; OBJ: ] diff --git a/test/MC/ARM/elf-reloc-01.s b/test/MC/ARM/elf-reloc-01.s new file mode 100644 index 000000000000..f3019cdff3c6 --- /dev/null +++ b/test/MC/ARM/elf-reloc-01.s @@ -0,0 +1,26 @@ +// RUN: llvm-mc -triple=armv7-linux-gnueabi \ +// RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 \ +// RUN: -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s + +// Ensure no regression on ARM/gcc compatibility for +// emitting explicit symbol relocs for nonexternal symbols +// versus section symbol relocs (with offset) - +// +// Default llvm behavior is to emit as section symbol relocs nearly +// everything that is not an undefined external. Unfortunately, this +// diverges from what codesourcery ARM/gcc does! +// +// Tests that reloc to _MergedGlobals show up as explicit symbol reloc + + movw r2, :lower16:_MergedGlobals + +_MergedGlobals: + .long 1 + + +// OBJ: Relocations [ +// OBJ: Section {{.*}} .rel.text { +// OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC _MergedGlobals +// OBJ: } +// OBJ: ] diff --git a/test/MC/ARM/elf-reloc-02.ll b/test/MC/ARM/elf-reloc-02.ll deleted file mode 100644 index 0ffb6237d61a..000000000000 --- a/test/MC/ARM/elf-reloc-02.ll +++ /dev/null @@ -1,48 +0,0 @@ -;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ -;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ -;; RUN: -filetype=obj %s -o - | \ -;; RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s - -;; FIXME: This file needs to be in .s form! -;; The args to llc are there to constrain the codegen only. -;; -;; Ensure no regression on ARM/gcc compatibility for -;; emitting explicit symbol relocs for nonexternal symbols -;; versus section symbol relocs (with offset) - -;; -;; Default llvm behavior is to emit as section symbol relocs nearly -;; everything that is not an undefined external. Unfortunately, this -;; diverges from what codesourcery ARM/gcc does! -;; -;; Tests that reloc to .L.str* show up as explicit symbols - -target triple = "armv7-none-linux-gnueabi" - -@.str = private constant [7 x i8] c"@null\0A\00", align 4 -@.str1 = private constant [8 x i8] c"@write\0A\00", align 4 -@.str2 = private constant [13 x i8] c"hello worldn\00", align 4 -@.str3 = private constant [7 x i8] c"@exit\0A\00", align 4 - -declare i32 @mystrlen(i8* nocapture %s) nounwind readonly - -declare void @myhextochar(i32 %n, i8* nocapture %buffer) nounwind - -define i32 @main() nounwind { -entry: - %0 = tail call i32 (...) @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 6) nounwind - %1 = tail call i32 (...) @write(i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str1, i32 0, i32 0), i32 7) nounwind - %2 = tail call i32 (...) @write(i32 1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str2, i32 0, i32 0), i32 12) nounwind - %3 = tail call i32 (...) @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str3, i32 0, i32 0), i32 6) nounwind - tail call void @exit(i32 55) noreturn nounwind - unreachable -} - -declare i32 @write(...) - -declare void @exit(i32) noreturn nounwind - -;; OBJ: Relocations [ -;; OBJ: Section {{.*}} .rel.text { -;; OBJ-NEXT: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC .L.str -;; OBJ: } -;; OBJ: ] diff --git a/test/MC/ARM/elf-reloc-02.s b/test/MC/ARM/elf-reloc-02.s new file mode 100644 index 000000000000..24e2bb3b6fdb --- /dev/null +++ b/test/MC/ARM/elf-reloc-02.s @@ -0,0 +1,27 @@ +// RUN: llvm-mc -triple=armv7-linux-gnueabi \ +// RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 \ +// RUN: -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s + +// Ensure no regression on ARM/gcc compatibility for +// emitting explicit symbol relocs for nonexternal symbols +// versus section symbol relocs (with offset) - +// +// Default llvm behavior is to emit as section symbol relocs nearly +// everything that is not an undefined external. Unfortunately, this +// diverges from what codesourcery ARM/gcc does! +// +// Tests that reloc to .L.str* show up as explicit symbols + + movw r1, :lower16:.L.str + movt r1, :upper16:.L.str + + .section .rodata,"a",%progbits +.L.str: + .asciz "@null\n" + +// OBJ: Relocations [ +// OBJ: Section {{.*}} .rel.text { +// OBJ-NEXT: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC .L.str +// OBJ: } +// OBJ: ] diff --git a/test/MC/ARM/elf-reloc-03.ll b/test/MC/ARM/elf-reloc-03.ll deleted file mode 100644 index 4beb91f193f6..000000000000 --- a/test/MC/ARM/elf-reloc-03.ll +++ /dev/null @@ -1,95 +0,0 @@ -;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ -;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ -;; RUN: -filetype=obj %s -o - | \ -;; RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s - -;; FIXME: This file needs to be in .s form! -;; The args to llc are there to constrain the codegen only. -;; -;; Ensure no regression on ARM/gcc compatibility for -;; emitting explicit symbol relocs for nonexternal symbols -;; versus section symbol relocs (with offset) - -;; -;; Default llvm behavior is to emit as section symbol relocs nearly -;; everything that is not an undefined external. Unfortunately, this -;; diverges from what codesourcery ARM/gcc does! -;; -;; Verifies that internal constants appear as explict symbol relocs - - -target triple = "armv7-none-linux-gnueabi" - -@startval = global i32 5 -@vtable = internal constant [10 x i32 (...)*] [i32 (...)* bitcast (i32 ()* @foo0 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo1 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo2 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo3 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo4 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo5 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo6 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo7 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo8 to i32 (...)*), i32 (...)* bitcast (i32 ()* @foo9 to i32 (...)*)] - -declare i32 @mystrlen(i8* nocapture %s) nounwind readonly - -declare void @myhextochar(i32 %n, i8* nocapture %buffer) nounwind - -define internal i32 @foo0() nounwind readnone { -entry: - ret i32 0 -} - -define internal i32 @foo1() nounwind readnone { -entry: - ret i32 1 -} - -define internal i32 @foo2() nounwind readnone { -entry: - ret i32 2 -} - -define internal i32 @foo3() nounwind readnone { -entry: - ret i32 3 -} - -define internal i32 @foo4() nounwind readnone { -entry: - ret i32 4 -} - -define internal i32 @foo5() nounwind readnone { -entry: - ret i32 55 -} - -define internal i32 @foo6() nounwind readnone { -entry: - ret i32 6 -} - -define internal i32 @foo7() nounwind readnone { -entry: - ret i32 7 -} - -define internal i32 @foo8() nounwind readnone { -entry: - ret i32 8 -} - -define internal i32 @foo9() nounwind readnone { -entry: - ret i32 9 -} - -define i32 @main() nounwind { -entry: - %0 = load i32, i32* @startval, align 4 - %1 = getelementptr inbounds [10 x i32 (...)*], [10 x i32 (...)*]* @vtable, i32 0, i32 %0 - %2 = load i32 (...)*, i32 (...)** %1, align 4 - %3 = tail call i32 (...) %2() nounwind - tail call void @exit(i32 %3) noreturn nounwind - unreachable -} - -declare void @exit(i32) noreturn nounwind - -;; OBJ: Relocations [ -;; OBJ: Section {{.*}} .rel.text { -;; OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC vtable -;; OBJ: } -;; OBJ: ] diff --git a/test/MC/ARM/elf-reloc-03.s b/test/MC/ARM/elf-reloc-03.s new file mode 100644 index 000000000000..e55b1273769c --- /dev/null +++ b/test/MC/ARM/elf-reloc-03.s @@ -0,0 +1,27 @@ +// RUN: llvm-mc -triple=armv7-linux-gnueabi \ +// RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 \ +// RUN: -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s + +// Ensure no regression on ARM/gcc compatibility for +// emitting explicit symbol relocs for nonexternal symbols +// versus section symbol relocs (with offset) - +// +// Default llvm behavior is to emit as section symbol relocs nearly +// everything that is not an undefined external. Unfortunately, this +// diverges from what codesourcery ARM/gcc does! +// +// Verifies that internal constants appear as explict symbol relocs + + movw r1, :lower16:vtable + + + .section .data.rel.ro.local,"aw",%progbits +vtable: + .long 0 + +// OBJ: Relocations [ +// OBJ: Section {{.*}} .rel.text { +// OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC vtable +// OBJ: } +// OBJ: ] diff --git a/test/MC/ARM/elf-thumbfunc-reloc.ll b/test/MC/ARM/elf-thumbfunc-reloc.ll deleted file mode 100644 index 52579581875e..000000000000 --- a/test/MC/ARM/elf-thumbfunc-reloc.ll +++ /dev/null @@ -1,45 +0,0 @@ -; RUN: llc %s -mtriple=thumbv7-linux-gnueabi -relocation-model=pic \ -; RUN: -filetype=obj -o - | llvm-readobj -s -sd -r -t | \ -; RUN: FileCheck %s - -; FIXME: This file needs to be in .s form! -; We want to test relocatable thumb function call, -; but ARMAsmParser cannot handle "bl foo(PLT)" yet - -target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:32-n32" -target triple = "thumbv7-none--gnueabi" - -define void @foo() nounwind { -entry: - ret void -} - -define void @bar() nounwind { -entry: - call void @foo() - ret void -} - - -; make sure that bl 0 <foo> (fff7feff) is correctly encoded -; CHECK: Sections [ -; CHECK: SectionData ( -; CHECK: 0000: 704780B5 FFF7FEFF 80BD -; CHECK: ) -; CHECK: ] - -; CHECK: Relocations [ -; CHECK-NEXT: Section {{.*}} .rel.text { -; CHECK-NEXT: 0x4 R_ARM_THM_CALL foo 0x0 -; CHECK-NEXT: } -; CHECK-NEXT: Section {{.*}} .rel.ARM.exidx { -; CHECK-NEXT: 0x0 R_ARM_PREL31 .text 0x0 -; CHECK-NEXT: 0x8 R_ARM_PREL31 .text 0x0 -; CHECK-NEXT: } -; CHECK-NEXT: ] - -; make sure foo is thumb function: bit 0 = 1 -; CHECK: Symbols [ -; CHECK: Symbol { -; CHECK: Name: foo -; CHECK-NEXT: Value: 0x1 diff --git a/test/MC/ARM/elf-thumbfunc-reloc2.s b/test/MC/ARM/elf-thumbfunc-reloc2.s new file mode 100644 index 000000000000..54eedcd95756 --- /dev/null +++ b/test/MC/ARM/elf-thumbfunc-reloc2.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc %s -triple=thumbv7-linux-gnueabi -relocation-model=pic \ +// RUN: -filetype=obj -o - | llvm-readobj -s -sd -r -t | \ +// RUN: FileCheck %s + +// We want to test relocatable thumb function call. + + .thumb_func +foo: + .fnstart + bx lr + .cantunwind + .fnend + + .align 1 +bar: + .fnstart + push {r7, lr} + bl foo(PLT) + pop {r7, pc} + .cantunwind + .fnend + +// make sure that bl 0 <foo> (fff7feff) is correctly encoded +// CHECK: Sections [ +// CHECK: SectionData ( +// CHECK: 0000: 704780B5 FFF7FEFF 80BD +// CHECK: ) +// CHECK: ] + +// CHECK: Relocations [ +// CHECK-NEXT: Section {{.*}} .rel.text { +// CHECK-NEXT: 0x4 R_ARM_THM_CALL foo 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: Section {{.*}} .rel.ARM.exidx { +// CHECK-NEXT: 0x0 R_ARM_PREL31 .text 0x0 +// CHECK-NEXT: 0x8 R_ARM_PREL31 .text 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: ] + +// make sure foo is thumb function: bit 0 = 1 +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK: Name: foo +// CHECK-NEXT: Value: 0x1 diff --git a/test/MC/Disassembler/Hexagon/alu32_alu.txt b/test/MC/Disassembler/Hexagon/alu32_alu.txt index 4dde7df0759a..26b320ecde00 100644 --- a/test/MC/Disassembler/Hexagon/alu32_alu.txt +++ b/test/MC/Disassembler/Hexagon/alu32_alu.txt @@ -49,7 +49,7 @@ 0xf1 0xff 0x5f 0x78 # CHECK: r17 = #32767 0xf1 0xff 0xdf 0x78 -# CHECK: r17 = ##65535 +# CHECK: r17 = #-1 # Transfer register 0x11 0xc0 0x75 0x70 diff --git a/test/MC/Disassembler/Mips/micromips.txt b/test/MC/Disassembler/Mips/micromips.txt index 2b75d46b3bcf..637e88928e7b 100644 --- a/test/MC/Disassembler/Mips/micromips.txt +++ b/test/MC/Disassembler/Mips/micromips.txt @@ -1,506 +1,338 @@ # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mattr=micromips \ # RUN: | FileCheck %s -# CHECK: add $9, $6, $7 -0x00 0xe6 0x49 0x10 +0x00 0xe6 0x49 0x10 # CHECK: add $9, $6, $7 -# CHECK: addi $9, $6, 17767 -0x11 0x26 0x45 0x67 +0x11 0x26 0x45 0x67 # CHECK: addi $9, $6, 17767 -# CHECK: addiu $9, $6, -15001 -0x31 0x26 0xc5 0x67 +0x31 0x26 0xc5 0x67 # CHECK: addiu $9, $6, -15001 -# CHECK: addi $9, $6, 17767 -0x11 0x26 0x45 0x67 +0x11 0x26 0x45 0x67 # CHECK: addi $9, $6, 17767 -# CHECK: addiu $9, $6, -15001 -0x31 0x26 0xc5 0x67 +0x31 0x26 0xc5 0x67 # CHECK: addiu $9, $6, -15001 -# CHECK: addiusp -16 -0x4f 0xf9 +0x4f 0xf9 # CHECK: addiusp -16 -# CHECK: addiusp -1028 -0x4f 0xff +0x4f 0xff # CHECK: addiusp -1028 -# CHECK: addiusp -1032 -0x4f 0xfd +0x4f 0xfd # CHECK: addiusp -1032 -# CHECK: addiusp 1024 -0x4c 0x01 +0x4c 0x01 # CHECK: addiusp 1024 -# CHECK: addiusp 1028 -0x4c 0x03 +0x4c 0x03 # CHECK: addiusp 1028 -# CHECK: addu $9, $6, $7 -0x00 0xe6 0x49 0x50 +0x00 0xe6 0x49 0x50 # CHECK: addu $9, $6, $7 -# CHECK: sub $9, $6, $7 -0x00 0xe6 0x49 0x90 +0x00 0xe6 0x49 0x90 # CHECK: sub $9, $6, $7 -# CHECK: subu $4, $3, $5 -0x00 0xa3 0x21 0xd0 +0x00 0xa3 0x21 0xd0 # CHECK: subu $4, $3, $5 -# CHECK: sub $6, $zero, $7 -0x00 0xe0 0x31 0x90 +0x00 0xe0 0x31 0x90 # CHECK: sub $6, $zero, $7 -# CHECK: subu $6, $zero, $7 -0x00 0xe0 0x31 0xd0 +0x00 0xe0 0x31 0xd0 # CHECK: subu $6, $zero, $7 -# CHECK: addu $7, $8, $zero -0x00 0x08 0x39 0x50 +0x00 0x08 0x39 0x50 # CHECK: addu $7, $8, $zero -# CHECK: slt $3, $3, $5 -0x00 0xa3 0x1b 0x50 +0x00 0xa3 0x1b 0x50 # CHECK: slt $3, $3, $5 -# CHECK: slti $3, $3, 103 -0x90 0x63 0x00 0x67 +0x90 0x63 0x00 0x67 # CHECK: slti $3, $3, 103 -# CHECK: slti $3, $3, 103 -0x90 0x63 0x00 0x67 +0x90 0x63 0x00 0x67 # CHECK: slti $3, $3, 103 -# CHECK: sltiu $3, $3, 103 -0xb0 0x63 0x00 0x67 +0xb0 0x63 0x00 0x67 # CHECK: sltiu $3, $3, 103 -# CHECK: sltu $3, $3, $5 -0x00 0xa3 0x1b 0x90 +0x00 0xa3 0x1b 0x90 # CHECK: sltu $3, $3, $5 -# CHECK: lui $9, 17767 -0x41 0xa9 0x45 0x67 +0x41 0xa9 0x45 0x67 # CHECK: lui $9, 17767 -# CHECK: and $9, $6, $7 -0x00 0xe6 0x4a 0x50 +0x00 0xe6 0x4a 0x50 # CHECK: and $9, $6, $7 -# CHECK: andi $9, $6, 17767 -0xd1 0x26 0x45 0x67 +0xd1 0x26 0x45 0x67 # CHECK: andi $9, $6, 17767 -# CHECK: andi $9, $6, 17767 -0xd1 0x26 0x45 0x67 +0xd1 0x26 0x45 0x67 # CHECK: andi $9, $6, 17767 -# CHECK: andi16 $16, $2, 31 -0x2c 0x29 +0x2c 0x29 # CHECK: andi16 $16, $2, 31 -# CHECK: or $3, $4, $5 -0x00 0xa4 0x1a 0x90 +0x00 0xa4 0x1a 0x90 # CHECK: or $3, $4, $5 -# CHECK: ori $9, $6, 17767 -0x51 0x26 0x45 0x67 +0x51 0x26 0x45 0x67 # CHECK: ori $9, $6, 17767 -# CHECK: xor $3, $3, $5 -0x00 0xa3 0x1b 0x10 +0x00 0xa3 0x1b 0x10 # CHECK: xor $3, $3, $5 -# CHECK: xori $9, $6, 17767 -0x71 0x26 0x45 0x67 +0x71 0x26 0x45 0x67 # CHECK: xori $9, $6, 17767 -# CHECK: xori $9, $6, 17767 -0x71 0x26 0x45 0x67 +0x71 0x26 0x45 0x67 # CHECK: xori $9, $6, 17767 -# CHECK: nor $9, $6, $7 -0x00 0xe6 0x4a 0xd0 +0x00 0xe6 0x4a 0xd0 # CHECK: nor $9, $6, $7 -# CHECK: not $7, $8 -0x00 0x08 0x3a 0xd0 +0x00 0x08 0x3a 0xd0 # CHECK: not $7, $8 -# CHECK: mul $9, $6, $7 -0x00 0xe6 0x4a 0x10 +0x00 0xe6 0x4a 0x10 # CHECK: mul $9, $6, $7 -# CHECK: mult $9, $7 -0x00 0xe9 0x8b 0x3c +0x00 0xe9 0x8b 0x3c # CHECK: mult $9, $7 -# CHECK: multu $9, $7 -0x00 0xe9 0x9b 0x3c +0x00 0xe9 0x9b 0x3c # CHECK: multu $9, $7 -# CHECK-EB: div $zero, $9, $7 -0x00 0xe9 0xab 0x3c +0x00 0xe9 0xab 0x3c # CHECK-EB: div $zero, $9, $7 -# CHECK-EB: divu $zero, $9, $7 -0x00 0xe9 0xbb 0x3c +0x00 0xe9 0xbb 0x3c # CHECK-EB: divu $zero, $9, $7 -# CHECK: sll $4, $3, 7 -0x00 0x83 0x38 0x00 +0x00 0x83 0x38 0x00 # CHECK: sll $4, $3, 7 -# CHECK: sllv $2, $3, $5 -0x00 0x65 0x10 0x10 +0x00 0x65 0x10 0x10 # CHECK: sllv $2, $3, $5 -# CHECK: sra $4, $3, 7 -0x00 0x83 0x38 0x80 +0x00 0x83 0x38 0x80 # CHECK: sra $4, $3, 7 -# CHECK: srav $2, $3, $5 -0x00 0x65 0x10 0x90 +0x00 0x65 0x10 0x90 # CHECK: srav $2, $3, $5 -# CHECK: srl $4, $3, 7 -0x00 0x83 0x38 0x40 +0x00 0x83 0x38 0x40 # CHECK: srl $4, $3, 7 -# CHECK: srlv $2, $3, $5 -0x00 0x65 0x10 0x50 +0x00 0x65 0x10 0x50 # CHECK: srlv $2, $3, $5 -# CHECK: rotr $9, $6, 7 -0x01 0x26 0x38 0xc0 +0x01 0x26 0x38 0xc0 # CHECK: rotr $9, $6, 7 -# CHECK: rotrv $9, $6, $7 -0x00 0xc7 0x48 0xd0 +0x00 0xc7 0x48 0xd0 # CHECK: rotrv $9, $6, $7 -# CHECK: lb $5, 8($4) -0x1c 0xa4 0x00 0x08 +0x1c 0xa4 0x00 0x08 # CHECK: lb $5, 8($4) -# CHECK: lbu $6, 8($4) -0x14 0xc4 0x00 0x08 +0x14 0xc4 0x00 0x08 # CHECK: lbu $6, 8($4) -# CHECK: lh $2, 8($4) -0x3c 0x44 0x00 0x08 +0x3c 0x44 0x00 0x08 # CHECK: lh $2, 8($4) -# CHECK: lhu $4, 8($2) -0x34 0x82 0x00 0x08 +0x34 0x82 0x00 0x08 # CHECK: lhu $4, 8($2) -# CHECK: lw $6, 4($5) -0xfc 0xc5 0x00 0x04 +0xfc 0xc5 0x00 0x04 # CHECK: lw $6, 4($5) -# CHECK: lw $6, 123($sp) -0xfc 0xdd 0x00 0x7b +0xfc 0xdd 0x00 0x7b # CHECK: lw $6, 123($sp) -# CHECK: sb $5, 8($4) -0x18 0xa4 0x00 0x08 +0x18 0xa4 0x00 0x08 # CHECK: sb $5, 8($4) -# CHECK: sh $2, 8($4) -0x38 0x44 0x00 0x08 +0x38 0x44 0x00 0x08 # CHECK: sh $2, 8($4) -# CHECK: sw $5, 4($6) -0xf8 0xa6 0x00 0x04 +0xf8 0xa6 0x00 0x04 # CHECK: sw $5, 4($6) -# CHECK: sw $5, 123($sp) -0xf8 0xbd 0x00 0x7b +0xf8 0xbd 0x00 0x7b # CHECK: sw $5, 123($sp) -# CHECK: lwu $2, 8($4) -0x60 0x44 0xe0 0x08 +0x60 0x44 0xe0 0x08 # CHECK: lwu $2, 8($4) -# CHECK: lwl $4, 16($5) -0x60 0x85 0x00 0x10 +0x60 0x85 0x00 0x10 # CHECK: lwl $4, 16($5) -# CHECK: lwr $4, 16($5) -0x60 0x85 0x10 0x10 +0x60 0x85 0x10 0x10 # CHECK: lwr $4, 16($5) -# CHECK: swl $4, 16($5) -0x60 0x85 0x80 0x10 +0x60 0x85 0x80 0x10 # CHECK: swl $4, 16($5) -# CHECK: swr $4, 16($5) -0x60 0x85 0x90 0x10 +0x60 0x85 0x90 0x10 # CHECK: swr $4, 16($5) -# CHECK: movz $9, $6, $7 -0x00 0xe6 0x48 0x58 +0x00 0xe6 0x48 0x58 # CHECK: movz $9, $6, $7 -# CHECK: movn $9, $6, $7 -0x00 0xe6 0x48 0x18 +0x00 0xe6 0x48 0x18 # CHECK: movn $9, $6, $7 -# CHECK: movt $9, $6, $fcc0 -0x55 0x26 0x09 0x7b +0x55 0x26 0x09 0x7b # CHECK: movt $9, $6, $fcc0 -# CHECK: movf $9, $6, $fcc0 -0x55 0x26 0x01 0x7b +0x55 0x26 0x01 0x7b # CHECK: movf $9, $6, $fcc0 -# CHECK: mthi $6 -0x00 0x06 0x2d 0x7c +0x00 0x06 0x2d 0x7c # CHECK: mthi $6 -# CHECK: mfhi $6 -0x00 0x06 0x0d 0x7c +0x00 0x06 0x0d 0x7c # CHECK: mfhi $6 -# CHECK: mtlo $6 -0x00 0x06 0x3d 0x7c +0x00 0x06 0x3d 0x7c # CHECK: mtlo $6 -# CHECK: mflo $6 -0x00 0x06 0x1d 0x7c +0x00 0x06 0x1d 0x7c # CHECK: mflo $6 -# CHECK: madd $4, $5 -0x00 0xa4 0xcb 0x3c +0x00 0xa4 0xcb 0x3c # CHECK: madd $4, $5 -# CHECK: maddu $4, $5 -0x00 0xa4 0xdb 0x3c +0x00 0xa4 0xdb 0x3c # CHECK: maddu $4, $5 -# CHECK: msub $4, $5 -0x00 0xa4 0xeb 0x3c +0x00 0xa4 0xeb 0x3c # CHECK: msub $4, $5 -# CHECK: msubu $4, $5 -0x00 0xa4 0xfb 0x3c +0x00 0xa4 0xfb 0x3c # CHECK: msubu $4, $5 -# CHECK: clz $9, $6 -0x01 0x26 0x5b 0x3c +0x01 0x26 0x5b 0x3c # CHECK: clz $9, $6 -# CHECK: clo $9, $6 -0x01 0x26 0x4b 0x3c +0x01 0x26 0x4b 0x3c # CHECK: clo $9, $6 -# CHECK: seb $9, $6 -0x01 0x26 0x2b 0x3c +0x01 0x26 0x2b 0x3c # CHECK: seb $9, $6 -# CHECK: seh $9, $6 -0x01 0x26 0x3b 0x3c +0x01 0x26 0x3b 0x3c # CHECK: seh $9, $6 -# CHECK: wsbh $9, $6 -0x01 0x26 0x7b 0x3c +0x01 0x26 0x7b 0x3c # CHECK: wsbh $9, $6 -# CHECK: ext $9, $6, 3, 7 -0x01 0x26 0x30 0xec +0x01 0x26 0x30 0xec # CHECK: ext $9, $6, 3, 7 -# CHECK: ins $9, $6, 3, 7 -0x01 0x26 0x48 0xcc +0x01 0x26 0x48 0xcc # CHECK: ins $9, $6, 3, 7 -# CHECK: j 1328 -0xd4 0x00 0x02 0x98 +0xd4 0x00 0x02 0x98 # CHECK: j 1328 -# CHECK: jal 1328 -0xf4 0x00 0x02 0x98 +0xf4 0x00 0x02 0x98 # CHECK: jal 1328 -# CHECK: jalr $ra, $6 -0x03 0xe6 0x0f 0x3c +0x03 0xe6 0x0f 0x3c # CHECK: jalr $ra, $6 -# CHECK: jr $7 -0x00 0x07 0x0f 0x3c +0x00 0x07 0x0f 0x3c # CHECK: jr $7 -# CHECK: jraddiusp 20 -0x47 0x05 +0x47 0x05 # CHECK: jraddiusp 20 -# CHECK: beq $9, $6, 1332 -0x94 0xc9 0x02 0x9a +0x94 0xc9 0x02 0x9a # CHECK: beq $9, $6, 1332 -# CHECK: bgez $6, 1332 -0x40 0x46 0x02 0x9a +0x40 0x46 0x02 0x9a # CHECK: bgez $6, 1332 -# CHECK: bgezal $6, 1332 -0x40 0x66 0x02 0x9a +0x40 0x66 0x02 0x9a # CHECK: bgezal $6, 1332 -# CHECK: bltzal $6, 1332 -0x40 0x26 0x02 0x9a +0x40 0x26 0x02 0x9a # CHECK: bltzal $6, 1332 -# CHECK: bgtz $6, 1332 -0x40 0xc6 0x02 0x9a +0x40 0xc6 0x02 0x9a # CHECK: bgtz $6, 1332 -# CHECK: blez $6, 1332 -0x40 0x86 0x02 0x9a +0x40 0x86 0x02 0x9a # CHECK: blez $6, 1332 -# CHECK: bne $9, $6, 1332 -0xb4 0xc9 0x02 0x9a +0xb4 0xc9 0x02 0x9a # CHECK: bne $9, $6, 1332 -# CHECK: bltz $6, 1332 -0x40 0x06 0x02 0x9a +0x40 0x06 0x02 0x9a # CHECK: bltz $6, 1332 -# CHECK: teq $8, $9, 0 -0x01 0x28 0x00 0x3c +0x01 0x28 0x00 0x3c # CHECK: teq $8, $9, 0 -# CHECK: tge $8, $9, 0 -0x01 0x28 0x02 0x3c +0x01 0x28 0x02 0x3c # CHECK: tge $8, $9, 0 -# CHECK: tgeu $8, $9, 0 -0x01 0x28 0x04 0x3c +0x01 0x28 0x04 0x3c # CHECK: tgeu $8, $9, 0 -# CHECK: tlt $8, $9, 0 -0x01 0x28 0x08 0x3c +0x01 0x28 0x08 0x3c # CHECK: tlt $8, $9, 0 -# CHECK: tltu $8, $9, 0 -0x01 0x28 0x0a 0x3c +0x01 0x28 0x0a 0x3c # CHECK: tltu $8, $9, 0 -# CHECK: tne $8, $9, 0 -0x01 0x28 0x0c 0x3c +0x01 0x28 0x0c 0x3c # CHECK: tne $8, $9, 0 -# CHECK: teqi $9, 17767 -0x41,0xc9,0x45,0x67 +0x41,0xc9,0x45,0x67 # CHECK: teqi $9, 17767 -# CHECK: tgei $9, 17767 -0x41 0x29 0x45 0x67 +0x41 0x29 0x45 0x67 # CHECK: tgei $9, 17767 -# CHECK: tgeiu $9, 17767 -0x41 0x69 0x45 0x67 +0x41 0x69 0x45 0x67 # CHECK: tgeiu $9, 17767 -# CHECK: tlti $9, 17767 -0x41 0x09 0x45 0x67 +0x41 0x09 0x45 0x67 # CHECK: tlti $9, 17767 -# CHECK: tltiu $9, 17767 -0x41 0x49 0x45 0x67 +0x41 0x49 0x45 0x67 # CHECK: tltiu $9, 17767 -# CHECK: tnei $9, 17767 -0x41 0x89 0x45 0x67 +0x41 0x89 0x45 0x67 # CHECK: tnei $9, 17767 -# CHECK: cache 1, 8($5) -0x20 0x25 0x60 0x08 +0x20 0x25 0x60 0x08 # CHECK: cache 1, 8($5) -# CHECK: pref 1, 8($5) -0x60 0x25 0x20 0x08 +0x60 0x25 0x20 0x08 # CHECK: pref 1, 8($5) -# CHECK: ssnop -0x00 0x00 0x08 0x00 +0x00 0x00 0x08 0x00 # CHECK: ssnop -# CHECK: ehb -0x00 0x00 0x18 0x00 +0x00 0x00 0x18 0x00 # CHECK: ehb -# CHECK: pause -0x00 0x00 0x28 0x00 +0x00 0x00 0x28 0x00 # CHECK: pause -# CHECK: ll $2, 8($4) -0x60 0x44 0x30 0x08 +0x60 0x44 0x30 0x08 # CHECK: ll $2, 8($4) -# CHECK: sc $2, 8($4) -0x60 0x44 0xb0 0x08 +0x60 0x44 0xb0 0x08 # CHECK: sc $2, 8($4) -# CHECK: lwxs $2, $3($4) -0x00 0x64 0x11 0x18 +0x00 0x64 0x11 0x18 # CHECK: lwxs $2, $3($4) -# CHECK: bgezals $6, 1332 -0x42 0x66 0x02 0x9a +0x42 0x66 0x02 0x9a # CHECK: bgezals $6, 1332 -# CHECK: bltzals $6, 1332 -0x42 0x26 0x02 0x9a +0x42 0x26 0x02 0x9a # CHECK: bltzals $6, 1332 -# CHECK: beqzc $9, 1332 -0x40 0xe9 0x02 0x9a +0x40 0xe9 0x02 0x9a # CHECK: beqzc $9, 1332 -# CHECK: bnezc $9, 1332 -0x40 0xa9 0x02 0x9a +0x40 0xa9 0x02 0x9a # CHECK: bnezc $9, 1332 -# CHECK: jals 1328 -0x74 0x00 0x02 0x98 +0x74 0x00 0x02 0x98 # CHECK: jals 1328 -# CHECK: jalrs $ra, $6 -0x03 0xe6 0x4f 0x3c +0x03 0xe6 0x4f 0x3c # CHECK: jalrs $ra, $6 -# CHECK: lwm32 $16, $17, 8($4) -0x20 0x44 0x50 0x08 +0x20 0x44 0x50 0x08 # CHECK: lwm32 $16, $17, 8($4) -# CHECK: swm32 $16, $17, 8($4) -0x20 0x44 0xd0 0x08 +0x20 0x44 0xd0 0x08 # CHECK: swm32 $16, $17, 8($4) -# CHECK: swp $16, 8($4) -0x22 0x04 0x90 0x08 +0x22 0x04 0x90 0x08 # CHECK: swp $16, 8($4) -# CHECK: lwp $16, 8($4) -0x22 0x04 0x10 0x08 +0x22 0x04 0x10 0x08 # CHECK: lwp $16, 8($4) -# CHECK: nop -0x00 0x00 0x00 0x00 +0x00 0x00 0x00 0x00 # CHECK: nop -# CHECK: addiupc $2, 20 -0x79 0x00 0x00 0x05 +0x79 0x00 0x00 0x05 # CHECK: addiupc $2, 20 -# CHECK: addiupc $7, 16777212 -0x7b 0xbf 0xff 0xff +0x7b 0xbf 0xff 0xff # CHECK: addiupc $7, 16777212 -# CHECK: addiupc $7, -16777216 -0x7b 0xc0 0x00 0x00 +0x7b 0xc0 0x00 0x00 # CHECK: addiupc $7, -16777216 -# CHECK: addu16 $6, $17, $4 -0x07 0x42 +0x07 0x42 # CHECK: addu16 $6, $17, $4 -# CHECK: subu16 $5, $16, $3 -0x06 0xb1 +0x06 0xb1 # CHECK: subu16 $5, $16, $3 -# CHECK: and16 $16, $2 -0x44 0x82 +0x44 0x82 # CHECK: and16 $16, $2 -# CHECK: not16 $17, $3 -0x44 0x0b +0x44 0x0b # CHECK: not16 $17, $3 -# CHECK: or16 $16, $4 -0x44 0xc4 +0x44 0xc4 # CHECK: or16 $16, $4 -# CHECK: xor16 $17, $5 -0x44 0x4d +0x44 0x4d # CHECK: xor16 $17, $5 -# CHECK: sll16 $3, $16, 5 -0x25 0x8a +0x25 0x8a # CHECK: sll16 $3, $16, 5 -# CHECK: srl16 $4, $17, 6 -0x26 0x1d +0x26 0x1d # CHECK: srl16 $4, $17, 6 -# CHECK: lbu16 $3, 4($17) -0x09 0x94 +0x09 0x94 # CHECK: lbu16 $3, 4($17) -# CHECK: lbu16 $3, -1($16) -0x09 0x8f +0x09 0x8f # CHECK: lbu16 $3, -1($16) -# CHECK: lhu16 $3, 4($16) -0x29 0x82 +0x29 0x82 # CHECK: lhu16 $3, 4($16) -# CHECK: lw16 $4, 8($17) -0x6a 0x12 +0x6a 0x12 # CHECK: lw16 $4, 8($17) -# CHECK: sb16 $3, 4($16) -0x89 0x84 +0x89 0x84 # CHECK: sb16 $3, 4($16) -# CHECK: sh16 $4, 8($17) -0xaa 0x14 +0xaa 0x14 # CHECK: sh16 $4, 8($17) -# CHECK: sw16 $4, 4($17) -0xea 0x11 +0xea 0x11 # CHECK: sw16 $4, 4($17) -# CHECK: sw16 $zero, 4($17) -0xe8 0x11 +0xe8 0x11 # CHECK: sw16 $zero, 4($17) -# CHECK: mfhi $9 -0x46 0x09 +0x46 0x09 # CHECK: mfhi $9 -# CHECK: mflo $9 -0x46 0x49 +0x46 0x49 # CHECK: mflo $9 -# CHECK: move $25, $1 -0x0f 0x21 +0x0f 0x21 # CHECK: move $25, $1 -# CHECK: jrc $9 -0x45 0xa9 +0x45 0xa9 # CHECK: jrc $9 -# CHECK: jalr $9 -0x45 0xc9 +0x45 0xc9 # CHECK: jalr $9 -# CHECK: jalrs16 $9 -0x45 0xe9 +0x45 0xe9 # CHECK: jalrs16 $9 -# CHECK: jr16 $9 -0x45 0x89 +0x45 0x89 # CHECK: jr16 $9 -# CHECK: li16 $3, -1 -0xed 0xff +0xed 0xff # CHECK: li16 $3, -1 -# CHECK: li16 $3, 126 -0xed 0xfe +0xed 0xfe # CHECK: li16 $3, 126 -# CHECK: addiur1sp $7, 4 -0x6f 0x83 +0x6f 0x83 # CHECK: addiur1sp $7, 4 -# CHECK: addiur2 $6, $7, -1 -0x6f 0x7e +0x6f 0x7e # CHECK: addiur2 $6, $7, -1 -# CHECK: addiur2 $6, $7, 12 -0x6f 0x76 +0x6f 0x76 # CHECK: addiur2 $6, $7, 12 -# CHECK: addius5 $7, -2 -0x4c 0xfc +0x4c 0xfc # CHECK: addius5 $7, -2 -# CHECK: nop -0x0c 0x00 +0x0c 0x00 # CHECK: nop -# CHECK: lw $3, 32($sp) -0x48 0x68 +0x48 0x68 # CHECK: lw $3, 32($sp) -# CHECK: sw $4, 124($sp) -0xc8 0x9f +0xc8 0x9f # CHECK: sw $4, 124($sp) -# CHECK: beqz16 $6, 20 -0x8f 0x0a +0x8f 0x0a # CHECK: beqz16 $6, 20 -# CHECK: bnez16 $6, 20 -0xaf 0x0a +0xaf 0x0a # CHECK: bnez16 $6, 20 -# CHECK: b16 132 -0xcc 0x42 +0xcc 0x42 # CHECK: b16 132 -# CHECK: lw $3, 32($gp) -0x65 0x88 +0x65 0x88 # CHECK: lw $3, 32($gp) -# CHECK: lwm16 $16, $17, $ra, 8($sp) -0x45 0x12 +0x45 0x12 # CHECK: lwm16 $16, $17, $ra, 8($sp) -# CHECK: swm16 $16, $17, $ra, 8($sp) -0x45 0x52 +0x45 0x52 # CHECK: swm16 $16, $17, $ra, 8($sp) -# CHECK: break16 8 -0x46 0x88 +0x46 0x88 # CHECK: break16 8 -# CHECK: sdbbp16 14 -0x46 0xce +0x46 0xce # CHECK: sdbbp16 14 -# CHECK: movep $5, $6, $2, $3 -0x84 0x34 +0x84 0x34 # CHECK: movep $5, $6, $2, $3 diff --git a/test/MC/Disassembler/Mips/micromips32r6.txt b/test/MC/Disassembler/Mips/micromips32r6.txt index dee6fbef4090..47c4d080f0a2 100644 --- a/test/MC/Disassembler/Mips/micromips32r6.txt +++ b/test/MC/Disassembler/Mips/micromips32r6.txt @@ -32,17 +32,13 @@ 0xc0 0x40 0x02 0x9a # CHECK: blezalc $2, 1332 -# CHECK: balc 14572256 -0xb4 0x37 0x96 0xb8 +0xb4 0x37 0x96 0xb8 # CHECK: balc 14572256 -# CHECK: bc 14572256 -0x94 0x37 0x96 0xb8 +0x94 0x37 0x96 0xb8 # CHECK: bc 14572256 -# CHECK: bitswap $4, $2 -0x00 0x44 0x0b 0x3c +0x00 0x44 0x0b 0x3c # CHECK: bitswap $4, $2 -# CHECK: cache 1, 8($5) -0x20 0x25 0x60 0x08 +0x20 0x25 0x60 0x08 # CHECK: cache 1, 8($5) 0x01 0x65 0x4b 0x3c # CHECK: clo $11, $5 @@ -52,6 +48,10 @@ 0x00 0xa4 0x19 0x98 # CHECK: divu $3, $4, $5 +0x00 0x00 0xf3 0x7c # CHECK: eret + +0x00 0x01 0xf3 0x7c # CHECK: eretnc + 0x80 0x05 0x01 0x00 # CHECK: jialc $5, 256 0xa0 0x05 0x01 0x00 # CHECK: jic $5, 256 @@ -78,8 +78,7 @@ 0x50 0x64 0x04 0xd2 # CHECK: ori $3, $4, 1234 -# CHECK: pref 1, 8($5) -0x60 0x25 0x20 0x08 +0x60 0x25 0x20 0x08 # CHECK: pref 1, 8($5) 0x00 0x83 0x11 0x40 # CHECK: seleqz $2, $3, $4 diff --git a/test/MC/Disassembler/Mips/micromips_le.txt b/test/MC/Disassembler/Mips/micromips_le.txt index 3f3b3255972b..3899c510330e 100644 --- a/test/MC/Disassembler/Mips/micromips_le.txt +++ b/test/MC/Disassembler/Mips/micromips_le.txt @@ -1,506 +1,338 @@ # RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mattr=micromips \ # RUN: | FileCheck %s -# CHECK: add $9, $6, $7 -0xe6 0x00 0x10 0x49 +0xe6 0x00 0x10 0x49 # CHECK: add $9, $6, $7 -# CHECK: addi $9, $6, 17767 -0x26 0x11 0x67 0x45 +0x26 0x11 0x67 0x45 # CHECK: addi $9, $6, 17767 -# CHECK: addiu $9, $6, -15001 -0x26 0x31 0x67 0xc5 +0x26 0x31 0x67 0xc5 # CHECK: addiu $9, $6, -15001 -# CHECK: addi $9, $6, 17767 -0x26 0x11 0x67 0x45 +0x26 0x11 0x67 0x45 # CHECK: addi $9, $6, 17767 -# CHECK: addiu $9, $6, -15001 -0x26 0x31 0x67 0xc5 +0x26 0x31 0x67 0xc5 # CHECK: addiu $9, $6, -15001 -# CHECK: addiusp -16 -0xf9 0x4f +0xf9 0x4f # CHECK: addiusp -16 -# CHECK: addiusp -1028 -0xff 0x4f +0xff 0x4f # CHECK: addiusp -1028 -# CHECK: addiusp -1032 -0xfd 0x4f +0xfd 0x4f # CHECK: addiusp -1032 -# CHECK: addiusp 1024 -0x01 0x4c +0x01 0x4c # CHECK: addiusp 1024 -# CHECK: addiusp 1028 -0x03 0x4c +0x03 0x4c # CHECK: addiusp 1028 -# CHECK: addu $9, $6, $7 -0xe6 0x00 0x50 0x49 +0xe6 0x00 0x50 0x49 # CHECK: addu $9, $6, $7 -# CHECK: andi16 $16, $2, 31 -0x29 0x2c +0x29 0x2c # CHECK: andi16 $16, $2, 31 -# CHECK: sub $9, $6, $7 -0xe6 0x00 0x90 0x49 +0xe6 0x00 0x90 0x49 # CHECK: sub $9, $6, $7 -# CHECK: subu $4, $3, $5 -0xa3 0x00 0xd0 0x21 +0xa3 0x00 0xd0 0x21 # CHECK: subu $4, $3, $5 -# CHECK: sub $6, $zero, $7 -0xe0 0x00 0x90 0x31 +0xe0 0x00 0x90 0x31 # CHECK: sub $6, $zero, $7 -# CHECK: subu $6, $zero, $7 -0xe0 0x00 0xd0 0x31 +0xe0 0x00 0xd0 0x31 # CHECK: subu $6, $zero, $7 -# CHECK: addu $7, $8, $zero -0x08 0x00 0x50 0x39 +0x08 0x00 0x50 0x39 # CHECK: addu $7, $8, $zero -# CHECK: slt $3, $3, $5 -0xa3 0x00 0x50 0x1b +0xa3 0x00 0x50 0x1b # CHECK: slt $3, $3, $5 -# CHECK: slti $3, $3, 103 -0x63 0x90 0x67 0x00 +0x63 0x90 0x67 0x00 # CHECK: slti $3, $3, 103 -# CHECK: slti $3, $3, 103 -0x63 0x90 0x67 0x00 +0x63 0x90 0x67 0x00 # CHECK: slti $3, $3, 103 -# CHECK: sltiu $3, $3, 103 -0x63 0xb0 0x67 0x00 +0x63 0xb0 0x67 0x00 # CHECK: sltiu $3, $3, 103 -# CHECK: sltu $3, $3, $5 -0xa3 0x00 0x90 0x1b +0xa3 0x00 0x90 0x1b # CHECK: sltu $3, $3, $5 -# CHECK: lui $9, 17767 -0xa9 0x41 0x67 0x45 +0xa9 0x41 0x67 0x45 # CHECK: lui $9, 17767 -# CHECK: and $9, $6, $7 -0xe6 0x00 0x50 0x4a +0xe6 0x00 0x50 0x4a # CHECK: and $9, $6, $7 -# CHECK: andi $9, $6, 17767 -0x26 0xd1 0x67 0x45 +0x26 0xd1 0x67 0x45 # CHECK: andi $9, $6, 17767 -# CHECK: andi $9, $6, 17767 -0x26 0xd1 0x67 0x45 +0x26 0xd1 0x67 0x45 # CHECK: andi $9, $6, 17767 -# CHECK: or $3, $4, $5 -0xa4 0x00 0x90 0x1a +0xa4 0x00 0x90 0x1a # CHECK: or $3, $4, $5 -# CHECK: ori $9, $6, 17767 -0x26 0x51 0x67 0x45 +0x26 0x51 0x67 0x45 # CHECK: ori $9, $6, 17767 -# CHECK: xor $3, $3, $5 -0xa3 0x00 0x10 0x1b +0xa3 0x00 0x10 0x1b # CHECK: xor $3, $3, $5 -# CHECK: xori $9, $6, 17767 -0x26 0x71 0x67 0x45 +0x26 0x71 0x67 0x45 # CHECK: xori $9, $6, 17767 -# CHECK: xori $9, $6, 17767 -0x26 0x71 0x67 0x45 +0x26 0x71 0x67 0x45 # CHECK: xori $9, $6, 17767 -# CHECK: nor $9, $6, $7 -0xe6 0x00 0xd0 0x4a +0xe6 0x00 0xd0 0x4a # CHECK: nor $9, $6, $7 -# CHECK: not $7, $8 -0x08 0x00 0xd0 0x3a +0x08 0x00 0xd0 0x3a # CHECK: not $7, $8 -# CHECK: mul $9, $6, $7 -0xe6 0x00 0x10 0x4a +0xe6 0x00 0x10 0x4a # CHECK: mul $9, $6, $7 -# CHECK: mult $9, $7 -0xe9 0x00 0x3c 0x8b +0xe9 0x00 0x3c 0x8b # CHECK: mult $9, $7 -# CHECK: multu $9, $7 -0xe9 0x00 0x3c 0x9b +0xe9 0x00 0x3c 0x9b # CHECK: multu $9, $7 -# CHECK: div $zero, $9, $7 -0xe9 0x00 0x3c 0xab +0xe9 0x00 0x3c 0xab # CHECK: div $zero, $9, $7 -# CHECK: divu $zero, $9, $7 -0xe9 0x00 0x3c 0xbb +0xe9 0x00 0x3c 0xbb # CHECK: divu $zero, $9, $7 -# CHECK: sll $4, $3, 7 -0x83 0x00 0x00 0x38 +0x83 0x00 0x00 0x38 # CHECK: sll $4, $3, 7 -# CHECK: sllv $2, $3, $5 -0x65 0x00 0x10 0x10 +0x65 0x00 0x10 0x10 # CHECK: sllv $2, $3, $5 -# CHECK: sra $4, $3, 7 -0x83 0x00 0x80 0x38 +0x83 0x00 0x80 0x38 # CHECK: sra $4, $3, 7 -# CHECK: srav $2, $3, $5 -0x65 0x00 0x90 0x10 +0x65 0x00 0x90 0x10 # CHECK: srav $2, $3, $5 -# CHECK: srl $4, $3, 7 -0x83 0x00 0x40 0x38 +0x83 0x00 0x40 0x38 # CHECK: srl $4, $3, 7 -# CHECK: srlv $2, $3, $5 -0x65 0x00 0x50 0x10 +0x65 0x00 0x50 0x10 # CHECK: srlv $2, $3, $5 -# CHECK: rotr $9, $6, 7 -0x26 0x01 0xc0 0x38 +0x26 0x01 0xc0 0x38 # CHECK: rotr $9, $6, 7 -# CHECK: rotrv $9, $6, $7 -0xc7 0x00 0xd0 0x48 +0xc7 0x00 0xd0 0x48 # CHECK: rotrv $9, $6, $7 -# CHECK: lb $5, 8($4) -0xa4 0x1c 0x08 0x00 +0xa4 0x1c 0x08 0x00 # CHECK: lb $5, 8($4) -# CHECK: lbu $6, 8($4) -0xc4 0x14 0x08 0x00 +0xc4 0x14 0x08 0x00 # CHECK: lbu $6, 8($4) -# CHECK: lh $2, 8($4) -0x44 0x3c 0x08 0x00 +0x44 0x3c 0x08 0x00 # CHECK: lh $2, 8($4) -# CHECK: lhu $4, 8($2) -0x82 0x34 0x08 0x00 +0x82 0x34 0x08 0x00 # CHECK: lhu $4, 8($2) -# CHECK: lw $6, 4($5) -0xc5 0xfc 0x04 0x00 +0xc5 0xfc 0x04 0x00 # CHECK: lw $6, 4($5) -# CHECK: lw $6, 123($sp) -0xdd 0xfc 0x7b 0x00 +0xdd 0xfc 0x7b 0x00 # CHECK: lw $6, 123($sp) -# CHECK: sb $5, 8($4) -0xa4 0x18 0x08 0x00 +0xa4 0x18 0x08 0x00 # CHECK: sb $5, 8($4) -# CHECK: sh $2, 8($4) -0x44 0x38 0x08 0x00 +0x44 0x38 0x08 0x00 # CHECK: sh $2, 8($4) -# CHECK: sw $5, 4($6) -0xa6 0xf8 0x04 0x00 +0xa6 0xf8 0x04 0x00 # CHECK: sw $5, 4($6) -# CHECK: sw $5, 123($sp) -0xbd 0xf8 0x7b 0x00 +0xbd 0xf8 0x7b 0x00 # CHECK: sw $5, 123($sp) -# CHECK: lwu $2, 8($4) -0x44 0x60 0x08 0xe0 +0x44 0x60 0x08 0xe0 # CHECK: lwu $2, 8($4) -# CHECK: lwl $4, 16($5) -0x85 0x60 0x10 0x00 +0x85 0x60 0x10 0x00 # CHECK: lwl $4, 16($5) -# CHECK: lwr $4, 16($5) -0x85 0x60 0x10 0x10 +0x85 0x60 0x10 0x10 # CHECK: lwr $4, 16($5) -# CHECK: swl $4, 16($5) -0x85 0x60 0x10 0x80 +0x85 0x60 0x10 0x80 # CHECK: swl $4, 16($5) -# CHECK: swr $4, 16($5) -0x85 0x60 0x10 0x90 +0x85 0x60 0x10 0x90 # CHECK: swr $4, 16($5) -# CHECK: movz $9, $6, $7 -0xe6 0x00 0x58 0x48 +0xe6 0x00 0x58 0x48 # CHECK: movz $9, $6, $7 -# CHECK: movn $9, $6, $7 -0xe6 0x00 0x18 0x48 +0xe6 0x00 0x18 0x48 # CHECK: movn $9, $6, $7 -# CHECK: movt $9, $6, $fcc0 -0x26 0x55 0x7b 0x09 +0x26 0x55 0x7b 0x09 # CHECK: movt $9, $6, $fcc0 -# CHECK: movf $9, $6, $fcc0 -0x26 0x55 0x7b 0x01 +0x26 0x55 0x7b 0x01 # CHECK: movf $9, $6, $fcc0 -# CHECK: mthi $6 -0x06 0x00 0x7c 0x2d +0x06 0x00 0x7c 0x2d # CHECK: mthi $6 -# CHECK: mfhi $6 -0x06 0x00 0x7c 0x0d +0x06 0x00 0x7c 0x0d # CHECK: mfhi $6 -# CHECK: mtlo $6 -0x06 0x00 0x7c 0x3d +0x06 0x00 0x7c 0x3d # CHECK: mtlo $6 -# CHECK: mflo $6 -0x06 0x00 0x7c 0x1d +0x06 0x00 0x7c 0x1d # CHECK: mflo $6 -# CHECK: madd $4, $5 -0xa4 0x00 0x3c 0xcb +0xa4 0x00 0x3c 0xcb # CHECK: madd $4, $5 -# CHECK: maddu $4, $5 -0xa4 0x00 0x3c 0xdb +0xa4 0x00 0x3c 0xdb # CHECK: maddu $4, $5 -# CHECK: msub $4, $5 -0xa4 0x00 0x3c 0xeb +0xa4 0x00 0x3c 0xeb # CHECK: msub $4, $5 -# CHECK: msubu $4, $5 -0xa4 0x00 0x3c 0xfb +0xa4 0x00 0x3c 0xfb # CHECK: msubu $4, $5 -# CHECK: clz $9, $6 -0x26 0x01 0x3c 0x5b +0x26 0x01 0x3c 0x5b # CHECK: clz $9, $6 -# CHECK: clo $9, $6 -0x26 0x01 0x3c 0x4b +0x26 0x01 0x3c 0x4b # CHECK: clo $9, $6 -# CHECK: seb $9, $6 -0x26 0x01 0x3c 0x2b +0x26 0x01 0x3c 0x2b # CHECK: seb $9, $6 -# CHECK: seh $9, $6 -0x26 0x01 0x3c 0x3b +0x26 0x01 0x3c 0x3b # CHECK: seh $9, $6 -# CHECK: wsbh $9, $6 -0x26 0x01 0x3c 0x7b +0x26 0x01 0x3c 0x7b # CHECK: wsbh $9, $6 -# CHECK: ext $9, $6, 3, 7 -0x26 0x01 0xec 0x30 +0x26 0x01 0xec 0x30 # CHECK: ext $9, $6, 3, 7 -# CHECK: ins $9, $6, 3, 7 -0x26 0x01 0xcc 0x48 +0x26 0x01 0xcc 0x48 # CHECK: ins $9, $6, 3, 7 -# CHECK: j 1328 -0x00 0xd4 0x98 0x02 +0x00 0xd4 0x98 0x02 # CHECK: j 1328 -# CHECK: jal 1328 -0x00 0xf4 0x98 0x02 +0x00 0xf4 0x98 0x02 # CHECK: jal 1328 -# CHECK: jalr $ra, $6 -0xe6 0x03 0x3c 0x0f +0xe6 0x03 0x3c 0x0f # CHECK: jalr $ra, $6 -# CHECK: jr $7 -0x07 0x00 0x3c 0x0f +0x07 0x00 0x3c 0x0f # CHECK: jr $7 -# CHECK: jraddiusp 20 -0x05 0x47 +0x05 0x47 # CHECK: jraddiusp 20 -# CHECK: beq $9, $6, 1332 -0xc9 0x94 0x9a 0x02 +0xc9 0x94 0x9a 0x02 # CHECK: beq $9, $6, 1332 -# CHECK: bgez $6, 1332 -0x46 0x40 0x9a 0x02 +0x46 0x40 0x9a 0x02 # CHECK: bgez $6, 1332 -# CHECK: bgezal $6, 1332 -0x66 0x40 0x9a 0x02 +0x66 0x40 0x9a 0x02 # CHECK: bgezal $6, 1332 -# CHECK: bltzal $6, 1332 -0x26 0x40 0x9a 0x02 +0x26 0x40 0x9a 0x02 # CHECK: bltzal $6, 1332 -# CHECK: bgtz $6, 1332 -0xc6 0x40 0x9a 0x02 +0xc6 0x40 0x9a 0x02 # CHECK: bgtz $6, 1332 -# CHECK: blez $6, 1332 -0x86 0x40 0x9a 0x02 +0x86 0x40 0x9a 0x02 # CHECK: blez $6, 1332 -# CHECK: bne $9, $6, 1332 -0xc9 0xb4 0x9a 0x02 +0xc9 0xb4 0x9a 0x02 # CHECK: bne $9, $6, 1332 -# CHECK: bltz $6, 1332 -0x06 0x40 0x9a 0x02 +0x06 0x40 0x9a 0x02 # CHECK: bltz $6, 1332 -# CHECK: teq $8, $9, 0 -0x28 0x01 0x3c 0x00 +0x28 0x01 0x3c 0x00 # CHECK: teq $8, $9, 0 -# CHECK: tge $8, $9, 0 -0x28 0x01 0x3c 0x02 +0x28 0x01 0x3c 0x02 # CHECK: tge $8, $9, 0 -# CHECK: tgeu $8, $9, 0 -0x28 0x01 0x3c 0x04 +0x28 0x01 0x3c 0x04 # CHECK: tgeu $8, $9, 0 -# CHECK: tlt $8, $9, 0 -0x28 0x01 0x3c 0x08 +0x28 0x01 0x3c 0x08 # CHECK: tlt $8, $9, 0 -# CHECK: tltu $8, $9, 0 -0x28 0x01 0x3c 0x0a +0x28 0x01 0x3c 0x0a # CHECK: tltu $8, $9, 0 -# CHECK: tne $8, $9, 0 -0x28 0x01 0x3c 0x0c +0x28 0x01 0x3c 0x0c # CHECK: tne $8, $9, 0 -# CHECK: teqi $9, 17767 -0xc9 0x41 0x67 0x45 +0xc9 0x41 0x67 0x45 # CHECK: teqi $9, 17767 -# CHECK: tgei $9, 17767 -0x29 0x41 0x67 0x45 +0x29 0x41 0x67 0x45 # CHECK: tgei $9, 17767 -# CHECK: tgeiu $9, 17767 -0x69 0x41 0x67 0x45 +0x69 0x41 0x67 0x45 # CHECK: tgeiu $9, 17767 -# CHECK: tlti $9, 17767 -0x09 0x41 0x67 0x45 +0x09 0x41 0x67 0x45 # CHECK: tlti $9, 17767 -# CHECK: tltiu $9, 17767 -0x49 0x41 0x67 0x45 +0x49 0x41 0x67 0x45 # CHECK: tltiu $9, 17767 -# CHECK: tnei $9, 17767 -0x89 0x41 0x67 0x45 +0x89 0x41 0x67 0x45 # CHECK: tnei $9, 17767 -# CHECK: cache 1, 8($5) -0x25 0x20 0x08 0x60 +0x25 0x20 0x08 0x60 # CHECK: cache 1, 8($5) -# CHECK: pref 1, 8($5) -0x25 0x60 0x08 0x20 +0x25 0x60 0x08 0x20 # CHECK: pref 1, 8($5) -# CHECK: ssnop -0x00 0x00 0x00 0x08 +0x00 0x00 0x00 0x08 # CHECK: ssnop -# CHECK: ehb -0x00 0x00 0x00 0x18 +0x00 0x00 0x00 0x18 # CHECK: ehb -# CHECK: pause -0x00 0x00 0x00 0x28 +0x00 0x00 0x00 0x28 # CHECK: pause -# CHECK: ll $2, 8($4) -0x44 0x60 0x08 0x30 +0x44 0x60 0x08 0x30 # CHECK: ll $2, 8($4) -# CHECK: sc $2, 8($4) -0x44 0x60 0x08 0xb0 +0x44 0x60 0x08 0xb0 # CHECK: sc $2, 8($4) -# CHECK: lwxs $2, $3($4) -0x64 0x00 0x18 0x11 +0x64 0x00 0x18 0x11 # CHECK: lwxs $2, $3($4) -# CHECK: bgezals $6, 1332 -0x66 0x42 0x9a 0x02 +0x66 0x42 0x9a 0x02 # CHECK: bgezals $6, 1332 -# CHECK: bltzals $6, 1332 -0x26 0x42 0x9a 0x02 +0x26 0x42 0x9a 0x02 # CHECK: bltzals $6, 1332 -# CHECK: beqzc $9, 1332 -0xe9 0x40 0x9a 0x02 +0xe9 0x40 0x9a 0x02 # CHECK: beqzc $9, 1332 -# CHECK: bnezc $9, 1332 -0xa9 0x40 0x9a 0x02 +0xa9 0x40 0x9a 0x02 # CHECK: bnezc $9, 1332 -# CHECK: jals 1328 -0x00 0x74 0x98 0x02 +0x00 0x74 0x98 0x02 # CHECK: jals 1328 -# CHECK: jalrs $ra, $6 -0xe6 0x03 0x3c 0x4f +0xe6 0x03 0x3c 0x4f # CHECK: jalrs $ra, $6 -# CHECK: lwm32 $16, $17, 8($4) -0x44 0x20 0x08 0x50 +0x44 0x20 0x08 0x50 # CHECK: lwm32 $16, $17, 8($4) -# CHECK: swm32 $16, $17, 8($4) -0x44 0x20 0x08 0xd0 +0x44 0x20 0x08 0xd0 # CHECK: swm32 $16, $17, 8($4) -# CHECK: swp $16, 8($4) -0x04 0x22 0x08 0x90 +0x04 0x22 0x08 0x90 # CHECK: swp $16, 8($4) -# CHECK: lwp $16, 8($4) -0x04 0x22 0x08 0x10 +0x04 0x22 0x08 0x10 # CHECK: lwp $16, 8($4) -# CHECK: nop -0x00 0x00 0x00 0x00 +0x00 0x00 0x00 0x00 # CHECK: nop -# CHECK: addiupc $2, 20 -0x00 0x79 0x05 0x00 +0x00 0x79 0x05 0x00 # CHECK: addiupc $2, 20 -# CHECK: addiupc $7, 16777212 -0xbf 0x7b 0xff 0xff +0xbf 0x7b 0xff 0xff # CHECK: addiupc $7, 16777212 -# CHECK: addiupc $7, -16777216 -0xc0 0x7b 0x00 0x00 +0xc0 0x7b 0x00 0x00 # CHECK: addiupc $7, -16777216 -# CHECK: addu16 $6, $17, $4 -0x42 0x07 +0x42 0x07 # CHECK: addu16 $6, $17, $4 -# CHECK: subu16 $5, $16, $3 -0xb1 0x06 +0xb1 0x06 # CHECK: subu16 $5, $16, $3 -# CHECK: and16 $16, $2 -0x82 0x44 +0x82 0x44 # CHECK: and16 $16, $2 -# CHECK: not16 $17, $3 -0x0b 0x44 +0x0b 0x44 # CHECK: not16 $17, $3 -# CHECK: or16 $16, $4 -0xc4 0x44 +0xc4 0x44 # CHECK: or16 $16, $4 -# CHECK: xor16 $17, $5 -0x4d 0x44 +0x4d 0x44 # CHECK: xor16 $17, $5 -# CHECK: sll16 $3, $16, 5 -0x8a 0x25 +0x8a 0x25 # CHECK: sll16 $3, $16, 5 -# CHECK: srl16 $4, $17, 6 -0x1d 0x26 +0x1d 0x26 # CHECK: srl16 $4, $17, 6 -# CHECK: lbu16 $3, 4($17) -0x94 0x09 +0x94 0x09 # CHECK: lbu16 $3, 4($17) -# CHECK: lbu16 $3, -1($16) -0x8f 0x09 +0x8f 0x09 # CHECK: lbu16 $3, -1($16) -# CHECK: lhu16 $3, 4($16) -0x82 0x29 +0x82 0x29 # CHECK: lhu16 $3, 4($16) -# CHECK: lw16 $4, 8($17) -0x12 0x6a +0x12 0x6a # CHECK: lw16 $4, 8($17) -# CHECK: sb16 $3, 4($16) -0x84 0x89 +0x84 0x89 # CHECK: sb16 $3, 4($16) -# CHECK: sh16 $4, 8($17) -0x14 0xaa +0x14 0xaa # CHECK: sh16 $4, 8($17) -# CHECK: sw16 $4, 4($17) -0x11 0xea +0x11 0xea # CHECK: sw16 $4, 4($17) -# CHECK: sw16 $zero, 4($17) -0x11 0xe8 +0x11 0xe8 # CHECK: sw16 $zero, 4($17) -# CHECK: mfhi $9 -0x09 0x46 +0x09 0x46 # CHECK: mfhi $9 -# CHECK: mflo $9 -0x49 0x46 +0x49 0x46 # CHECK: mflo $9 -# CHECK: move $25, $1 -0x21 0x0f +0x21 0x0f # CHECK: move $25, $1 -# CHECK: jrc $9 -0xa9 0x45 +0xa9 0x45 # CHECK: jrc $9 -# CHECK: jalr $9 -0xc9 0x45 +0xc9 0x45 # CHECK: jalr $9 -# CHECK: jalrs16 $9 -0xe9 0x45 +0xe9 0x45 # CHECK: jalrs16 $9 -# CHECK: jr16 $9 -0x89 0x45 +0x89 0x45 # CHECK: jr16 $9 -# CHECK: li16 $3, -1 -0xff 0xed +0xff 0xed # CHECK: li16 $3, -1 -# CHECK: li16 $3, 126 -0xfe 0xed +0xfe 0xed # CHECK: li16 $3, 126 -# CHECK: addiur1sp $7, 4 -0x83 0x6f +0x83 0x6f # CHECK: addiur1sp $7, 4 -# CHECK: addiur2 $6, $7, -1 -0x7e 0x6f +0x7e 0x6f # CHECK: addiur2 $6, $7, -1 -# CHECK: addiur2 $6, $7, 12 -0x76 0x6f +0x76 0x6f # CHECK: addiur2 $6, $7, 12 -# CHECK: addius5 $7, -2 -0xfc 0x4c +0xfc 0x4c # CHECK: addius5 $7, -2 -# CHECK: nop -0x00 0x0c +0x00 0x0c # CHECK: nop -# CHECK: lw $3, 32($sp) -0x68 0x48 +0x68 0x48 # CHECK: lw $3, 32($sp) -# CHECK: sw $4, 124($sp) -0x9f 0xc8 +0x9f 0xc8 # CHECK: sw $4, 124($sp) -# CHECK: beqz16 $6, 20 -0x0a 0x8f +0x0a 0x8f # CHECK: beqz16 $6, 20 -# CHECK: bnez16 $6, 20 -0x0a 0xaf +0x0a 0xaf # CHECK: bnez16 $6, 20 -# CHECK: b16 132 -0x42 0xcc +0x42 0xcc # CHECK: b16 132 -# CHECK: lw $3, 32($gp) -0x88 0x65 +0x88 0x65 # CHECK: lw $3, 32($gp) -# CHECK: lwm16 $16, $17, $ra, 8($sp) -0x12 0x45 +0x12 0x45 # CHECK: lwm16 $16, $17, $ra, 8($sp) -# CHECK: swm16 $16, $17, $ra, 8($sp) -0x52 0x45 +0x52 0x45 # CHECK: swm16 $16, $17, $ra, 8($sp) -# CHECK: break16 8 -0x88 0x46 +0x88 0x46 # CHECK: break16 8 -# CHECK: sdbbp16 14 -0xce 0x46 +0xce 0x46 # CHECK: sdbbp16 14 -# CHECK: movep $5, $6, $2, $3 -0x34 0x84 +0x34 0x84 # CHECK: movep $5, $6, $2, $3 diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt index a6e2367efcdb..0e3a83f6d3a5 100644 --- a/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt @@ -630,6 +630,12 @@ # CHECK: vrsqrtefp 2, 3 0x10 0x40 0x19 0x4a +# CHECK: vgbbd 2, 3 +0x10 0x40 0x1d 0x0c + +# CHECK: vbpermq 2, 5, 17 +0x10 0x45 0x8d 0x4c + # CHECK: vclzb 2, 3 0x10 0x40 0x1f 0x02 diff --git a/test/MC/MachO/AArch64/classrefs.s b/test/MC/MachO/AArch64/classrefs.s index 5edc82ca0b12..d92bbb4a57ab 100644 --- a/test/MC/MachO/AArch64/classrefs.s +++ b/test/MC/MachO/AArch64/classrefs.s @@ -9,10 +9,8 @@ // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: Lbar -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/test/MC/MachO/AArch64/darwin-ARM64-reloc.s b/test/MC/MachO/AArch64/darwin-ARM64-reloc.s index 07d52528e911..b4d0b082c8a5 100644 --- a/test/MC/MachO/AArch64/darwin-ARM64-reloc.s +++ b/test/MC/MachO/AArch64/darwin-ARM64-reloc.s @@ -40,127 +40,99 @@ L_.str: ; CHECK-NEXT: Offset: 0x24 ; CHECK-NEXT: PCRel: 1 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_PAGE21 (3) ; CHECK-NEXT: Symbol: L_.str -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x20 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_GOT_LOAD_PAGEOFF12 (6) ; CHECK-NEXT: Symbol: _data_ext -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x1C ; CHECK-NEXT: PCRel: 1 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_GOT_LOAD_PAGE21 (5) ; CHECK-NEXT: Symbol: _data_ext -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x18 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 0 ; CHECK-NEXT: Type: ARM64_RELOC_ADDEND (10) -; CHECK-NEXT: Symbol: 0x4 -; CHECK-NEXT: Scattered: 0 +; CHECK-NEXT: Section: - (4) ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x18 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_PAGEOFF12 (4) ; CHECK-NEXT: Symbol: _data -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x14 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 0 ; CHECK-NEXT: Type: ARM64_RELOC_ADDEND (10) -; CHECK-NEXT: Symbol: 0x1 -; CHECK-NEXT: Scattered: 0 +; CHECK-NEXT: Section: __text ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x14 ; CHECK-NEXT: PCRel: 1 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_PAGE21 (3) ; CHECK-NEXT: Symbol: _data -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x10 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 0 ; CHECK-NEXT: Type: ARM64_RELOC_ADDEND (10) -; CHECK-NEXT: Symbol: 0x4 -; CHECK-NEXT: Scattered: 0 +; CHECK-NEXT: Section: - (4) ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x10 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_PAGEOFF12 (4) ; CHECK-NEXT: Symbol: _data -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0xC ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_PAGEOFF12 (4) ; CHECK-NEXT: Symbol: _data -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x8 ; CHECK-NEXT: PCRel: 1 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_PAGE21 (3) ; CHECK-NEXT: Symbol: _data -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x4 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 0 ; CHECK-NEXT: Type: ARM64_RELOC_ADDEND (10) -; CHECK-NEXT: Symbol: 0x14 -; CHECK-NEXT: Scattered: 0 +; CHECK-NEXT: Section: - (20) ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x4 ; CHECK-NEXT: PCRel: 1 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_BRANCH26 (2) ; CHECK-NEXT: Symbol: _func -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x0 ; CHECK-NEXT: PCRel: 1 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_BRANCH26 (2) ; CHECK-NEXT: Symbol: _func -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: } ; CHECK-NEXT: Section __data { @@ -168,91 +140,71 @@ L_.str: ; CHECK-NEXT: Offset: 0x2C ; CHECK-NEXT: PCRel: 1 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_POINTER_TO_GOT (7) ; CHECK-NEXT: Symbol: _foo -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x24 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 3 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_POINTER_TO_GOT (7) ; CHECK-NEXT: Symbol: _foo -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x20 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_SUBTRACTOR (1) ; CHECK-NEXT: Symbol: _bar -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x20 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) ; CHECK-NEXT: Symbol: _foo -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x18 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 3 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_SUBTRACTOR (1) ; CHECK-NEXT: Symbol: _bar -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x18 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 3 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) ; CHECK-NEXT: Symbol: _foo -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x10 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 3 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_SUBTRACTOR (1) ; CHECK-NEXT: Symbol: _bar -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x10 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 3 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) ; CHECK-NEXT: Symbol: _foo -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x8 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 3 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) ; CHECK-NEXT: Symbol: _foo -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: Relocation { ; CHECK-NEXT: Offset: 0x0 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 3 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) ; CHECK-NEXT: Symbol: _foo -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: } ; CHECK-NEXT: ] diff --git a/test/MC/MachO/AArch64/ld64-workaround.s b/test/MC/MachO/AArch64/ld64-workaround.s index a33cacc075bd..63f91705599c 100644 --- a/test/MC/MachO/AArch64/ld64-workaround.s +++ b/test/MC/MachO/AArch64/ld64-workaround.s @@ -10,37 +10,29 @@ // CHECK-NEXT: Offset: 0x18 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: Llit16 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x10 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: Llit8 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x8 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: Llit4 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: Lcfstring -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/test/MC/MachO/AArch64/mergeable.s b/test/MC/MachO/AArch64/mergeable.s index fcd839527568..4fed04c93346 100644 --- a/test/MC/MachO/AArch64/mergeable.s +++ b/test/MC/MachO/AArch64/mergeable.s @@ -25,37 +25,29 @@ L1: // CHECK-NEXT: Offset: 0x18 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: L1 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x10 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: L1 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x8 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: L0 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: L0 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/test/MC/MachO/AArch64/reloc-crash.s b/test/MC/MachO/AArch64/reloc-crash.s index 4984947f65b5..f8ad4c4f751c 100644 --- a/test/MC/MachO/AArch64/reloc-crash.s +++ b/test/MC/MachO/AArch64/reloc-crash.s @@ -9,10 +9,8 @@ ; CHECK-NEXT: Offset: 0x0 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 3 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) ; CHECK-NEXT: Symbol: Lbar -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: } ; CHECK-NEXT: ] diff --git a/test/MC/MachO/AArch64/reloc-crash2.s b/test/MC/MachO/AArch64/reloc-crash2.s index 6ae44715c63e..3aa26281bc02 100644 --- a/test/MC/MachO/AArch64/reloc-crash2.s +++ b/test/MC/MachO/AArch64/reloc-crash2.s @@ -8,10 +8,8 @@ ; CHECK-NEXT: Offset: 0x0 ; CHECK-NEXT: PCRel: 0 ; CHECK-NEXT: Length: 2 -; CHECK-NEXT: Extern: 1 ; CHECK-NEXT: Type: ARM64_RELOC_PAGEOFF12 (4) ; CHECK-NEXT: Symbol: ltmp1 -; CHECK-NEXT: Scattered: 0 ; CHECK-NEXT: } ; CHECK-NEXT: } ; CHECK-NEXT: ] diff --git a/test/MC/MachO/ARM/static-movt-relocs.s b/test/MC/MachO/ARM/static-movt-relocs.s index 4385549035e7..d94be2f4f6c2 100644 --- a/test/MC/MachO/ARM/static-movt-relocs.s +++ b/test/MC/MachO/ARM/static-movt-relocs.s @@ -12,37 +12,29 @@ foo: @ CHECK-NEXT: Offset: 0x4 @ CHECK-NEXT: PCRel: 0 @ CHECK-NEXT: Length: 3 -@ CHECK-NEXT: Extern: 1 @ CHECK-NEXT: Type: ARM_RELOC_HALF (8) @ CHECK-NEXT: Symbol: bar -@ CHECK-NEXT: Scattered: 0 @ CHECK-NEXT: } @ CHECK-NEXT: Relocation { @ CHECK-NEXT: Offset: 0x10 @ CHECK-NEXT: PCRel: 0 @ CHECK-NEXT: Length: 3 -@ CHECK-NEXT: Extern: 0 @ CHECK-NEXT: Type: ARM_RELOC_PAIR (1) -@ CHECK-NEXT: Symbol: 0xFFFFFF -@ CHECK-NEXT: Scattered: 0 +@ CHECK-NEXT: Section: - @ CHECK-NEXT: } @ CHECK-NEXT: Relocation { @ CHECK-NEXT: Offset: 0x0 @ CHECK-NEXT: PCRel: 0 @ CHECK-NEXT: Length: 2 -@ CHECK-NEXT: Extern: 1 @ CHECK-NEXT: Type: ARM_RELOC_HALF (8) @ CHECK-NEXT: Symbol: bar -@ CHECK-NEXT: Scattered: 0 @ CHECK-NEXT: } @ CHECK-NEXT: Relocation { @ CHECK-NEXT: Offset: 0x0 @ CHECK-NEXT: PCRel: 0 @ CHECK-NEXT: Length: 2 -@ CHECK-NEXT: Extern: 0 @ CHECK-NEXT: Type: ARM_RELOC_PAIR (1) -@ CHECK-NEXT: Symbol: 0xFFFFFF -@ CHECK-NEXT: Scattered: 0 +@ CHECK-NEXT: Section: - @ CHECK-NEXT: } @ CHECK-NEXT: } @ CHECK-NEXT: ] diff --git a/test/MC/MachO/darwin-x86_64-diff-reloc-assign-2.s b/test/MC/MachO/darwin-x86_64-diff-reloc-assign-2.s index b69cd1b1710b..e3fa1335a0c4 100644 --- a/test/MC/MachO/darwin-x86_64-diff-reloc-assign-2.s +++ b/test/MC/MachO/darwin-x86_64-diff-reloc-assign-2.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple x86_64-apple-darwin9 %s -filetype=obj -o - | llvm-readobj -r | FileCheck %s +// RUN: llvm-mc -triple x86_64-apple-darwin9 %s -filetype=obj -o - | llvm-readobj -r --expand-relocs | FileCheck %s .data L_var1: @@ -10,7 +10,19 @@ L_var2: // CHECK: Relocations [ // CHECK-NEXT: Section __data { -// CHECK-NEXT: 0x4 0 2 0 X86_64_RELOC_SUBTRACTOR 0 0x2 -// CHECK-NEXT: 0x4 0 2 0 X86_64_RELOC_UNSIGNED 0 0x2 +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: 0x4 +// CHECK-NEXT: PCRel: 0 +// CHECK-NEXT: Length: 2 +// CHECK-NEXT: Type: X86_64_RELOC_SUBTRACTOR (5) +// CHECK-NEXT: Section: __data (2) +// CHECK-NEXT: } +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: 0x4 +// CHECK-NEXT: PCRel: 0 +// CHECK-NEXT: Length: 2 +// CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) +// CHECK-NEXT: Section: __data (2) +// CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/test/MC/MachO/darwin-x86_64-reloc.s b/test/MC/MachO/darwin-x86_64-reloc.s index 48dd6b4b2297..32e079879eae 100644 --- a/test/MC/MachO/darwin-x86_64-reloc.s +++ b/test/MC/MachO/darwin-x86_64-reloc.s @@ -93,46 +93,36 @@ L6: // CHECK-NEXT: Offset: 0x20 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: 0x4 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __literal8 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x18 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: f6 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x10 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: 0x4 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __literal8 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x8 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_GOT (4) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x4 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_GOT (4) // CHECK-NEXT: Symbol: _foobar -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: Section __text { @@ -140,289 +130,225 @@ L6: // CHECK-NEXT: Offset: 0xDA // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_GOT (4) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0xD3 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED (1) -// CHECK-NEXT: Symbol: 0x4 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __literal8 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0xCD // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED (1) // CHECK-NEXT: Symbol: f6 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0xC7 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED (1) -// CHECK-NEXT: Symbol: 0x4 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __literal8 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0xC1 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED (1) -// CHECK-NEXT: Symbol: 0x1 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __data // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0xA5 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SUBTRACTOR (5) // CHECK-NEXT: Symbol: _prev -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0xA5 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x9D // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SUBTRACTOR (5) // CHECK-NEXT: Symbol: _prev -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x9D // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x95 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: _prev -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x8D // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: _prev -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x79 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED_4 (8) // CHECK-NEXT: Symbol: _prev -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x71 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED_2 (7) // CHECK-NEXT: Symbol: _prev -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x69 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED_1 (6) // CHECK-NEXT: Symbol: _prev -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x63 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED (1) // CHECK-NEXT: Symbol: _prev -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x5C // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED (1) // CHECK-NEXT: Symbol: _prev -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x55 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SUBTRACTOR (5) // CHECK-NEXT: Symbol: _bar -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x55 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x4D // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SUBTRACTOR (5) // CHECK-NEXT: Symbol: _bar -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x4D // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x45 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SUBTRACTOR (5) // CHECK-NEXT: Symbol: _bar -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x45 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x3D // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x35 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x2D // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED_4 (8) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x26 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED_1 (6) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x20 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED (1) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x1A // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_SIGNED (1) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x14 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_GOT (4) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0xE // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_GOT_LOAD (3) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x7 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_BRANCH (2) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x2 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_BRANCH (2) // CHECK-NEXT: Symbol: _foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: Section __debug_frame { @@ -430,19 +356,15 @@ L6: // CHECK-NEXT: Offset: 0x8 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: _ext_foo -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: 0x2 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __text // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/test/MC/MachO/reloc.s b/test/MC/MachO/reloc.s index 55c99402529a..6a78d0452ed7 100644 --- a/test/MC/MachO/reloc.s +++ b/test/MC/MachO/reloc.s @@ -59,19 +59,15 @@ _f1: // CHECK-NEXT: Offset: 0x6 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) -// CHECK-NEXT: Symbol: 0x3 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __const // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x1 // CHECK-NEXT: PCRel: 1 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) -// CHECK-NEXT: Symbol: 0x0 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: - (0) // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: Section __data { @@ -79,100 +75,78 @@ _f1: // CHECK-NEXT: Offset: 0x2F // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) // CHECK-NEXT: Symbol: _f1 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x2B // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) // CHECK-NEXT: Symbol: _f1 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x2A // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 0 -// CHECK-NEXT: Extern: N/A // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) -// CHECK-NEXT: Symbol: 0x1D -// CHECK-NEXT: Scattered: 1 +// CHECK-NEXT: Value: 0x1D // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x28 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 1 -// CHECK-NEXT: Extern: N/A // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) -// CHECK-NEXT: Symbol: 0x1D -// CHECK-NEXT: Scattered: 1 +// CHECK-NEXT: Value: 0x1D // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x24 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: N/A // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) -// CHECK-NEXT: Symbol: 0x1D -// CHECK-NEXT: Scattered: 1 +// CHECK-NEXT: Value: 0x1D // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x20 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: N/A // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) -// CHECK-NEXT: Symbol: 0x1D -// CHECK-NEXT: Scattered: 1 +// CHECK-NEXT: Value: 0x1D // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x14 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: N/A // CHECK-NEXT: Type: GENERIC_RELOC_LOCAL_SECTDIFF (4) -// CHECK-NEXT: Symbol: 0x21 -// CHECK-NEXT: Scattered: 1 +// CHECK-NEXT: Value: 0x21 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: N/A // CHECK-NEXT: Type: GENERIC_RELOC_PAIR (1) -// CHECK-NEXT: Symbol: 0x29 -// CHECK-NEXT: Scattered: 1 +// CHECK-NEXT: Value: 0x29 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x8 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) -// CHECK-NEXT: Symbol: 0x2 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __data // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x4 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) // CHECK-NEXT: Symbol: undef -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) // CHECK-NEXT: Symbol: undef -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: Section __const { @@ -180,37 +154,29 @@ _f1: // CHECK-NEXT: Offset: 0x8 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) -// CHECK-NEXT: Symbol: 0x1 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __text // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x4 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: GENERIC_RELOC_VANILLA (0) -// CHECK-NEXT: Symbol: 0x3 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __const // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: N/A // CHECK-NEXT: Type: GENERIC_RELOC_LOCAL_SECTDIFF (4) -// CHECK-NEXT: Symbol: 0x1D -// CHECK-NEXT: Scattered: 1 +// CHECK-NEXT: Value: 0x1D // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 2 -// CHECK-NEXT: Extern: N/A // CHECK-NEXT: Type: GENERIC_RELOC_PAIR (1) -// CHECK-NEXT: Symbol: 0x40 -// CHECK-NEXT: Scattered: 1 +// CHECK-NEXT: Value: 0x40 // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT:] diff --git a/test/MC/MachO/x86_64-mergeable.s b/test/MC/MachO/x86_64-mergeable.s index 972477693ed2..b7933f92c0c4 100644 --- a/test/MC/MachO/x86_64-mergeable.s +++ b/test/MC/MachO/x86_64-mergeable.s @@ -23,37 +23,29 @@ L1: // CHECK-NEXT: Offset: 0x18 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: L1 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x10 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: 0x3 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __cstring (3) // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x8 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) // CHECK-NEXT: Symbol: L0 -// CHECK-NEXT: Scattered: 0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: PCRel: 0 // CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 0 // CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: 0x2 -// CHECK-NEXT: Scattered: 0 +// CHECK-NEXT: Section: __literal4 (2) // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/test/MC/Mips/branch-pseudos-bad.s b/test/MC/Mips/branch-pseudos-bad.s new file mode 100644 index 000000000000..fcbf84af84d0 --- /dev/null +++ b/test/MC/Mips/branch-pseudos-bad.s @@ -0,0 +1,21 @@ +# RUN: not llvm-mc %s -arch=mips -mcpu=mips32 2>&1 | FileCheck %s + +# Check for errors when using conditional branch pseudos after .set noat. + .set noat +local_label: + blt $7, $8, local_label +# CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available + bltu $7, $8, local_label +# CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available + ble $7, $8, local_label +# CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available + bleu $7, $8, local_label +# CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available + bge $7, $8, local_label +# CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available + bgeu $7, $8, local_label +# CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available + bgt $7, $8, local_label +# CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available + bgtu $7, $8, local_label +# CHECK: :[[@LINE-1]]:3: error: pseudo-instruction requires $at, which is not available diff --git a/test/MC/Mips/branch-pseudos.s b/test/MC/Mips/branch-pseudos.s new file mode 100644 index 000000000000..e9b151a59333 --- /dev/null +++ b/test/MC/Mips/branch-pseudos.s @@ -0,0 +1,189 @@ +# RUN: llvm-mc %s -arch=mips -mcpu=mips32 -show-encoding | FileCheck %s +# RUN: llvm-mc %s -arch=mips -mcpu=mips32 2>&1 | \ +# RUN: FileCheck %s --check-prefix=WARNING + + .text +local_label: + blt $7, $8, local_label +# CHECK: slt $1, $7, $8 # encoding: [0x00,0xe8,0x08,0x2a] +# CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + blt $7, $8, global_label +# CHECK: slt $1, $7, $8 # encoding: [0x00,0xe8,0x08,0x2a] +# CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: global_label, kind: fixup_Mips_PC16 +# CHECK: nop + blt $7, $0, local_label +# CHECK: bltz $7, local_label # encoding: [0x04,0xe0,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + blt $0, $8, local_label +# CHECK: bgtz $8, local_label # encoding: [0x1d,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + blt $0, $0, local_label +# CHECK: bltz $zero, local_label # encoding: [0x04,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + + bltu $7, $8, local_label +# CHECK: sltu $1, $7, $8 # encoding: [0x00,0xe8,0x08,0x2b] +# CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bltu $7, $8, global_label +# CHECK: sltu $1, $7, $8 # encoding: [0x00,0xe8,0x08,0x2b] +# CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: global_label, kind: fixup_Mips_PC16 +# CHECK: nop + bltu $7, $0, local_label +# CHECK: nop + bltu $0, $8, local_label +# CHECK: bnez $8, local_label # encoding: [0x15,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bltu $0, $0, local_label +# CHECK: nop + + ble $7, $8, local_label +# CHECK: slt $1, $8, $7 # encoding: [0x01,0x07,0x08,0x2a] +# CHECK: beqz $1, local_label # encoding: [0x10,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + ble $7, $8, global_label +# CHECK: slt $1, $8, $7 # encoding: [0x01,0x07,0x08,0x2a] +# CHECK: beqz $1, global_label # encoding: [0x10,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: global_label, kind: fixup_Mips_PC16 +# CHECK: nop + ble $7, $0, local_label +# CHECK: blez $7, local_label # encoding: [0x18,0xe0,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + ble $0, $8, local_label +# CHECK: bgez $8, local_label # encoding: [0x05,0x01,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + ble $0, $0, local_label +# WARNING: :[[@LINE-1]]:3: warning: branch is always taken +# CHECK: blez $zero, local_label # encoding: [0x18,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + + bleu $7, $8, local_label +# CHECK: sltu $1, $8, $7 # encoding: [0x01,0x07,0x08,0x2b] +# CHECK: beqz $1, local_label # encoding: [0x10,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bleu $7, $8, global_label +# CHECK: sltu $1, $8, $7 # encoding: [0x01,0x07,0x08,0x2b] +# CHECK: beqz $1, global_label # encoding: [0x10,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: global_label, kind: fixup_Mips_PC16 +# CHECK: nop + bleu $7, $0, local_label +# CHECK: beqz $7, local_label # encoding: [0x10,0xe0,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bleu $0, $8, local_label +# WARNING: :[[@LINE-1]]:3: warning: branch is always taken +# CHECK: b local_label # encoding: [0x10,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bleu $0, $0, local_label +# WARNING: :[[@LINE-1]]:3: warning: branch is always taken +# CHECK: b local_label # encoding: [0x10,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + + bge $7, $8, local_label +# CHECK: slt $1, $7, $8 # encoding: [0x00,0xe8,0x08,0x2a] +# CHECK: beqz $1, local_label # encoding: [0x10,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bge $7, $8, global_label +# CHECK: slt $1, $7, $8 # encoding: [0x00,0xe8,0x08,0x2a] +# CHECK: beqz $1, global_label # encoding: [0x10,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: global_label, kind: fixup_Mips_PC16 +# CHECK: nop + bge $7, $0, local_label +# CHECK: bgez $7, local_label # encoding: [0x04,0xe1,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bge $0, $8, local_label +# CHECK: blez $8, local_label # encoding: [0x19,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bge $0, $0, local_label +# WARNING: :[[@LINE-1]]:3: warning: branch is always taken +# CHECK: bgez $zero, local_label # encoding: [0x04,0x01,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + + bgeu $7, $8, local_label +# CHECK: sltu $1, $7, $8 # encoding: [0x00,0xe8,0x08,0x2b] +# CHECK: beqz $1, local_label # encoding: [0x10,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgeu $7, $8, global_label +# CHECK: sltu $1, $7, $8 # encoding: [0x00,0xe8,0x08,0x2b] +# CHECK: beqz $1, global_label # encoding: [0x10,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: global_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgeu $7, $0, local_label +# WARNING: :[[@LINE-1]]:3: warning: branch is always taken +# CHECK: b local_label # encoding: [0x10,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgeu $0, $8, local_label +# CHECK: beqz $8, local_label # encoding: [0x11,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgeu $0, $0, local_label +# WARNING: :[[@LINE-1]]:3: warning: branch is always taken +# CHECK: b local_label # encoding: [0x10,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + + bgt $7, $8, local_label +# CHECK: slt $1, $8, $7 # encoding: [0x01,0x07,0x08,0x2a] +# CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgt $7, $8, global_label +# CHECK: slt $1, $8, $7 # encoding: [0x01,0x07,0x08,0x2a] +# CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: global_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgt $7, $0, local_label +# CHECK: bgtz $7, local_label # encoding: [0x1c,0xe0,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgt $0, $8, local_label +# CHECK: bltz $8, local_label # encoding: [0x05,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgt $0, $0, local_label +# CHECK: bgtz $zero, local_label # encoding: [0x1c,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + + bgtu $7, $8, local_label +# CHECK: sltu $1, $8, $7 # encoding: [0x01,0x07,0x08,0x2b] +# CHECK: bnez $1, local_label # encoding: [0x14,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgtu $7, $8, global_label +# CHECK: sltu $1, $8, $7 # encoding: [0x01,0x07,0x08,0x2b] +# CHECK: bnez $1, global_label # encoding: [0x14,0x20,A,A] +# CHECK: # fixup A - offset: 0, value: global_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgtu $7, $0, local_label +# CHECK: bnez $7, local_label # encoding: [0x14,0xe0,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop + bgtu $0, $8, local_label +# CHECK: nop + bgtu $0, $0, local_label +# CHECK: bnez $zero, local_label # encoding: [0x14,0x00,A,A] +# CHECK: # fixup A - offset: 0, value: local_label, kind: fixup_Mips_PC16 +# CHECK: nop diff --git a/test/MC/Mips/cfi-advance-loc.s b/test/MC/Mips/cfi-advance-loc.s new file mode 100644 index 000000000000..c84e7e162373 --- /dev/null +++ b/test/MC/Mips/cfi-advance-loc.s @@ -0,0 +1,68 @@ +// RUN: llvm-mc -filetype=obj -triple mipsel-pc-Linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s -check-prefix=CHECK-LE +// RUN: llvm-mc -filetype=obj -triple mips-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s -check-prefix=CHECK-BE + +// test that this produces a correctly encoded cfi_advance_loc for both endians. + +f: + .cfi_startproc + nop + .zero 252 + // DW_CFA_advance_loc2: 256 to 00000100 + .cfi_def_cfa_offset 8 + nop + .cfi_endproc + +g: + .cfi_startproc + nop + .zero 65532 + // DW_CFA_advance_loc4: 65536 to 00010104 + .cfi_def_cfa_offset 8 + nop + .cfi_endproc + +// CHECK-LE: Section { +// CHECK-LE: Index: 7 +// CHECK-LE: Name: .eh_frame (44) +// CHECK-LE-NEXT: Type: SHT_PROGBITS (0x1) +// CHECK-LE-NEXT: Flags [ (0x2) +// CHECK-LE-NEXT: SHF_ALLOC (0x2) +// CHECK-LE-NEXT: ] +// CHECK-LE-NEXT: Address: 0x0 +// CHECK-LE-NEXT: Offset: 0x10180 +// CHECK-LE-NEXT: Size: 68 +// CHECK-LE-NEXT: Link: 0 +// CHECK-LE-NEXT: Info: 0 +// CHECK-LE-NEXT: AddressAlignment: 4 +// CHECK-LE-NEXT: EntrySize: 0 +// CHECK-LE-NEXT: SectionData ( +// CHECK-LE-NEXT: 0000: 10000000 00000000 017A5200 017C1F01 +// CHECK-LE-NEXT: 0010: 0B0C1D00 14000000 18000000 00000000 +// CHECK-LE-NEXT: 0020: 04010000 00030001 0E080000 14000000 +// CHECK-LE-NEXT: 0030: 30000000 04010000 04000100 00040000 +// CHECK-LE-NEXT: 0040: 01000E08 +// CHECK-LE-NEXT: ) +// CHECK-LE-NEXT: } + +// CHECK-BE: Section { +// CHECK-BE: Index: 7 +// CHECK-BE: Name: .eh_frame (44) +// CHECK-BE-NEXT: Type: SHT_PROGBITS (0x1) +// CHECK-BE-NEXT: Flags [ (0x2) +// CHECK-BE-NEXT: SHF_ALLOC (0x2) +// CHECK-BE-NEXT: ] +// CHECK-BE-NEXT: Address: 0x0 +// CHECK-BE-NEXT: Offset: 0x10180 +// CHECK-BE-NEXT: Size: 68 +// CHECK-BE-NEXT: Link: 0 +// CHECK-BE-NEXT: Info: 0 +// CHECK-BE-NEXT: AddressAlignment: 4 +// CHECK-BE-NEXT: EntrySize: 0 +// CHECK-BE-NEXT: SectionData ( +// CHECK-BE-NEXT: 0000: 00000010 00000000 017A5200 017C1F01 +// CHECK-BE-NEXT: 0010: 0B0C1D00 00000014 00000018 00000000 +// CHECK-BE-NEXT: 0020: 00000104 00030100 0E080000 00000014 +// CHECK-BE-NEXT: 0030: 00000030 00000104 00010004 00040001 +// CHECK-BE-NEXT: 0040: 00000E08 +// CHECK-BE-NEXT: ) +// CHECK-BE-NEXT: } diff --git a/test/MC/Mips/micromips-invalid.s b/test/MC/Mips/micromips-invalid.s index 4321574b5bff..74a62ceeba0a 100644 --- a/test/MC/Mips/micromips-invalid.s +++ b/test/MC/Mips/micromips-invalid.s @@ -73,3 +73,8 @@ movep $8, $6, $2, $3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction movep $5, $6, $5, $3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction movep $5, $6, $2, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + break 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + break 1024, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + break 7, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + break 1024, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + wait 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/test/MC/Mips/micromips32r6/valid.s b/test/MC/Mips/micromips32r6/valid.s index f4e8eef8f23b..94e19f2c46fc 100644 --- a/test/MC/Mips/micromips32r6/valid.s +++ b/test/MC/Mips/micromips32r6/valid.s @@ -25,6 +25,8 @@ clz $sp, $gp # CHECK: clz $sp, $gp # encoding: [0x03,0x80,0xe8,0x50] div $3, $4, $5 # CHECK: div $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x18] divu $3, $4, $5 # CHECK: divu $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x98] + eret # CHECK: eret # encoding: [0x00,0x00,0xf3,0x7c] + eretnc # CHECK: eretnc # encoding: [0x00,0x01,0xf3,0x7c] jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0x80,0x05,0x01,0x00] jic $5, 256 # CHECK: jic $5, 256 # encoding: [0xa0,0x05,0x01,0x00] lsa $2, $3, $4, 3 # CHECK: lsa $2, $3, $4, 3 # encoding: [0x00,0x43,0x26,0x0f] diff --git a/test/MC/Mips/mips-expansions-bad.s b/test/MC/Mips/mips-expansions-bad.s index 6bbde263f5f8..6e747c38c3c5 100644 --- a/test/MC/Mips/mips-expansions-bad.s +++ b/test/MC/Mips/mips-expansions-bad.s @@ -22,3 +22,7 @@ # 64-BIT: ori $5, $5, %lo(symbol) dli $5, 1 # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture + bne $2, 0x100010001, 1332 + # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate + beq $2, 0x100010001, 1332 + # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate diff --git a/test/MC/Mips/mips-expansions.s b/test/MC/Mips/mips-expansions.s index d3fdf39ff8b0..bae446cea2ad 100644 --- a/test/MC/Mips/mips-expansions.s +++ b/test/MC/Mips/mips-expansions.s @@ -33,11 +33,22 @@ # CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c] # CHECK: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34] # CHECK: addu $7, $7, $8 # encoding: [0x21,0x38,0xe8,0x00] + la $8, 1f +# CHECK: lui $8, %hi($tmp0) # encoding: [A,A,0x08,0x3c] +# CHECK: # fixup A - offset: 0, value: ($tmp0)@ABS_HI, kind: fixup_Mips_HI16 +# CHECK: ori $8, $8, %lo($tmp0) # encoding: [A,A,0x08,0x35] +# CHECK: # fixup A - offset: 0, value: ($tmp0)@ABS_LO, kind: fixup_Mips_LO16 la $8, symbol # CHECK: lui $8, %hi(symbol) # encoding: [A,A,0x08,0x3c] # CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 # CHECK: ori $8, $8, %lo(symbol) # encoding: [A,A,0x08,0x35] # CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 + la $8, symbol($9) +# CHECK: lui $8, %hi(symbol) # encoding: [A,A,0x08,0x3c] +# CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 +# CHECK: ori $8, $8, %lo(symbol) # encoding: [A,A,0x08,0x35] +# CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 +# CHECK: addu $8, $8, $9 # encoding: [0x21,0x40,0x09,0x01] # LW/SW and LDC1/SDC1 of symbol address, done by MipsAsmParser::expandMemInst(): .set noat @@ -55,6 +66,17 @@ # CHECK: sw $10, %lo(symbol)($1) # encoding: [A,A,0x2a,0xac] # CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 + lw $8, 1f +# CHECK: lui $8, %hi($tmp0) # encoding: [A,A,0x08,0x3c] +# CHECK: # fixup A - offset: 0, value: ($tmp0)@ABS_HI, kind: fixup_Mips_HI16 +# CHECK: lw $8, %lo($tmp0)($8) # encoding: [A,A,0x08,0x8d] +# CHECK: # fixup A - offset: 0, value: ($tmp0)@ABS_LO, kind: fixup_Mips_LO16 + sw $8, 1f +# CHECK: lui $1, %hi($tmp0) # encoding: [A,A,0x01,0x3c] +# CHECK: # fixup A - offset: 0, value: ($tmp0)@ABS_HI, kind: fixup_Mips_HI16 +# CHECK: sw $8, %lo($tmp0)($1) # encoding: [A,A,0x28,0xac] +# CHECK: # fixup A - offset: 0, value: ($tmp0)@ABS_LO, kind: fixup_Mips_LO16 + lw $10, 655483($4) # CHECK: lui $10, 10 # encoding: [0x0a,0x00,0x0a,0x3c] # CHECK: addu $10, $10, $4 # encoding: [0x21,0x50,0x44,0x01] @@ -83,3 +105,68 @@ sdc1 $f0, symbol # CHECK: lui $1, %hi(symbol) # CHECK: sdc1 $f0, %lo(symbol)($1) + +# Test BNE with an immediate as the 2nd operand. + bne $2, 0, 1332 +# CHECK: bnez $2, 1332 # encoding: [0x4d,0x01,0x40,0x14] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + bne $2, 123, 1332 +# CHECK: ori $1, $zero, 123 # encoding: [0x7b,0x00,0x01,0x34] +# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + bne $2, -2345, 1332 +# CHECK: addiu $1, $zero, -2345 # encoding: [0xd7,0xf6,0x01,0x24] +# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + bne $2, 65538, 1332 +# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c] +# CHECK: ori $1, $1, 2 # encoding: [0x02,0x00,0x21,0x34] +# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + bne $2, ~7, 1332 +# CHECK: addiu $1, $zero, -8 # encoding: [0xf8,0xff,0x01,0x24] +# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + bne $2, 0x10000, 1332 +# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c] +# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + +# Test BEQ with an immediate as the 2nd operand. + beq $2, 0, 1332 +# CHECK: beqz $2, 1332 # encoding: [0x4d,0x01,0x40,0x10] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + beq $2, 123, 1332 +# CHECK: ori $1, $zero, 123 # encoding: [0x7b,0x00,0x01,0x34] +# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + beq $2, -2345, 1332 +# CHECK: addiu $1, $zero, -2345 # encoding: [0xd7,0xf6,0x01,0x24] +# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + beq $2, 65538, 1332 +# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c] +# CHECK: ori $1, $1, 2 # encoding: [0x02,0x00,0x21,0x34] +# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + beq $2, ~7, 1332 +# CHECK: addiu $1, $zero, -8 # encoding: [0xf8,0xff,0x01,0x24] +# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + beq $2, 0x10000, 1332 +# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c] +# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + +1: + add $4, $4, $4 diff --git a/test/MC/Mips/mips-relocations.s b/test/MC/Mips/mips-relocations.s deleted file mode 100644 index 13cea2f38568..000000000000 --- a/test/MC/Mips/mips-relocations.s +++ /dev/null @@ -1,40 +0,0 @@ -# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s -# Check that the assembler can handle the documented syntax -# for relocations. -# CHECK: lui $2, %hi(_gp_disp) # encoding: [A,A,0x02,0x3c] -# CHECK: # fixup A - offset: 0, value: _gp_disp@ABS_HI, kind: fixup_Mips_HI16 -# CHECK: addiu $2, $2, %lo(_gp_disp) # encoding: [A,A,0x42,0x24] -# CHECK: # fixup A - offset: 0, value: _gp_disp@ABS_LO, kind: fixup_Mips_LO16 -# CHECK: lw $25, %call16(strchr)($gp) # encoding: [A,A,0x99,0x8f] -# CHECK: # fixup A - offset: 0, value: strchr@GOT_CALL, kind: fixup_Mips_CALL16 -# CHECK: lw $3, %got(loop_1)($2) # encoding: [A,A,0x43,0x8c] -# CHECK: # fixup A - offset: 0, value: loop_1@GOT, kind: fixup_Mips_GOT_Local -# CHECK: lui $2, %dtprel_hi(_gp_disp) # encoding: [A,A,0x02,0x3c] -# CHECK: # fixup A - offset: 0, value: _gp_disp@DTPREL_HI, kind: fixup_Mips_DTPREL_HI -# CHECK: addiu $2, $2, %dtprel_lo(_gp_disp) # encoding: [A,A,0x42,0x24] -# CHECK: # fixup A - offset: 0, value: _gp_disp@DTPREL_LO, kind: fixup_Mips_DTPREL_LO -# CHECK: lw $3, %got(loop_1)($2) # encoding: [A,A,0x43,0x8c] -# CHECK: # fixup A - offset: 0, value: loop_1@GOT, kind: fixup_Mips_GOT_Local -# CHECK: lw $4, %got_disp(loop_2)($3) # encoding: [A,A,0x64,0x8c] -# CHECK: # fixup A - offset: 0, value: loop_2@GOT_DISP, kind: fixup_Mips_GOT_DISP -# CHECK: lw $5, %got_page(loop_3)($4) # encoding: [A,A,0x85,0x8c] -# CHECK: # fixup A - offset: 0, value: loop_3@GOT_PAGE, kind: fixup_Mips_GOT_PAGE -# CHECK: lw $6, %got_ofst(loop_4)($5) # encoding: [A,A,0xa6,0x8c] -# CHECK: # fixup A - offset: 0, value: loop_4@GOT_OFST, kind: fixup_Mips_GOT_OFST -# CHECK: lui $2, %tprel_hi(_gp_disp) # encoding: [A,A,0x02,0x3c] -# CHECK: # fixup A - offset: 0, value: _gp_disp@TPREL_HI, kind: fixup_Mips_TPREL_HI -# CHECK: addiu $2, $2, %tprel_lo(_gp_disp) # encoding: [A,A,0x42,0x24] -# CHECK: # fixup A - offset: 0, value: _gp_disp@TPREL_LO, kind: fixup_Mips_TPREL_LO - - lui $2, %hi(_gp_disp) - addiu $2, $2, %lo(_gp_disp) - lw $25, %call16(strchr)($gp) - lw $3, %got(loop_1)($2) - lui $2, %dtprel_hi(_gp_disp) - addiu $2, $2, %dtprel_lo(_gp_disp) - lw $3, %got(loop_1)($2) - lw $4, %got_disp(loop_2)($3) - lw $5, %got_page(loop_3)($4) - lw $6, %got_ofst(loop_4)($5) - lui $2, %tprel_hi(_gp_disp) - addiu $2, $2, %tprel_lo(_gp_disp) diff --git a/test/MC/Mips/mips32r6/invalid.s b/test/MC/Mips/mips32r6/invalid.s index 82cb5ab49430..0ce75e6143c2 100644 --- a/test/MC/Mips/mips32r6/invalid.s +++ b/test/MC/Mips/mips32r6/invalid.s @@ -12,3 +12,7 @@ ldc2 $8,-21181($at) # ASM: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled sdc2 $20,23157($s2) # ASM: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled swc2 $25,24880($s0) # ASM: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + break 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + break 1024, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + break 7, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + break 1024, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/test/MC/Mips/mips64-expansions.s b/test/MC/Mips/mips64-expansions.s index 62a95200f247..620793a64fdd 100644 --- a/test/MC/Mips/mips64-expansions.s +++ b/test/MC/Mips/mips64-expansions.s @@ -193,3 +193,81 @@ dli $9, 0x80000000 # CHECK: ori $9, $zero, 32768 # encoding: [0x00,0x80,0x09,0x34] # CHECK: dsll $9, $9, 16 # encoding: [0x38,0x4c,0x09,0x00] + +# Test bne with an immediate as the 2nd operand. + bne $2, 0x100010001, 1332 +# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c] +# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34] +# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + bne $2, 0x1000100010001, 1332 +# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c] +# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34] +# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + bne $2, -0x100010001, 1332 +# CHECK: lui $1, 65535 # encoding: [0xff,0xff,0x01,0x3c] +# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 65535 # encoding: [0xff,0xff,0x21,0x34] +# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + bne $2, -0x1000100010001, 1332 +# CHECK: lui $1, 65534 # encoding: [0xfe,0xff,0x01,0x3c] +# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 65535 # encoding: [0xff,0xff,0x21,0x34] +# CHECK: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + +# Test beq with an immediate as the 2nd operand. + beq $2, 0x100010001, 1332 +# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c] +# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34] +# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + beq $2, 0x1000100010001, 1332 +# CHECK: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c] +# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 1 # encoding: [0x01,0x00,0x21,0x34] +# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + beq $2, -0x100010001, 1332 +# CHECK: lui $1, 65535 # encoding: [0xff,0xff,0x01,0x3c] +# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 65535 # encoding: [0xff,0xff,0x21,0x34] +# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + + beq $2, -0x1000100010001, 1332 +# CHECK: lui $1, 65534 # encoding: [0xfe,0xff,0x01,0x3c] +# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 65534 # encoding: [0xfe,0xff,0x21,0x34] +# CHECK: dsll $1, $1, 16 # encoding: [0x38,0x0c,0x01,0x00] +# CHECK: ori $1, $1, 65535 # encoding: [0xff,0xff,0x21,0x34] +# CHECK: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] diff --git a/test/MC/Mips/mips64r6/invalid.s b/test/MC/Mips/mips64r6/invalid.s index 1b01827368a5..ae980347f306 100644 --- a/test/MC/Mips/mips64r6/invalid.s +++ b/test/MC/Mips/mips64r6/invalid.s @@ -10,3 +10,7 @@ jalr.hb $31 # ASM: :[[@LINE]]:9: error: source and destination must be different jalr.hb $31, $31 # ASM: :[[@LINE]]:9: error: source and destination must be different ldc2 $8,-21181($at) # ASM: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + break 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + break 1024, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + break 7, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + break 1024, 1024 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/test/MC/Mips/relocation.s b/test/MC/Mips/relocation.s index 642b40960a65..3a5f5a9e0044 100644 --- a/test/MC/Mips/relocation.s +++ b/test/MC/Mips/relocation.s @@ -1,10 +1,209 @@ -// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux < %s | llvm-readobj -r | FileCheck %s +// RUN: llvm-mc -triple mips-unknown-linux < %s -show-encoding \ +// RUN: | FileCheck -check-prefix=ENCBE -check-prefix=FIXUP %s +// RUN: llvm-mc -triple mipsel-unknown-linux < %s -show-encoding \ +// RUN: | FileCheck -check-prefix=ENCLE -check-prefix=FIXUP %s +// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux < %s \ +// RUN: | llvm-readobj -r | FileCheck -check-prefix=RELOC %s // Test that we produce the correct relocation. // FIXME: move more relocation only tests here. - .long foo -// CHECK: R_MIPS_32 foo +// Check prefixes: +// RELOC - Check the relocation in the object. +// FIXUP - Check the fixup on the instruction. +// ENCBE - Check the big-endian encoding on the instruction. +// ENCLE - Check the little-endian encoding on the instruction. +// ????? - Placeholder. Relocation is defined but the way of generating it is +// unknown. +// FIXME - Placeholder. Generation method is known but doesn't work. - .long foo-. -// CHECK: R_MIPS_PC32 foo + .short foo // RELOC: R_MIPS_16 foo + + .long foo // RELOC: R_MIPS_32 foo + + // ?????: R_MIPS_REL32 foo + + jal foo // RELOC: R_MIPS_26 foo + // ENCBE: jal foo # encoding: [0b000011AA,A,A,A] + // ENCLE: jal foo # encoding: [A,A,A,0b000011AA] + // FIXUP: # fixup A - offset: 0, value: foo, kind: fixup_Mips_26 + + addiu $2, $3, %hi(foo) // RELOC: R_MIPS_HI16 foo + // ENCBE: addiu $2, $3, %hi(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %hi(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@ABS_HI, kind: fixup_Mips_HI16 + + addiu $2, $3, %lo(foo) // RELOC: R_MIPS_LO16 foo + // ENCBE: addiu $2, $3, %lo(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %lo(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_Mips_LO16 + + addiu $2, $3, %gp_rel(foo) // RELOC: R_MIPS_GPREL16 foo + // ENCBE: addiu $2, $3, %gp_rel(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %gp_rel(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@GPREL, kind: fixup_Mips_GPREL + + // ?????: R_MIPS_LITERAL foo + + addiu $2, $3, %got(foo) // RELOC: R_MIPS_GOT16 foo + // ENCBE: addiu $2, $3, %got(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %got(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@GOT, kind: fixup_Mips_GOT_Local + + .short foo-. // RELOC: R_MIPS_PC16 foo + + addiu $2, $3, %call16(foo) // RELOC: R_MIPS_CALL16 foo + // ENCBE: addiu $2, $3, %call16(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %call16(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@GOT_CALL, kind: fixup_Mips_CALL16 + + .quad foo // RELOC: R_MIPS_64 foo + + // ?????: R_MIPS_GPREL32 foo + // ?????: R_MIPS_UNUSED1 foo + // ?????: R_MIPS_UNUSED2 foo + // ?????: R_MIPS_UNUSED3 foo + // ?????: R_MIPS_SHIFT5 foo + // ?????: R_MIPS_SHIFT6 foo + + addiu $2, $3, %got_disp(foo) // RELOC: R_MIPS_GOT_DISP foo + // ENCBE: addiu $2, $3, %got_disp(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %got_disp(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@GOT_DISP, kind: fixup_Mips_GOT_DISP + + addiu $2, $3, %got_page(foo) // RELOC: R_MIPS_GOT_PAGE foo + // ENCBE: addiu $2, $3, %got_page(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %got_page(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@GOT_PAGE, kind: fixup_Mips_GOT_PAGE + + addiu $2, $3, %got_ofst(foo) // RELOC: R_MIPS_GOT_OFST foo + // ENCBE: addiu $2, $3, %got_ofst(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %got_ofst(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@GOT_OFST, kind: fixup_Mips_GOT_OFST + + addiu $2, $3, %got_hi(foo) // RELOC: R_MIPS_GOT_HI16 foo + // ENCBE: addiu $2, $3, %got_hi(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %got_hi(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@GOT_HI16, kind: fixup_Mips_GOT_HI16 + + addiu $2, $3, %got_lo(foo) // RELOC: R_MIPS_GOT_LO16 foo + // ENCBE: addiu $2, $3, %got_lo(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %got_lo(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@GOT_LO16, kind: fixup_Mips_GOT_LO16 + +// addiu $2, $3, %neg(foo) // FIXME: R_MIPS_SUB foo + // ?????: R_MIPS_INSERT_A + // ?????: R_MIPS_INSERT_B + // ?????: R_MIPS_DELETE + + .set mips64 + daddiu $2, $3, %higher(foo) // RELOC: R_MIPS_HIGHER foo + // ENCBE: daddiu $2, $3, %higher(foo) # encoding: [0x64,0x62,A,A] + // ENCLE: daddiu $2, $3, %higher(foo) # encoding: [A,A,0x62,0x64] + // FIXUP: # fixup A - offset: 0, value: foo@HIGHER, kind: fixup_Mips_HIGHER + + daddiu $2, $3, %highest(foo) // RELOC: R_MIPS_HIGHEST foo + // ENCBE: daddiu $2, $3, %highest(foo) # encoding: [0x64,0x62,A,A] + // ENCLE: daddiu $2, $3, %highest(foo) # encoding: [A,A,0x62,0x64] + // FIXUP: # fixup A - offset: 0, value: foo@HIGHEST, kind: fixup_Mips_HIGHEST + + .set mips0 + addiu $2, $3, %call_hi(foo) // RELOC: R_MIPS_CALL_HI16 foo + // ENCBE: addiu $2, $3, %call_hi(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %call_hi(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@CALL_HI16, kind: fixup_Mips_CALL_HI16 + + addiu $2, $3, %call_lo(foo) // RELOC: R_MIPS_CALL_LO16 foo + // ENCBE: addiu $2, $3, %call_lo(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %call_lo(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@CALL_LO16, kind: fixup_Mips_CALL_LO16 + + // ?????: R_MIPS_SCN_DISP foo + // ?????: R_MIPS_REL16 foo + // ?????: R_MIPS_ADD_IMMEDIATE foo + // ?????: R_MIPS_PJUMP foo + // ?????: R_MIPS_RELGOT foo +// jalr $25 // ?????: R_MIPS_JALR foo + + // ?????: R_MIPS_TLS_DTPMOD32 foo +// .dtprelword foo // FIXME: R_MIPS_TLS_DTPREL32 foo + // ?????: R_MIPS_TLS_DTPMOD64 foo +// .dtpreldword foo // FIXME: R_MIPS_TLS_DTPREL64 foo + addiu $2, $3, %tlsgd(foo) // RELOC: R_MIPS_TLS_GD foo + // ENCBE: addiu $2, $3, %tlsgd(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %tlsgd(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@TLSGD, kind: fixup_Mips_TLSGD + + addiu $2, $3, %tlsldm(foo) // RELOC: R_MIPS_TLS_LDM foo + // ENCBE: addiu $2, $3, %tlsldm(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %tlsldm(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@TLSLDM, kind: fixup_Mips_TLSLDM + + addiu $2, $3, %dtprel_hi(foo) // RELOC: R_MIPS_TLS_DTPREL_HI16 foo + // ENCBE: addiu $2, $3, %dtprel_hi(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %dtprel_hi(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@DTPREL_HI, kind: fixup_Mips_DTPREL_HI + + addiu $2, $3, %dtprel_lo(foo) // RELOC: R_MIPS_TLS_DTPREL_LO16 foo + // ENCBE: addiu $2, $3, %dtprel_lo(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %dtprel_lo(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@DTPREL_LO, kind: fixup_Mips_DTPREL_LO + + addiu $2, $3, %gottprel(foo) // RELOC: R_MIPS_TLS_GOTTPREL foo + // ENCBE: addiu $2, $3, %gottprel(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %gottprel(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@GOTTPREL, kind: fixup_Mips_GOTTPREL + +// .tprelword foo // FIXME: R_MIPS_TLS_TPREL32 foo +// .tpreldword foo // FIXME: R_MIPS_TLS_TPREL64 foo + addiu $2, $3, %tprel_hi(foo) // RELOC: R_MIPS_TLS_TPREL_HI16 foo + // ENCBE: addiu $2, $3, %tprel_hi(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %tprel_hi(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@TPREL_HI, kind: fixup_Mips_TPREL_HI + + addiu $2, $3, %tprel_lo(foo) // RELOC: R_MIPS_TLS_TPREL_LO16 foo + // ENCBE: addiu $2, $3, %tprel_lo(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %tprel_lo(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@TPREL_LO, kind: fixup_Mips_TPREL_LO + + // ?????: R_MIPS_GLOB_DAT foo + .set mips32r6 + beqzc $2, foo // RELOC: R_MIPS_PC21_S2 foo + // ENCBE: beqzc $2, foo # encoding: [0xd8,0b010AAAAA,A,A] + // ENCLE: beqzc $2, foo # encoding: [A,A,0b010AAAAA,0xd8] + // FIXUP: # fixup A - offset: 0, value: foo, kind: fixup_MIPS_PC21_S2 + + bc foo // RELOC: R_MIPS_PC26_S2 foo + // ENCBE: bc foo # encoding: [0b110010AA,A,A,A] + // ENCLE: bc foo # encoding: [A,A,A,0b110010AA] + // FIXUP: # fixup A - offset: 0, value: foo, kind: fixup_MIPS_PC26_S2 + + .set mips64r6 + ldpc $2, foo // RELOC: R_MIPS_PC18_S3 foo + // ENCBE: ldpc $2, foo # encoding: [0xec,0b010110AA,A,A] + // ENCLE: ldpc $2, foo # encoding: [A,A,0b010110AA,0xec] + // FIXUP: # fixup A - offset: 0, value: foo, kind: fixup_Mips_PC18_S3 + + .set mips32r6 + lwpc $2, foo // RELOC: R_MIPS_PC19_S2 foo + // ENCBE: lwpc $2, foo # encoding: [0xec,0b01001AAA,A,A] + // ENCLE: lwpc $2, foo # encoding: [A,A,0b01001AAA,0xec] + // FIXUP: # fixup A - offset: 0, value: foo, kind: fixup_MIPS_PC19_S2 + + addiu $2, $3, %pcrel_hi(foo) // RELOC: R_MIPS_PCHI16 foo + // ENCBE: addiu $2, $3, %pcrel_hi(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %pcrel_hi(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@PCREL_HI16, kind: fixup_MIPS_PCHI16 + + addiu $2, $3, %pcrel_lo(foo) // RELOC: R_MIPS_PCLO16 foo + // ENCBE: addiu $2, $3, %pcrel_lo(foo) # encoding: [0x24,0x62,A,A] + // ENCLE: addiu $2, $3, %pcrel_lo(foo) # encoding: [A,A,0x62,0x24] + // FIXUP: # fixup A - offset: 0, value: foo@PCREL_LO16, kind: fixup_MIPS_PCLO16 + + .set mips0 + // FIXME: R_MIPS16_* + // ?????: R_MIPS_COPY foo + // ?????: R_MIPS_JUMP_SLOT foo + // FIXME: R_MICROMIPS_* + .long foo-. // RELOC: R_MIPS_PC32 foo +// .ehword foo // FIXME: R_MIPS_EH foo diff --git a/test/MC/Mips/set-nomacro.s b/test/MC/Mips/set-nomacro.s index d81048ff12e1..00d6b2117c02 100644 --- a/test/MC/Mips/set-nomacro.s +++ b/test/MC/Mips/set-nomacro.s @@ -15,6 +15,51 @@ jal $25 jal $4, $25 + bne $2, 0, 1332 + bne $2, 1, 1332 + beq $2, 0, 1332 + beq $2, 1, 1332 + + blt $7, $8, local_label + blt $7, $0, local_label + blt $0, $8, local_label + blt $0, $0, local_label + + bltu $7, $8, local_label + bltu $7, $0, local_label + bltu $0, $8, local_label + bltu $0, $0, local_label + + ble $7, $8, local_label + ble $7, $0, local_label + ble $0, $8, local_label + ble $0, $0, local_label + + bleu $7, $8, local_label + bleu $7, $0, local_label + bleu $0, $8, local_label + bleu $0, $0, local_label + + bge $7, $8, local_label + bge $7, $0, local_label + bge $0, $8, local_label + bge $0, $0, local_label + + bgeu $7, $8, local_label + bgeu $7, $0, local_label + bgeu $0, $8, local_label + bgeu $0, $0, local_label + + bgt $7, $8, local_label + bgt $7, $0, local_label + bgt $0, $8, local_label + bgt $0, $0, local_label + + bgtu $7, $8, local_label + bgtu $7, $0, local_label + bgtu $0, $8, local_label + bgtu $0, $0, local_label + add $4, $5, $6 .set noreorder @@ -42,5 +87,86 @@ jal $4, $25 # CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bne $2, 0, 1332 +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bne $2, 1, 1332 +# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + beq $2, 0, 1332 +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + beq $2, 1, 1332 +# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + + blt $7, $8, local_label +# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + blt $7, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + blt $0, $8, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + blt $0, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + + bltu $7, $8, local_label +# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bltu $7, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bltu $0, $8, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bltu $0, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + + ble $7, $8, local_label +# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + ble $7, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + ble $0, $8, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + ble $0, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + + bleu $7, $8, local_label +# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bleu $7, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bleu $0, $8, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bleu $0, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + + bge $7, $8, local_label +# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bge $7, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bge $0, $8, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bge $0, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + + bgeu $7, $8, local_label +# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bgeu $7, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bgeu $0, $8, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bgeu $0, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + + bgt $7, $8, local_label +# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bgt $7, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bgt $0, $8, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bgt $0, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + + bgtu $7, $8, local_label +# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bgtu $7, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bgtu $0, $8, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + bgtu $0, $0, local_label +# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions + add $4, $5, $6 # CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions diff --git a/test/MC/PowerPC/deprecated-p7.s b/test/MC/PowerPC/deprecated-p7.s index 21ef6d25a4ec..6b5d91255a8e 100644 --- a/test/MC/PowerPC/deprecated-p7.s +++ b/test/MC/PowerPC/deprecated-p7.s @@ -3,8 +3,8 @@ # RUN: llvm-mc -triple powerpc-unknown-linux-gnu -mcpu=601 -show-encoding < %s 2>&1 | FileCheck -check-prefix=CHECK-OLD %s mftb 3 -# CHECK: warning: deprecated -# CHECK: mftb 3 +# CHECK-NOT: warning: deprecated +# CHECK: mfspr 3, 268 # CHECK-OLD-NOT: warning: deprecated # CHECK-OLD: mftb 3 diff --git a/test/MC/PowerPC/ppc64-encoding-vmx.s b/test/MC/PowerPC/ppc64-encoding-vmx.s index 51cae3fd2df9..5c62d2a6c955 100644 --- a/test/MC/PowerPC/ppc64-encoding-vmx.s +++ b/test/MC/PowerPC/ppc64-encoding-vmx.s @@ -686,6 +686,12 @@ # CHECK-BE: vrsqrtefp 2, 3 # encoding: [0x10,0x40,0x19,0x4a] # CHECK-LE: vrsqrtefp 2, 3 # encoding: [0x4a,0x19,0x40,0x10] vrsqrtefp 2, 3 +# CHECK-BE: vgbbd 2, 3 # encoding: [0x10,0x40,0x1d,0x0c] +# CHECK-LE: vgbbd 2, 3 # encoding: [0x0c,0x1d,0x40,0x10] + vgbbd 2, 3 +# CHECK-BE: vbpermq 2, 5, 17 # encoding: [0x10,0x45,0x8d,0x4c] +# CHECK-LE: vbpermq 2, 5, 17 # encoding: [0x4c,0x8d,0x45,0x10] + vbpermq 2, 5, 17 # Vector count leading zero instructions # CHECK-BE: vclzb 2, 3 # encoding: [0x10,0x40,0x1f,0x02] diff --git a/test/MC/R600/lit.local.cfg b/test/MC/R600/lit.local.cfg deleted file mode 100644 index ad9ce2541ef7..000000000000 --- a/test/MC/R600/lit.local.cfg +++ /dev/null @@ -1,2 +0,0 @@ -if not 'R600' in config.root.targets: - config.unsupported = True diff --git a/test/MC/Sparc/sparc-little-endian.s b/test/MC/Sparc/sparc-little-endian.s index 18ced35c8883..e9a56eb7b964 100644 --- a/test/MC/Sparc/sparc-little-endian.s +++ b/test/MC/Sparc/sparc-little-endian.s @@ -1,5 +1,5 @@ -! RUN: llvm-mc %s -arch=sparcel -show-encoding | FileCheck %s -! RUN: llvm-mc -arch=sparcel -filetype=obj < %s | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-OBJ +! RUN: llvm-mc %s -triple=sparcel-linux-gnu -show-encoding | FileCheck %s +! RUN: llvm-mc -triple=sparcel-linux-gnu -filetype=obj < %s | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-OBJ ! CHECK-OBJ: .text: .BB0: diff --git a/test/MC/Sparc/sparc-pic.s b/test/MC/Sparc/sparc-pic.s index 5a34d309899e..5430d1fea103 100644 --- a/test/MC/Sparc/sparc-pic.s +++ b/test/MC/Sparc/sparc-pic.s @@ -7,9 +7,16 @@ ! CHECK-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_PC10 _GLOBAL_OFFSET_TABLE_ 0x8 ! CHECK-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_GOT22 AGlobalVar 0x0 ! CHECK-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_GOT10 AGlobalVar 0x0 +! CHECK-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_GOT22 .LC0 0x0 +! CHECK-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_GOT10 .LC0 0x0 ! CHECK-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_WPLT30 bar 0x0 ! CHECK: ] + .section ".rodata" + .align 8 +.LC0: + .asciz "string" + .section ".text" .text .globl foo .align 4 @@ -29,8 +36,11 @@ foo: add %i1, %o7, %i1 sethi %hi(AGlobalVar), %i2 add %i2, %lo(AGlobalVar), %i2 - ldx [%i1+%i2], %i1 - ldx [%i1], %i1 + ldx [%i1+%i2], %i3 + ldx [%i3], %i3 + sethi %hi(.LC0), %i2 + add %i2, %lo(.LC0), %i2 + ldx [%i1+%i2], %i4 call bar add %i0, %i1, %o0 ret @@ -46,4 +56,3 @@ foo: AGlobalVar: .xword 0 ! 0x0 .size AGlobalVar, 8 - diff --git a/test/MC/X86/avx512-encodings.s b/test/MC/X86/avx512-encodings.s index ca0fccb2e3ef..e52dfac1976c 100644 --- a/test/MC/X86/avx512-encodings.s +++ b/test/MC/X86/avx512-encodings.s @@ -6060,22 +6060,6 @@ vpcmpd $1, %zmm24, %zmm7, %k5{%k4} // CHECK: encoding: [0x62,0xf3,0xf5,0x47,0x1e,0x72,0x01,0x02] vpcmpuq $2, 0x40(%rdx), %zmm17, %k6{%k7} -// CHECK: vpermi2d -// CHECK: encoding: [0x62,0x42,0x6d,0x4b,0x76,0xd6] -vpermi2d %zmm14, %zmm2, %zmm26 {%k3} - -// CHECK: vpermt2pd -// CHECK: encoding: [0x62,0xf2,0xcd,0xc6,0x7f,0xf3] -vpermt2pd %zmm3, %zmm22, %zmm6 {%k6} {z} - -// CHECK: vpermi2q -// CHECK: encoding: [0x62,0x62,0xed,0x4b,0x76,0x54,0x58,0x02] -vpermi2q 0x80(%rax,%rbx,2), %zmm2, %zmm26 {%k3} - -// CHECK: vpermt2d -// CHECK: encoding: [0x62,0x32,0x4d,0xc2,0x7e,0x24,0xad,0x05,0x00,0x00,0x00] -vpermt2d 5(,%r13,4), %zmm22, %zmm12 {%k2} {z} - // CHECK: valignq $2 // CHECK: encoding: [0x62,0xf3,0xfd,0x48,0x03,0x4c,0x24,0x04,0x02] valignq $2, 0x100(%rsp), %zmm0, %zmm1 @@ -8812,4 +8796,721 @@ vpermilpd $0x23, 0x400(%rbx), %zmm2 // CHECK: encoding: [0x62,0xe2,0x1d,0x50,0x36,0xb2,0xfc,0xfd,0xff,0xff] vpermd -516(%rdx){1to16}, %zmm28, %zmm22 +// CHECK: vcvtsi2sdl %eax, %xmm10, %xmm7 +// CHECK: encoding: [0xc5,0xab,0x2a,0xf8] + vcvtsi2sd %eax, %xmm10, %xmm7 + +// CHECK: vcvtsi2sdl %ebp, %xmm10, %xmm7 +// CHECK: encoding: [0xc5,0xab,0x2a,0xfd] + vcvtsi2sd %ebp, %xmm10, %xmm7 + +// CHECK: vcvtsi2sdl %r13d, %xmm10, %xmm7 +// CHECK: encoding: [0xc4,0xc1,0x2b,0x2a,0xfd] + vcvtsi2sd %r13d, %xmm10, %xmm7 + +// CHECK: vcvtsi2sdl (%rcx), %xmm10, %xmm7 +// CHECK: encoding: [0xc5,0xab,0x2a,0x39] + vcvtsi2sdl (%rcx), %xmm10, %xmm7 + +// CHECK: vcvtsi2sdl 291(%rax,%r14,8), %xmm10, %xmm7 +// CHECK: encoding: [0xc4,0xa1,0x2b,0x2a,0xbc,0xf0,0x23,0x01,0x00,0x00] + vcvtsi2sdl 291(%rax,%r14,8), %xmm10, %xmm7 + +// CHECK: vcvtsi2sdl 508(%rdx), %xmm10, %xmm7 +// CHECK: encoding: [0xc5,0xab,0x2a,0xba,0xfc,0x01,0x00,0x00] + vcvtsi2sdl 508(%rdx), %xmm10, %xmm7 + +// CHECK: vcvtsi2sdl 512(%rdx), %xmm10, %xmm7 +// CHECK: encoding: [0xc5,0xab,0x2a,0xba,0x00,0x02,0x00,0x00] + vcvtsi2sdl 512(%rdx), %xmm10, %xmm7 + +// CHECK: vcvtsi2sdl -512(%rdx), %xmm10, %xmm7 +// CHECK: encoding: [0xc5,0xab,0x2a,0xba,0x00,0xfe,0xff,0xff] + vcvtsi2sdl -512(%rdx), %xmm10, %xmm7 + +// CHECK: vcvtsi2sdl -516(%rdx), %xmm10, %xmm7 +// CHECK: encoding: [0xc5,0xab,0x2a,0xba,0xfc,0xfd,0xff,0xff] + vcvtsi2sdl -516(%rdx), %xmm10, %xmm7 +// CHECK: vcvtsi2sdq %rax, %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x61,0x9f,0x08,0x2a,0xe8] + vcvtsi2sd %rax, %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq %rax, {rn-sae}, %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x61,0x9f,0x18,0x2a,0xe8] + vcvtsi2sd %rax, {rn-sae}, %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq %rax, {ru-sae}, %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x61,0x9f,0x58,0x2a,0xe8] + vcvtsi2sd %rax, {ru-sae}, %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq %rax, {rd-sae}, %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x61,0x9f,0x38,0x2a,0xe8] + vcvtsi2sd %rax, {rd-sae}, %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq %rax, {rz-sae}, %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x61,0x9f,0x78,0x2a,0xe8] + vcvtsi2sd %rax, {rz-sae}, %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq %r8, %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x41,0x9f,0x08,0x2a,0xe8] + vcvtsi2sd %r8, %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq %r8, {rn-sae}, %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x41,0x9f,0x18,0x2a,0xe8] + vcvtsi2sd %r8, {rn-sae}, %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq %r8, {ru-sae}, %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x41,0x9f,0x58,0x2a,0xe8] + vcvtsi2sd %r8, {ru-sae}, %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq %r8, {rd-sae}, %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x41,0x9f,0x38,0x2a,0xe8] + vcvtsi2sd %r8, {rd-sae}, %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq %r8, {rz-sae}, %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x41,0x9f,0x78,0x2a,0xe8] + vcvtsi2sd %r8, {rz-sae}, %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq (%rcx), %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x61,0x9f,0x08,0x2a,0x29] + vcvtsi2sdq (%rcx), %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq 291(%rax,%r14,8), %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x21,0x9f,0x08,0x2a,0xac,0xf0,0x23,0x01,0x00,0x00] + vcvtsi2sdq 291(%rax,%r14,8), %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq 1016(%rdx), %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x61,0x9f,0x08,0x2a,0x6a,0x7f] + vcvtsi2sdq 1016(%rdx), %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq 1024(%rdx), %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x61,0x9f,0x08,0x2a,0xaa,0x00,0x04,0x00,0x00] + vcvtsi2sdq 1024(%rdx), %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq -1024(%rdx), %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x61,0x9f,0x08,0x2a,0x6a,0x80] + vcvtsi2sdq -1024(%rdx), %xmm12, %xmm29 + +// CHECK: vcvtsi2sdq -1032(%rdx), %xmm12, %xmm29 +// CHECK: encoding: [0x62,0x61,0x9f,0x08,0x2a,0xaa,0xf8,0xfb,0xff,0xff] + vcvtsi2sdq -1032(%rdx), %xmm12, %xmm29 + +// CHECK: vcvtsi2ssl %eax, %xmm10, %xmm15 +// CHECK: encoding: [0xc5,0x2a,0x2a,0xf8] + vcvtsi2ss %eax, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %eax, {rn-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x71,0x2e,0x18,0x2a,0xf8] + vcvtsi2ss %eax, {rn-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %eax, {ru-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x71,0x2e,0x58,0x2a,0xf8] + vcvtsi2ss %eax, {ru-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %eax, {rd-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x71,0x2e,0x38,0x2a,0xf8] + vcvtsi2ss %eax, {rd-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %eax, {rz-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x71,0x2e,0x78,0x2a,0xf8] + vcvtsi2ss %eax, {rz-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %ebp, %xmm10, %xmm15 +// CHECK: encoding: [0xc5,0x2a,0x2a,0xfd] + vcvtsi2ss %ebp, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %ebp, {rn-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x71,0x2e,0x18,0x2a,0xfd] + vcvtsi2ss %ebp, {rn-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %ebp, {ru-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x71,0x2e,0x58,0x2a,0xfd] + vcvtsi2ss %ebp, {ru-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %ebp, {rd-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x71,0x2e,0x38,0x2a,0xfd] + vcvtsi2ss %ebp, {rd-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %ebp, {rz-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x71,0x2e,0x78,0x2a,0xfd] + vcvtsi2ss %ebp, {rz-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %r13d, %xmm10, %xmm15 +// CHECK: encoding: [0xc4,0x41,0x2a,0x2a,0xfd] + vcvtsi2ss %r13d, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %r13d, {rn-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x51,0x2e,0x18,0x2a,0xfd] + vcvtsi2ss %r13d, {rn-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %r13d, {ru-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x51,0x2e,0x58,0x2a,0xfd] + vcvtsi2ss %r13d, {ru-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %r13d, {rd-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x51,0x2e,0x38,0x2a,0xfd] + vcvtsi2ss %r13d, {rd-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl %r13d, {rz-sae}, %xmm10, %xmm15 +// CHECK: encoding: [0x62,0x51,0x2e,0x78,0x2a,0xfd] + vcvtsi2ss %r13d, {rz-sae}, %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl (%rcx), %xmm10, %xmm15 +// CHECK: encoding: [0xc5,0x2a,0x2a,0x39] + vcvtsi2ssl (%rcx), %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl 291(%rax,%r14,8), %xmm10, %xmm15 +// CHECK: encoding: [0xc4,0x21,0x2a,0x2a,0xbc,0xf0,0x23,0x01,0x00,0x00] + vcvtsi2ssl 291(%rax,%r14,8), %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl 508(%rdx), %xmm10, %xmm15 +// CHECK: encoding: [0xc5,0x2a,0x2a,0xba,0xfc,0x01,0x00,0x00] + vcvtsi2ssl 508(%rdx), %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl 512(%rdx), %xmm10, %xmm15 +// CHECK: encoding: [0xc5,0x2a,0x2a,0xba,0x00,0x02,0x00,0x00] + vcvtsi2ssl 512(%rdx), %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl -512(%rdx), %xmm10, %xmm15 +// CHECK: encoding: [0xc5,0x2a,0x2a,0xba,0x00,0xfe,0xff,0xff] + vcvtsi2ssl -512(%rdx), %xmm10, %xmm15 + +// CHECK: vcvtsi2ssl -516(%rdx), %xmm10, %xmm15 +// CHECK: encoding: [0xc5,0x2a,0x2a,0xba,0xfc,0xfd,0xff,0xff] + vcvtsi2ssl -516(%rdx), %xmm10, %xmm15 +// CHECK: vcvtsi2ssq %rax, %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xe1,0xae,0x08,0x2a,0xc0] + vcvtsi2ss %rax, %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq %rax, {rn-sae}, %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xe1,0xae,0x18,0x2a,0xc0] + vcvtsi2ss %rax, {rn-sae}, %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq %rax, {ru-sae}, %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xe1,0xae,0x58,0x2a,0xc0] + vcvtsi2ss %rax, {ru-sae}, %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq %rax, {rd-sae}, %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xe1,0xae,0x38,0x2a,0xc0] + vcvtsi2ss %rax, {rd-sae}, %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq %rax, {rz-sae}, %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xe1,0xae,0x78,0x2a,0xc0] + vcvtsi2ss %rax, {rz-sae}, %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq %r8, %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xc1,0xae,0x08,0x2a,0xc0] + vcvtsi2ss %r8, %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq %r8, {rn-sae}, %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xc1,0xae,0x18,0x2a,0xc0] + vcvtsi2ss %r8, {rn-sae}, %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq %r8, {ru-sae}, %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xc1,0xae,0x58,0x2a,0xc0] + vcvtsi2ss %r8, {ru-sae}, %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq %r8, {rd-sae}, %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xc1,0xae,0x38,0x2a,0xc0] + vcvtsi2ss %r8, {rd-sae}, %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq %r8, {rz-sae}, %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xc1,0xae,0x78,0x2a,0xc0] + vcvtsi2ss %r8, {rz-sae}, %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq (%rcx), %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xe1,0xae,0x08,0x2a,0x01] + vcvtsi2ssq (%rcx), %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq 291(%rax,%r14,8), %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xa1,0xae,0x08,0x2a,0x84,0xf0,0x23,0x01,0x00,0x00] + vcvtsi2ssq 291(%rax,%r14,8), %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq 1016(%rdx), %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xe1,0xae,0x08,0x2a,0x42,0x7f] + vcvtsi2ssq 1016(%rdx), %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq 1024(%rdx), %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xe1,0xae,0x08,0x2a,0x82,0x00,0x04,0x00,0x00] + vcvtsi2ssq 1024(%rdx), %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq -1024(%rdx), %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xe1,0xae,0x08,0x2a,0x42,0x80] + vcvtsi2ssq -1024(%rdx), %xmm10, %xmm16 + +// CHECK: vcvtsi2ssq -1032(%rdx), %xmm10, %xmm16 +// CHECK: encoding: [0x62,0xe1,0xae,0x08,0x2a,0x82,0xf8,0xfb,0xff,0xff] + vcvtsi2ssq -1032(%rdx), %xmm10, %xmm16 + +// CHECK: vcvtusi2sdl %eax, %xmm1, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x77,0x08,0x7b,0xd8] + vcvtusi2sd %eax, %xmm1, %xmm19 + +// CHECK: vcvtusi2sdl %ebp, %xmm1, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x77,0x08,0x7b,0xdd] + vcvtusi2sd %ebp, %xmm1, %xmm19 + +// CHECK: vcvtusi2sdl %r13d, %xmm1, %xmm19 +// CHECK: encoding: [0x62,0xc1,0x77,0x08,0x7b,0xdd] + vcvtusi2sd %r13d, %xmm1, %xmm19 + +// CHECK: vcvtusi2sdl (%rcx), %xmm1, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x77,0x08,0x7b,0x19] + vcvtusi2sdl (%rcx), %xmm1, %xmm19 + +// CHECK: vcvtusi2sdl 291(%rax,%r14,8), %xmm1, %xmm19 +// CHECK: encoding: [0x62,0xa1,0x77,0x08,0x7b,0x9c,0xf0,0x23,0x01,0x00,0x00] + vcvtusi2sdl 291(%rax,%r14,8), %xmm1, %xmm19 + +// CHECK: vcvtusi2sdl 508(%rdx), %xmm1, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x77,0x08,0x7b,0x5a,0x7f] + vcvtusi2sdl 508(%rdx), %xmm1, %xmm19 + +// CHECK: vcvtusi2sdl 512(%rdx), %xmm1, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x77,0x08,0x7b,0x9a,0x00,0x02,0x00,0x00] + vcvtusi2sdl 512(%rdx), %xmm1, %xmm19 + +// CHECK: vcvtusi2sdl -512(%rdx), %xmm1, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x77,0x08,0x7b,0x5a,0x80] + vcvtusi2sdl -512(%rdx), %xmm1, %xmm19 + +// CHECK: vcvtusi2sdl -516(%rdx), %xmm1, %xmm19 +// CHECK: encoding: [0x62,0xe1,0x77,0x08,0x7b,0x9a,0xfc,0xfd,0xff,0xff] + vcvtusi2sdl -516(%rdx), %xmm1, %xmm19 + +// CHECK: vcvtusi2sdq %rax, %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x71,0xaf,0x00,0x7b,0xf0] + vcvtusi2sd %rax, %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq %rax, {rn-sae}, %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x71,0xaf,0x10,0x7b,0xf0] + vcvtusi2sd %rax, {rn-sae}, %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq %rax, {ru-sae}, %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x71,0xaf,0x50,0x7b,0xf0] + vcvtusi2sd %rax, {ru-sae}, %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq %rax, {rd-sae}, %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x71,0xaf,0x30,0x7b,0xf0] + vcvtusi2sd %rax, {rd-sae}, %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq %rax, {rz-sae}, %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x71,0xaf,0x70,0x7b,0xf0] + vcvtusi2sd %rax, {rz-sae}, %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq %r8, %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x51,0xaf,0x00,0x7b,0xf0] + vcvtusi2sd %r8, %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq %r8, {rn-sae}, %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x51,0xaf,0x10,0x7b,0xf0] + vcvtusi2sd %r8, {rn-sae}, %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq %r8, {ru-sae}, %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x51,0xaf,0x50,0x7b,0xf0] + vcvtusi2sd %r8, {ru-sae}, %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq %r8, {rd-sae}, %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x51,0xaf,0x30,0x7b,0xf0] + vcvtusi2sd %r8, {rd-sae}, %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq %r8, {rz-sae}, %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x51,0xaf,0x70,0x7b,0xf0] + vcvtusi2sd %r8, {rz-sae}, %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq (%rcx), %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x71,0xaf,0x00,0x7b,0x31] + vcvtusi2sdq (%rcx), %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq 291(%rax,%r14,8), %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x31,0xaf,0x00,0x7b,0xb4,0xf0,0x23,0x01,0x00,0x00] + vcvtusi2sdq 291(%rax,%r14,8), %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq 1016(%rdx), %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x71,0xaf,0x00,0x7b,0x72,0x7f] + vcvtusi2sdq 1016(%rdx), %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq 1024(%rdx), %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x71,0xaf,0x00,0x7b,0xb2,0x00,0x04,0x00,0x00] + vcvtusi2sdq 1024(%rdx), %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq -1024(%rdx), %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x71,0xaf,0x00,0x7b,0x72,0x80] + vcvtusi2sdq -1024(%rdx), %xmm26, %xmm14 + +// CHECK: vcvtusi2sdq -1032(%rdx), %xmm26, %xmm14 +// CHECK: encoding: [0x62,0x71,0xaf,0x00,0x7b,0xb2,0xf8,0xfb,0xff,0xff] + vcvtusi2sdq -1032(%rdx), %xmm26, %xmm14 + +// CHECK: vcvtusi2ssl %eax, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x00,0x7b,0xe8] + vcvtusi2ss %eax, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %eax, {rn-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x10,0x7b,0xe8] + vcvtusi2ss %eax, {rn-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %eax, {ru-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x50,0x7b,0xe8] + vcvtusi2ss %eax, {ru-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %eax, {rd-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x30,0x7b,0xe8] + vcvtusi2ss %eax, {rd-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %eax, {rz-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x70,0x7b,0xe8] + vcvtusi2ss %eax, {rz-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %ebp, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x00,0x7b,0xed] + vcvtusi2ss %ebp, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %ebp, {rn-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x10,0x7b,0xed] + vcvtusi2ss %ebp, {rn-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %ebp, {ru-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x50,0x7b,0xed] + vcvtusi2ss %ebp, {ru-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %ebp, {rd-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x30,0x7b,0xed] + vcvtusi2ss %ebp, {rd-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %ebp, {rz-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x70,0x7b,0xed] + vcvtusi2ss %ebp, {rz-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %r13d, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xd1,0x2e,0x00,0x7b,0xed] + vcvtusi2ss %r13d, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %r13d, {rn-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xd1,0x2e,0x10,0x7b,0xed] + vcvtusi2ss %r13d, {rn-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %r13d, {ru-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xd1,0x2e,0x50,0x7b,0xed] + vcvtusi2ss %r13d, {ru-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %r13d, {rd-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xd1,0x2e,0x30,0x7b,0xed] + vcvtusi2ss %r13d, {rd-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl %r13d, {rz-sae}, %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xd1,0x2e,0x70,0x7b,0xed] + vcvtusi2ss %r13d, {rz-sae}, %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl (%rcx), %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x00,0x7b,0x29] + vcvtusi2ssl (%rcx), %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl 291(%rax,%r14,8), %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xb1,0x2e,0x00,0x7b,0xac,0xf0,0x23,0x01,0x00,0x00] + vcvtusi2ssl 291(%rax,%r14,8), %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl 508(%rdx), %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x00,0x7b,0x6a,0x7f] + vcvtusi2ssl 508(%rdx), %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl 512(%rdx), %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x00,0x7b,0xaa,0x00,0x02,0x00,0x00] + vcvtusi2ssl 512(%rdx), %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl -512(%rdx), %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x00,0x7b,0x6a,0x80] + vcvtusi2ssl -512(%rdx), %xmm26, %xmm5 + +// CHECK: vcvtusi2ssl -516(%rdx), %xmm26, %xmm5 +// CHECK: encoding: [0x62,0xf1,0x2e,0x00,0x7b,0xaa,0xfc,0xfd,0xff,0xff] + vcvtusi2ssl -516(%rdx), %xmm26, %xmm5 + +// CHECK: vcvtusi2ssq %rax, %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x71,0xce,0x00,0x7b,0xf0] + vcvtusi2ss %rax, %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq %rax, {rn-sae}, %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x71,0xce,0x10,0x7b,0xf0] + vcvtusi2ss %rax, {rn-sae}, %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq %rax, {ru-sae}, %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x71,0xce,0x50,0x7b,0xf0] + vcvtusi2ss %rax, {ru-sae}, %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq %rax, {rd-sae}, %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x71,0xce,0x30,0x7b,0xf0] + vcvtusi2ss %rax, {rd-sae}, %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq %rax, {rz-sae}, %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x71,0xce,0x70,0x7b,0xf0] + vcvtusi2ss %rax, {rz-sae}, %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq %r8, %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x51,0xce,0x00,0x7b,0xf0] + vcvtusi2ss %r8, %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq %r8, {rn-sae}, %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x51,0xce,0x10,0x7b,0xf0] + vcvtusi2ss %r8, {rn-sae}, %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq %r8, {ru-sae}, %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x51,0xce,0x50,0x7b,0xf0] + vcvtusi2ss %r8, {ru-sae}, %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq %r8, {rd-sae}, %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x51,0xce,0x30,0x7b,0xf0] + vcvtusi2ss %r8, {rd-sae}, %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq %r8, {rz-sae}, %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x51,0xce,0x70,0x7b,0xf0] + vcvtusi2ss %r8, {rz-sae}, %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq (%rcx), %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x71,0xce,0x00,0x7b,0x31] + vcvtusi2ssq (%rcx), %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq 291(%rax,%r14,8), %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x31,0xce,0x00,0x7b,0xb4,0xf0,0x23,0x01,0x00,0x00] + vcvtusi2ssq 291(%rax,%r14,8), %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq 1016(%rdx), %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x71,0xce,0x00,0x7b,0x72,0x7f] + vcvtusi2ssq 1016(%rdx), %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq 1024(%rdx), %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x71,0xce,0x00,0x7b,0xb2,0x00,0x04,0x00,0x00] + vcvtusi2ssq 1024(%rdx), %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq -1024(%rdx), %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x71,0xce,0x00,0x7b,0x72,0x80] + vcvtusi2ssq -1024(%rdx), %xmm22, %xmm14 + +// CHECK: vcvtusi2ssq -1032(%rdx), %xmm22, %xmm14 +// CHECK: encoding: [0x62,0x71,0xce,0x00,0x7b,0xb2,0xf8,0xfb,0xff,0xff] + vcvtusi2ssq -1032(%rdx), %xmm22, %xmm14 + +// CHECK: vpermi2d %zmm4, %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x40,0x76,0xd4] + vpermi2d %zmm4, %zmm28, %zmm10 + +// CHECK: vpermi2d %zmm4, %zmm28, %zmm10 {%k5} +// CHECK: encoding: [0x62,0x72,0x1d,0x45,0x76,0xd4] + vpermi2d %zmm4, %zmm28, %zmm10 {%k5} + +// CHECK: vpermi2d %zmm4, %zmm28, %zmm10 {%k5} {z} +// CHECK: encoding: [0x62,0x72,0x1d,0xc5,0x76,0xd4] + vpermi2d %zmm4, %zmm28, %zmm10 {%k5} {z} + +// CHECK: vpermi2d (%rcx), %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x40,0x76,0x11] + vpermi2d (%rcx), %zmm28, %zmm10 + +// CHECK: vpermi2d 291(%rax,%r14,8), %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x32,0x1d,0x40,0x76,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermi2d 291(%rax,%r14,8), %zmm28, %zmm10 + +// CHECK: vpermi2d (%rcx){1to16}, %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x50,0x76,0x11] + vpermi2d (%rcx){1to16}, %zmm28, %zmm10 + +// CHECK: vpermi2d 8128(%rdx), %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x40,0x76,0x52,0x7f] + vpermi2d 8128(%rdx), %zmm28, %zmm10 + +// CHECK: vpermi2d 8192(%rdx), %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x40,0x76,0x92,0x00,0x20,0x00,0x00] + vpermi2d 8192(%rdx), %zmm28, %zmm10 + +// CHECK: vpermi2d -8192(%rdx), %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x40,0x76,0x52,0x80] + vpermi2d -8192(%rdx), %zmm28, %zmm10 + +// CHECK: vpermi2d -8256(%rdx), %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x40,0x76,0x92,0xc0,0xdf,0xff,0xff] + vpermi2d -8256(%rdx), %zmm28, %zmm10 + +// CHECK: vpermi2d 508(%rdx){1to16}, %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x50,0x76,0x52,0x7f] + vpermi2d 508(%rdx){1to16}, %zmm28, %zmm10 + +// CHECK: vpermi2d 512(%rdx){1to16}, %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x50,0x76,0x92,0x00,0x02,0x00,0x00] + vpermi2d 512(%rdx){1to16}, %zmm28, %zmm10 + +// CHECK: vpermi2d -512(%rdx){1to16}, %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x50,0x76,0x52,0x80] + vpermi2d -512(%rdx){1to16}, %zmm28, %zmm10 + +// CHECK: vpermi2d -516(%rdx){1to16}, %zmm28, %zmm10 +// CHECK: encoding: [0x62,0x72,0x1d,0x50,0x76,0x92,0xfc,0xfd,0xff,0xff] + vpermi2d -516(%rdx){1to16}, %zmm28, %zmm10 + +// CHECK: vpermi2q %zmm28, %zmm28, %zmm18 +// CHECK: encoding: [0x62,0x82,0x9d,0x40,0x76,0xd4] + vpermi2q %zmm28, %zmm28, %zmm18 + +// CHECK: vpermi2q %zmm28, %zmm28, %zmm18 {%k2} +// CHECK: encoding: [0x62,0x82,0x9d,0x42,0x76,0xd4] + vpermi2q %zmm28, %zmm28, %zmm18 {%k2} + +// CHECK: vpermi2q %zmm28, %zmm28, %zmm18 {%k2} {z} +// CHECK: encoding: [0x62,0x82,0x9d,0xc2,0x76,0xd4] + vpermi2q %zmm28, %zmm28, %zmm18 {%k2} {z} + +// CHECK: vpermi2q (%rcx), %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x40,0x76,0x11] + vpermi2q (%rcx), %zmm28, %zmm18 + +// CHECK: vpermi2q 291(%rax,%r14,8), %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xa2,0x9d,0x40,0x76,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermi2q 291(%rax,%r14,8), %zmm28, %zmm18 + +// CHECK: vpermi2q (%rcx){1to8}, %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x50,0x76,0x11] + vpermi2q (%rcx){1to8}, %zmm28, %zmm18 + +// CHECK: vpermi2q 8128(%rdx), %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x40,0x76,0x52,0x7f] + vpermi2q 8128(%rdx), %zmm28, %zmm18 + +// CHECK: vpermi2q 8192(%rdx), %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x40,0x76,0x92,0x00,0x20,0x00,0x00] + vpermi2q 8192(%rdx), %zmm28, %zmm18 + +// CHECK: vpermi2q -8192(%rdx), %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x40,0x76,0x52,0x80] + vpermi2q -8192(%rdx), %zmm28, %zmm18 + +// CHECK: vpermi2q -8256(%rdx), %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x40,0x76,0x92,0xc0,0xdf,0xff,0xff] + vpermi2q -8256(%rdx), %zmm28, %zmm18 + +// CHECK: vpermi2q 1016(%rdx){1to8}, %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x50,0x76,0x52,0x7f] + vpermi2q 1016(%rdx){1to8}, %zmm28, %zmm18 + +// CHECK: vpermi2q 1024(%rdx){1to8}, %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x50,0x76,0x92,0x00,0x04,0x00,0x00] + vpermi2q 1024(%rdx){1to8}, %zmm28, %zmm18 + +// CHECK: vpermi2q -1024(%rdx){1to8}, %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x50,0x76,0x52,0x80] + vpermi2q -1024(%rdx){1to8}, %zmm28, %zmm18 + +// CHECK: vpermi2q -1032(%rdx){1to8}, %zmm28, %zmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x50,0x76,0x92,0xf8,0xfb,0xff,0xff] + vpermi2q -1032(%rdx){1to8}, %zmm28, %zmm18 + +// CHECK: vpermi2ps %zmm8, %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x42,0x45,0x40,0x77,0xc0] + vpermi2ps %zmm8, %zmm23, %zmm24 + +// CHECK: vpermi2ps %zmm8, %zmm23, %zmm24 {%k2} +// CHECK: encoding: [0x62,0x42,0x45,0x42,0x77,0xc0] + vpermi2ps %zmm8, %zmm23, %zmm24 {%k2} + +// CHECK: vpermi2ps %zmm8, %zmm23, %zmm24 {%k2} {z} +// CHECK: encoding: [0x62,0x42,0x45,0xc2,0x77,0xc0] + vpermi2ps %zmm8, %zmm23, %zmm24 {%k2} {z} + +// CHECK: vpermi2ps (%rcx), %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x62,0x45,0x40,0x77,0x01] + vpermi2ps (%rcx), %zmm23, %zmm24 + +// CHECK: vpermi2ps 291(%rax,%r14,8), %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x22,0x45,0x40,0x77,0x84,0xf0,0x23,0x01,0x00,0x00] + vpermi2ps 291(%rax,%r14,8), %zmm23, %zmm24 + +// CHECK: vpermi2ps (%rcx){1to16}, %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x62,0x45,0x50,0x77,0x01] + vpermi2ps (%rcx){1to16}, %zmm23, %zmm24 + +// CHECK: vpermi2ps 8128(%rdx), %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x62,0x45,0x40,0x77,0x42,0x7f] + vpermi2ps 8128(%rdx), %zmm23, %zmm24 + +// CHECK: vpermi2ps 8192(%rdx), %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x62,0x45,0x40,0x77,0x82,0x00,0x20,0x00,0x00] + vpermi2ps 8192(%rdx), %zmm23, %zmm24 + +// CHECK: vpermi2ps -8192(%rdx), %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x62,0x45,0x40,0x77,0x42,0x80] + vpermi2ps -8192(%rdx), %zmm23, %zmm24 + +// CHECK: vpermi2ps -8256(%rdx), %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x62,0x45,0x40,0x77,0x82,0xc0,0xdf,0xff,0xff] + vpermi2ps -8256(%rdx), %zmm23, %zmm24 + +// CHECK: vpermi2ps 508(%rdx){1to16}, %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x62,0x45,0x50,0x77,0x42,0x7f] + vpermi2ps 508(%rdx){1to16}, %zmm23, %zmm24 + +// CHECK: vpermi2ps 512(%rdx){1to16}, %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x62,0x45,0x50,0x77,0x82,0x00,0x02,0x00,0x00] + vpermi2ps 512(%rdx){1to16}, %zmm23, %zmm24 + +// CHECK: vpermi2ps -512(%rdx){1to16}, %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x62,0x45,0x50,0x77,0x42,0x80] + vpermi2ps -512(%rdx){1to16}, %zmm23, %zmm24 + +// CHECK: vpermi2ps -516(%rdx){1to16}, %zmm23, %zmm24 +// CHECK: encoding: [0x62,0x62,0x45,0x50,0x77,0x82,0xfc,0xfd,0xff,0xff] + vpermi2ps -516(%rdx){1to16}, %zmm23, %zmm24 + +// CHECK: vpermi2pd %zmm20, %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xa2,0xd5,0x48,0x77,0xe4] + vpermi2pd %zmm20, %zmm5, %zmm20 + +// CHECK: vpermi2pd %zmm20, %zmm5, %zmm20 {%k3} +// CHECK: encoding: [0x62,0xa2,0xd5,0x4b,0x77,0xe4] + vpermi2pd %zmm20, %zmm5, %zmm20 {%k3} + +// CHECK: vpermi2pd %zmm20, %zmm5, %zmm20 {%k3} {z} +// CHECK: encoding: [0x62,0xa2,0xd5,0xcb,0x77,0xe4] + vpermi2pd %zmm20, %zmm5, %zmm20 {%k3} {z} + +// CHECK: vpermi2pd (%rcx), %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xe2,0xd5,0x48,0x77,0x21] + vpermi2pd (%rcx), %zmm5, %zmm20 + +// CHECK: vpermi2pd 291(%rax,%r14,8), %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xa2,0xd5,0x48,0x77,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpermi2pd 291(%rax,%r14,8), %zmm5, %zmm20 + +// CHECK: vpermi2pd (%rcx){1to8}, %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xe2,0xd5,0x58,0x77,0x21] + vpermi2pd (%rcx){1to8}, %zmm5, %zmm20 + +// CHECK: vpermi2pd 8128(%rdx), %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xe2,0xd5,0x48,0x77,0x62,0x7f] + vpermi2pd 8128(%rdx), %zmm5, %zmm20 + +// CHECK: vpermi2pd 8192(%rdx), %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xe2,0xd5,0x48,0x77,0xa2,0x00,0x20,0x00,0x00] + vpermi2pd 8192(%rdx), %zmm5, %zmm20 + +// CHECK: vpermi2pd -8192(%rdx), %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xe2,0xd5,0x48,0x77,0x62,0x80] + vpermi2pd -8192(%rdx), %zmm5, %zmm20 + +// CHECK: vpermi2pd -8256(%rdx), %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xe2,0xd5,0x48,0x77,0xa2,0xc0,0xdf,0xff,0xff] + vpermi2pd -8256(%rdx), %zmm5, %zmm20 + +// CHECK: vpermi2pd 1016(%rdx){1to8}, %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xe2,0xd5,0x58,0x77,0x62,0x7f] + vpermi2pd 1016(%rdx){1to8}, %zmm5, %zmm20 + +// CHECK: vpermi2pd 1024(%rdx){1to8}, %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xe2,0xd5,0x58,0x77,0xa2,0x00,0x04,0x00,0x00] + vpermi2pd 1024(%rdx){1to8}, %zmm5, %zmm20 + +// CHECK: vpermi2pd -1024(%rdx){1to8}, %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xe2,0xd5,0x58,0x77,0x62,0x80] + vpermi2pd -1024(%rdx){1to8}, %zmm5, %zmm20 + +// CHECK: vpermi2pd -1032(%rdx){1to8}, %zmm5, %zmm20 +// CHECK: encoding: [0x62,0xe2,0xd5,0x58,0x77,0xa2,0xf8,0xfb,0xff,0xff] + vpermi2pd -1032(%rdx){1to8}, %zmm5, %zmm20 diff --git a/test/MC/X86/intel-syntax-bitwise-ops.s b/test/MC/X86/intel-syntax-bitwise-ops.s index c9c9b1d17b2b..1f09996fe914 100644 --- a/test/MC/X86/intel-syntax-bitwise-ops.s +++ b/test/MC/X86/intel-syntax-bitwise-ops.s @@ -20,3 +20,5 @@ add eax, 9876 >> 1 // CHECK: addl $19752, %eax add eax, 9876 << 1 +// CHECK: addl $5, %eax + add eax, 6 ^ 3 diff --git a/test/MC/X86/x86-64-avx512bw.s b/test/MC/X86/x86-64-avx512bw.s index b81e3adffd25..45e746308cbe 100644 --- a/test/MC/X86/x86-64-avx512bw.s +++ b/test/MC/X86/x86-64-avx512bw.s @@ -3343,3 +3343,220 @@ // CHECK: vpermw -8256(%rdx), %zmm19, %zmm22 // CHECK: encoding: [0x62,0xe2,0xe5,0x40,0x8d,0xb2,0xc0,0xdf,0xff,0xff] vpermw -8256(%rdx), %zmm19, %zmm22 + +// CHECK: vpermi2w %zmm24, %zmm24, %zmm17 +// CHECK: encoding: [0x62,0x82,0xbd,0x40,0x75,0xc8] + vpermi2w %zmm24, %zmm24, %zmm17 + +// CHECK: vpermi2w %zmm24, %zmm24, %zmm17 {%k7} +// CHECK: encoding: [0x62,0x82,0xbd,0x47,0x75,0xc8] + vpermi2w %zmm24, %zmm24, %zmm17 {%k7} + +// CHECK: vpermi2w %zmm24, %zmm24, %zmm17 {%k7} {z} +// CHECK: encoding: [0x62,0x82,0xbd,0xc7,0x75,0xc8] + vpermi2w %zmm24, %zmm24, %zmm17 {%k7} {z} + +// CHECK: vpermi2w (%rcx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe2,0xbd,0x40,0x75,0x09] + vpermi2w (%rcx), %zmm24, %zmm17 + +// CHECK: vpermi2w 291(%rax,%r14,8), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xa2,0xbd,0x40,0x75,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpermi2w 291(%rax,%r14,8), %zmm24, %zmm17 + +// CHECK: vpermi2w 8128(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe2,0xbd,0x40,0x75,0x4a,0x7f] + vpermi2w 8128(%rdx), %zmm24, %zmm17 + +// CHECK: vpermi2w 8192(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe2,0xbd,0x40,0x75,0x8a,0x00,0x20,0x00,0x00] + vpermi2w 8192(%rdx), %zmm24, %zmm17 + +// CHECK: vpermi2w -8192(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe2,0xbd,0x40,0x75,0x4a,0x80] + vpermi2w -8192(%rdx), %zmm24, %zmm17 + +// CHECK: vpermi2w -8256(%rdx), %zmm24, %zmm17 +// CHECK: encoding: [0x62,0xe2,0xbd,0x40,0x75,0x8a,0xc0,0xdf,0xff,0xff] + vpermi2w -8256(%rdx), %zmm24, %zmm17 + +// CHECK: vpermt2w %zmm19, %zmm25, %zmm18 +// CHECK: encoding: [0x62,0xa2,0xb5,0x40,0x7d,0xd3] + vpermt2w %zmm19, %zmm25, %zmm18 + +// CHECK: vpermt2w %zmm19, %zmm25, %zmm18 {%k2} +// CHECK: encoding: [0x62,0xa2,0xb5,0x42,0x7d,0xd3] + vpermt2w %zmm19, %zmm25, %zmm18 {%k2} + +// CHECK: vpermt2w %zmm19, %zmm25, %zmm18 {%k2} {z} +// CHECK: encoding: [0x62,0xa2,0xb5,0xc2,0x7d,0xd3] + vpermt2w %zmm19, %zmm25, %zmm18 {%k2} {z} + +// CHECK: vpermt2w (%rcx), %zmm25, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xb5,0x40,0x7d,0x11] + vpermt2w (%rcx), %zmm25, %zmm18 + +// CHECK: vpermt2w 291(%rax,%r14,8), %zmm25, %zmm18 +// CHECK: encoding: [0x62,0xa2,0xb5,0x40,0x7d,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermt2w 291(%rax,%r14,8), %zmm25, %zmm18 + +// CHECK: vpermt2w 8128(%rdx), %zmm25, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xb5,0x40,0x7d,0x52,0x7f] + vpermt2w 8128(%rdx), %zmm25, %zmm18 + +// CHECK: vpermt2w 8192(%rdx), %zmm25, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xb5,0x40,0x7d,0x92,0x00,0x20,0x00,0x00] + vpermt2w 8192(%rdx), %zmm25, %zmm18 + +// CHECK: vpermt2w -8192(%rdx), %zmm25, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xb5,0x40,0x7d,0x52,0x80] + vpermt2w -8192(%rdx), %zmm25, %zmm18 + +// CHECK: vpermt2w -8256(%rdx), %zmm25, %zmm18 +// CHECK: encoding: [0x62,0xe2,0xb5,0x40,0x7d,0x92,0xc0,0xdf,0xff,0xff] + vpermt2w -8256(%rdx), %zmm25, %zmm18 + +// CHECK: vpavgb %zmm21, %zmm29, %zmm17 +// CHECK: encoding: [0x62,0xa1,0x15,0x40,0xe0,0xcd] + vpavgb %zmm21, %zmm29, %zmm17 + +// CHECK: vpavgb %zmm21, %zmm29, %zmm17 {%k2} +// CHECK: encoding: [0x62,0xa1,0x15,0x42,0xe0,0xcd] + vpavgb %zmm21, %zmm29, %zmm17 {%k2} + +// CHECK: vpavgb %zmm21, %zmm29, %zmm17 {%k2} {z} +// CHECK: encoding: [0x62,0xa1,0x15,0xc2,0xe0,0xcd] + vpavgb %zmm21, %zmm29, %zmm17 {%k2} {z} + +// CHECK: vpavgb (%rcx), %zmm29, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x15,0x40,0xe0,0x09] + vpavgb (%rcx), %zmm29, %zmm17 + +// CHECK: vpavgb 291(%rax,%r14,8), %zmm29, %zmm17 +// CHECK: encoding: [0x62,0xa1,0x15,0x40,0xe0,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpavgb 291(%rax,%r14,8), %zmm29, %zmm17 + +// CHECK: vpavgb 8128(%rdx), %zmm29, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x15,0x40,0xe0,0x4a,0x7f] + vpavgb 8128(%rdx), %zmm29, %zmm17 + +// CHECK: vpavgb 8192(%rdx), %zmm29, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x15,0x40,0xe0,0x8a,0x00,0x20,0x00,0x00] + vpavgb 8192(%rdx), %zmm29, %zmm17 + +// CHECK: vpavgb -8192(%rdx), %zmm29, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x15,0x40,0xe0,0x4a,0x80] + vpavgb -8192(%rdx), %zmm29, %zmm17 + +// CHECK: vpavgb -8256(%rdx), %zmm29, %zmm17 +// CHECK: encoding: [0x62,0xe1,0x15,0x40,0xe0,0x8a,0xc0,0xdf,0xff,0xff] + vpavgb -8256(%rdx), %zmm29, %zmm17 + +// CHECK: vpavgw %zmm22, %zmm27, %zmm19 +// CHECK: encoding: [0x62,0xa1,0x25,0x40,0xe3,0xde] + vpavgw %zmm22, %zmm27, %zmm19 + +// CHECK: vpavgw %zmm22, %zmm27, %zmm19 {%k4} +// CHECK: encoding: [0x62,0xa1,0x25,0x44,0xe3,0xde] + vpavgw %zmm22, %zmm27, %zmm19 {%k4} + +// CHECK: vpavgw %zmm22, %zmm27, %zmm19 {%k4} {z} +// CHECK: encoding: [0x62,0xa1,0x25,0xc4,0xe3,0xde] + vpavgw %zmm22, %zmm27, %zmm19 {%k4} {z} + +// CHECK: vpavgw (%rcx), %zmm27, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x40,0xe3,0x19] + vpavgw (%rcx), %zmm27, %zmm19 + +// CHECK: vpavgw 291(%rax,%r14,8), %zmm27, %zmm19 +// CHECK: encoding: [0x62,0xa1,0x25,0x40,0xe3,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpavgw 291(%rax,%r14,8), %zmm27, %zmm19 + +// CHECK: vpavgw 8128(%rdx), %zmm27, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x40,0xe3,0x5a,0x7f] + vpavgw 8128(%rdx), %zmm27, %zmm19 + +// CHECK: vpavgw 8192(%rdx), %zmm27, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x40,0xe3,0x9a,0x00,0x20,0x00,0x00] + vpavgw 8192(%rdx), %zmm27, %zmm19 + +// CHECK: vpavgw -8192(%rdx), %zmm27, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x40,0xe3,0x5a,0x80] + vpavgw -8192(%rdx), %zmm27, %zmm19 + +// CHECK: vpavgw -8256(%rdx), %zmm27, %zmm19 +// CHECK: encoding: [0x62,0xe1,0x25,0x40,0xe3,0x9a,0xc0,0xdf,0xff,0xff] + vpavgw -8256(%rdx), %zmm27, %zmm19 + +// CHECK: vpavgb %zmm19, %zmm27, %zmm24 +// CHECK: encoding: [0x62,0x21,0x25,0x40,0xe0,0xc3] + vpavgb %zmm19, %zmm27, %zmm24 + +// CHECK: vpavgb %zmm19, %zmm27, %zmm24 {%k4} +// CHECK: encoding: [0x62,0x21,0x25,0x44,0xe0,0xc3] + vpavgb %zmm19, %zmm27, %zmm24 {%k4} + +// CHECK: vpavgb %zmm19, %zmm27, %zmm24 {%k4} {z} +// CHECK: encoding: [0x62,0x21,0x25,0xc4,0xe0,0xc3] + vpavgb %zmm19, %zmm27, %zmm24 {%k4} {z} + +// CHECK: vpavgb (%rcx), %zmm27, %zmm24 +// CHECK: encoding: [0x62,0x61,0x25,0x40,0xe0,0x01] + vpavgb (%rcx), %zmm27, %zmm24 + +// CHECK: vpavgb 291(%rax,%r14,8), %zmm27, %zmm24 +// CHECK: encoding: [0x62,0x21,0x25,0x40,0xe0,0x84,0xf0,0x23,0x01,0x00,0x00] + vpavgb 291(%rax,%r14,8), %zmm27, %zmm24 + +// CHECK: vpavgb 8128(%rdx), %zmm27, %zmm24 +// CHECK: encoding: [0x62,0x61,0x25,0x40,0xe0,0x42,0x7f] + vpavgb 8128(%rdx), %zmm27, %zmm24 + +// CHECK: vpavgb 8192(%rdx), %zmm27, %zmm24 +// CHECK: encoding: [0x62,0x61,0x25,0x40,0xe0,0x82,0x00,0x20,0x00,0x00] + vpavgb 8192(%rdx), %zmm27, %zmm24 + +// CHECK: vpavgb -8192(%rdx), %zmm27, %zmm24 +// CHECK: encoding: [0x62,0x61,0x25,0x40,0xe0,0x42,0x80] + vpavgb -8192(%rdx), %zmm27, %zmm24 + +// CHECK: vpavgb -8256(%rdx), %zmm27, %zmm24 +// CHECK: encoding: [0x62,0x61,0x25,0x40,0xe0,0x82,0xc0,0xdf,0xff,0xff] + vpavgb -8256(%rdx), %zmm27, %zmm24 + +// CHECK: vpavgw %zmm26, %zmm29, %zmm29 +// CHECK: encoding: [0x62,0x01,0x15,0x40,0xe3,0xea] + vpavgw %zmm26, %zmm29, %zmm29 + +// CHECK: vpavgw %zmm26, %zmm29, %zmm29 {%k6} +// CHECK: encoding: [0x62,0x01,0x15,0x46,0xe3,0xea] + vpavgw %zmm26, %zmm29, %zmm29 {%k6} + +// CHECK: vpavgw %zmm26, %zmm29, %zmm29 {%k6} {z} +// CHECK: encoding: [0x62,0x01,0x15,0xc6,0xe3,0xea] + vpavgw %zmm26, %zmm29, %zmm29 {%k6} {z} + +// CHECK: vpavgw (%rcx), %zmm29, %zmm29 +// CHECK: encoding: [0x62,0x61,0x15,0x40,0xe3,0x29] + vpavgw (%rcx), %zmm29, %zmm29 + +// CHECK: vpavgw 291(%rax,%r14,8), %zmm29, %zmm29 +// CHECK: encoding: [0x62,0x21,0x15,0x40,0xe3,0xac,0xf0,0x23,0x01,0x00,0x00] + vpavgw 291(%rax,%r14,8), %zmm29, %zmm29 + +// CHECK: vpavgw 8128(%rdx), %zmm29, %zmm29 +// CHECK: encoding: [0x62,0x61,0x15,0x40,0xe3,0x6a,0x7f] + vpavgw 8128(%rdx), %zmm29, %zmm29 + +// CHECK: vpavgw 8192(%rdx), %zmm29, %zmm29 +// CHECK: encoding: [0x62,0x61,0x15,0x40,0xe3,0xaa,0x00,0x20,0x00,0x00] + vpavgw 8192(%rdx), %zmm29, %zmm29 + +// CHECK: vpavgw -8192(%rdx), %zmm29, %zmm29 +// CHECK: encoding: [0x62,0x61,0x15,0x40,0xe3,0x6a,0x80] + vpavgw -8192(%rdx), %zmm29, %zmm29 + +// CHECK: vpavgw -8256(%rdx), %zmm29, %zmm29 +// CHECK: encoding: [0x62,0x61,0x15,0x40,0xe3,0xaa,0xc0,0xdf,0xff,0xff] + vpavgw -8256(%rdx), %zmm29, %zmm29 + diff --git a/test/MC/X86/x86-64-avx512bw_vl.s b/test/MC/X86/x86-64-avx512bw_vl.s index 0ba5e17077ba..991c6102ebdf 100644 --- a/test/MC/X86/x86-64-avx512bw_vl.s +++ b/test/MC/X86/x86-64-avx512bw_vl.s @@ -5936,3 +5936,577 @@ // CHECK: encoding: [0x62,0x61,0xff,0x28,0x70,0x8a,0xe0,0xef,0xff,0xff,0x7b] vpshuflw $123, -4128(%rdx), %ymm25 +// CHECK: vpermi2w %xmm21, %xmm29, %xmm19 +// CHECK: encoding: [0x62,0xa2,0x95,0x00,0x75,0xdd] + vpermi2w %xmm21, %xmm29, %xmm19 + +// CHECK: vpermi2w %xmm21, %xmm29, %xmm19 {%k2} +// CHECK: encoding: [0x62,0xa2,0x95,0x02,0x75,0xdd] + vpermi2w %xmm21, %xmm29, %xmm19 {%k2} + +// CHECK: vpermi2w %xmm21, %xmm29, %xmm19 {%k2} {z} +// CHECK: encoding: [0x62,0xa2,0x95,0x82,0x75,0xdd] + vpermi2w %xmm21, %xmm29, %xmm19 {%k2} {z} + +// CHECK: vpermi2w (%rcx), %xmm29, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x95,0x00,0x75,0x19] + vpermi2w (%rcx), %xmm29, %xmm19 + +// CHECK: vpermi2w 291(%rax,%r14,8), %xmm29, %xmm19 +// CHECK: encoding: [0x62,0xa2,0x95,0x00,0x75,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpermi2w 291(%rax,%r14,8), %xmm29, %xmm19 + +// CHECK: vpermi2w 2032(%rdx), %xmm29, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x95,0x00,0x75,0x5a,0x7f] + vpermi2w 2032(%rdx), %xmm29, %xmm19 + +// CHECK: vpermi2w 2048(%rdx), %xmm29, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x95,0x00,0x75,0x9a,0x00,0x08,0x00,0x00] + vpermi2w 2048(%rdx), %xmm29, %xmm19 + +// CHECK: vpermi2w -2048(%rdx), %xmm29, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x95,0x00,0x75,0x5a,0x80] + vpermi2w -2048(%rdx), %xmm29, %xmm19 + +// CHECK: vpermi2w -2064(%rdx), %xmm29, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x95,0x00,0x75,0x9a,0xf0,0xf7,0xff,0xff] + vpermi2w -2064(%rdx), %xmm29, %xmm19 + +// CHECK: vpermi2w %ymm19, %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x22,0xb5,0x20,0x75,0xf3] + vpermi2w %ymm19, %ymm25, %ymm30 + +// CHECK: vpermi2w %ymm19, %ymm25, %ymm30 {%k3} +// CHECK: encoding: [0x62,0x22,0xb5,0x23,0x75,0xf3] + vpermi2w %ymm19, %ymm25, %ymm30 {%k3} + +// CHECK: vpermi2w %ymm19, %ymm25, %ymm30 {%k3} {z} +// CHECK: encoding: [0x62,0x22,0xb5,0xa3,0x75,0xf3] + vpermi2w %ymm19, %ymm25, %ymm30 {%k3} {z} + +// CHECK: vpermi2w (%rcx), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x75,0x31] + vpermi2w (%rcx), %ymm25, %ymm30 + +// CHECK: vpermi2w 291(%rax,%r14,8), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x22,0xb5,0x20,0x75,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpermi2w 291(%rax,%r14,8), %ymm25, %ymm30 + +// CHECK: vpermi2w 4064(%rdx), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x75,0x72,0x7f] + vpermi2w 4064(%rdx), %ymm25, %ymm30 + +// CHECK: vpermi2w 4096(%rdx), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x75,0xb2,0x00,0x10,0x00,0x00] + vpermi2w 4096(%rdx), %ymm25, %ymm30 + +// CHECK: vpermi2w -4096(%rdx), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x75,0x72,0x80] + vpermi2w -4096(%rdx), %ymm25, %ymm30 + +// CHECK: vpermi2w -4128(%rdx), %ymm25, %ymm30 +// CHECK: encoding: [0x62,0x62,0xb5,0x20,0x75,0xb2,0xe0,0xef,0xff,0xff] + vpermi2w -4128(%rdx), %ymm25, %ymm30 + +// CHECK: vpermt2w %xmm25, %xmm22, %xmm18 +// CHECK: encoding: [0x62,0x82,0xcd,0x00,0x7d,0xd1] + vpermt2w %xmm25, %xmm22, %xmm18 + +// CHECK: vpermt2w %xmm25, %xmm22, %xmm18 {%k6} +// CHECK: encoding: [0x62,0x82,0xcd,0x06,0x7d,0xd1] + vpermt2w %xmm25, %xmm22, %xmm18 {%k6} + +// CHECK: vpermt2w %xmm25, %xmm22, %xmm18 {%k6} {z} +// CHECK: encoding: [0x62,0x82,0xcd,0x86,0x7d,0xd1] + vpermt2w %xmm25, %xmm22, %xmm18 {%k6} {z} + +// CHECK: vpermt2w (%rcx), %xmm22, %xmm18 +// CHECK: encoding: [0x62,0xe2,0xcd,0x00,0x7d,0x11] + vpermt2w (%rcx), %xmm22, %xmm18 + +// CHECK: vpermt2w 291(%rax,%r14,8), %xmm22, %xmm18 +// CHECK: encoding: [0x62,0xa2,0xcd,0x00,0x7d,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermt2w 291(%rax,%r14,8), %xmm22, %xmm18 + +// CHECK: vpermt2w 2032(%rdx), %xmm22, %xmm18 +// CHECK: encoding: [0x62,0xe2,0xcd,0x00,0x7d,0x52,0x7f] + vpermt2w 2032(%rdx), %xmm22, %xmm18 + +// CHECK: vpermt2w 2048(%rdx), %xmm22, %xmm18 +// CHECK: encoding: [0x62,0xe2,0xcd,0x00,0x7d,0x92,0x00,0x08,0x00,0x00] + vpermt2w 2048(%rdx), %xmm22, %xmm18 + +// CHECK: vpermt2w -2048(%rdx), %xmm22, %xmm18 +// CHECK: encoding: [0x62,0xe2,0xcd,0x00,0x7d,0x52,0x80] + vpermt2w -2048(%rdx), %xmm22, %xmm18 + +// CHECK: vpermt2w -2064(%rdx), %xmm22, %xmm18 +// CHECK: encoding: [0x62,0xe2,0xcd,0x00,0x7d,0x92,0xf0,0xf7,0xff,0xff] + vpermt2w -2064(%rdx), %xmm22, %xmm18 + +// CHECK: vpermt2w %ymm26, %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x02,0xc5,0x20,0x7d,0xe2] + vpermt2w %ymm26, %ymm23, %ymm28 + +// CHECK: vpermt2w %ymm26, %ymm23, %ymm28 {%k4} +// CHECK: encoding: [0x62,0x02,0xc5,0x24,0x7d,0xe2] + vpermt2w %ymm26, %ymm23, %ymm28 {%k4} + +// CHECK: vpermt2w %ymm26, %ymm23, %ymm28 {%k4} {z} +// CHECK: encoding: [0x62,0x02,0xc5,0xa4,0x7d,0xe2] + vpermt2w %ymm26, %ymm23, %ymm28 {%k4} {z} + +// CHECK: vpermt2w (%rcx), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0xc5,0x20,0x7d,0x21] + vpermt2w (%rcx), %ymm23, %ymm28 + +// CHECK: vpermt2w 291(%rax,%r14,8), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x22,0xc5,0x20,0x7d,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpermt2w 291(%rax,%r14,8), %ymm23, %ymm28 + +// CHECK: vpermt2w 4064(%rdx), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0xc5,0x20,0x7d,0x62,0x7f] + vpermt2w 4064(%rdx), %ymm23, %ymm28 + +// CHECK: vpermt2w 4096(%rdx), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0xc5,0x20,0x7d,0xa2,0x00,0x10,0x00,0x00] + vpermt2w 4096(%rdx), %ymm23, %ymm28 + +// CHECK: vpermt2w -4096(%rdx), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0xc5,0x20,0x7d,0x62,0x80] + vpermt2w -4096(%rdx), %ymm23, %ymm28 + +// CHECK: vpermt2w -4128(%rdx), %ymm23, %ymm28 +// CHECK: encoding: [0x62,0x62,0xc5,0x20,0x7d,0xa2,0xe0,0xef,0xff,0xff] + vpermt2w -4128(%rdx), %ymm23, %ymm28 +// CHECK: vpavgb %xmm22, %xmm24, %xmm21 +// CHECK: encoding: [0x62,0xa1,0x3d,0x00,0xe0,0xee] + vpavgb %xmm22, %xmm24, %xmm21 + +// CHECK: vpavgb %xmm22, %xmm24, %xmm21 {%k7} +// CHECK: encoding: [0x62,0xa1,0x3d,0x07,0xe0,0xee] + vpavgb %xmm22, %xmm24, %xmm21 {%k7} + +// CHECK: vpavgb %xmm22, %xmm24, %xmm21 {%k7} {z} +// CHECK: encoding: [0x62,0xa1,0x3d,0x87,0xe0,0xee] + vpavgb %xmm22, %xmm24, %xmm21 {%k7} {z} + +// CHECK: vpavgb (%rcx), %xmm24, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x3d,0x00,0xe0,0x29] + vpavgb (%rcx), %xmm24, %xmm21 + +// CHECK: vpavgb 4660(%rax,%r14,8), %xmm24, %xmm21 +// CHECK: encoding: [0x62,0xa1,0x3d,0x00,0xe0,0xac,0xf0,0x34,0x12,0x00,0x00] + vpavgb 4660(%rax,%r14,8), %xmm24, %xmm21 + +// CHECK: vpavgb 2032(%rdx), %xmm24, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x3d,0x00,0xe0,0x6a,0x7f] + vpavgb 2032(%rdx), %xmm24, %xmm21 + +// CHECK: vpavgb 2048(%rdx), %xmm24, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x3d,0x00,0xe0,0xaa,0x00,0x08,0x00,0x00] + vpavgb 2048(%rdx), %xmm24, %xmm21 + +// CHECK: vpavgb -2048(%rdx), %xmm24, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x3d,0x00,0xe0,0x6a,0x80] + vpavgb -2048(%rdx), %xmm24, %xmm21 + +// CHECK: vpavgb -2064(%rdx), %xmm24, %xmm21 +// CHECK: encoding: [0x62,0xe1,0x3d,0x00,0xe0,0xaa,0xf0,0xf7,0xff,0xff] + vpavgb -2064(%rdx), %xmm24, %xmm21 + +// CHECK: vpavgb %ymm18, %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x21,0x6d,0x20,0xe0,0xd2] + vpavgb %ymm18, %ymm18, %ymm26 + +// CHECK: vpavgb %ymm18, %ymm18, %ymm26 {%k4} +// CHECK: encoding: [0x62,0x21,0x6d,0x24,0xe0,0xd2] + vpavgb %ymm18, %ymm18, %ymm26 {%k4} + +// CHECK: vpavgb %ymm18, %ymm18, %ymm26 {%k4} {z} +// CHECK: encoding: [0x62,0x21,0x6d,0xa4,0xe0,0xd2] + vpavgb %ymm18, %ymm18, %ymm26 {%k4} {z} + +// CHECK: vpavgb (%rcx), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xe0,0x11] + vpavgb (%rcx), %ymm18, %ymm26 + +// CHECK: vpavgb 4660(%rax,%r14,8), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x21,0x6d,0x20,0xe0,0x94,0xf0,0x34,0x12,0x00,0x00] + vpavgb 4660(%rax,%r14,8), %ymm18, %ymm26 + +// CHECK: vpavgb 4064(%rdx), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xe0,0x52,0x7f] + vpavgb 4064(%rdx), %ymm18, %ymm26 + +// CHECK: vpavgb 4096(%rdx), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xe0,0x92,0x00,0x10,0x00,0x00] + vpavgb 4096(%rdx), %ymm18, %ymm26 + +// CHECK: vpavgb -4096(%rdx), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xe0,0x52,0x80] + vpavgb -4096(%rdx), %ymm18, %ymm26 + +// CHECK: vpavgb -4128(%rdx), %ymm18, %ymm26 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xe0,0x92,0xe0,0xef,0xff,0xff] + vpavgb -4128(%rdx), %ymm18, %ymm26 + +// CHECK: vpavgw %xmm23, %xmm28, %xmm29 +// CHECK: encoding: [0x62,0x21,0x1d,0x00,0xe3,0xef] + vpavgw %xmm23, %xmm28, %xmm29 + +// CHECK: vpavgw %xmm23, %xmm28, %xmm29 {%k7} +// CHECK: encoding: [0x62,0x21,0x1d,0x07,0xe3,0xef] + vpavgw %xmm23, %xmm28, %xmm29 {%k7} + +// CHECK: vpavgw %xmm23, %xmm28, %xmm29 {%k7} {z} +// CHECK: encoding: [0x62,0x21,0x1d,0x87,0xe3,0xef] + vpavgw %xmm23, %xmm28, %xmm29 {%k7} {z} + +// CHECK: vpavgw (%rcx), %xmm28, %xmm29 +// CHECK: encoding: [0x62,0x61,0x1d,0x00,0xe3,0x29] + vpavgw (%rcx), %xmm28, %xmm29 + +// CHECK: vpavgw 4660(%rax,%r14,8), %xmm28, %xmm29 +// CHECK: encoding: [0x62,0x21,0x1d,0x00,0xe3,0xac,0xf0,0x34,0x12,0x00,0x00] + vpavgw 4660(%rax,%r14,8), %xmm28, %xmm29 + +// CHECK: vpavgw 2032(%rdx), %xmm28, %xmm29 +// CHECK: encoding: [0x62,0x61,0x1d,0x00,0xe3,0x6a,0x7f] + vpavgw 2032(%rdx), %xmm28, %xmm29 + +// CHECK: vpavgw 2048(%rdx), %xmm28, %xmm29 +// CHECK: encoding: [0x62,0x61,0x1d,0x00,0xe3,0xaa,0x00,0x08,0x00,0x00] + vpavgw 2048(%rdx), %xmm28, %xmm29 + +// CHECK: vpavgw -2048(%rdx), %xmm28, %xmm29 +// CHECK: encoding: [0x62,0x61,0x1d,0x00,0xe3,0x6a,0x80] + vpavgw -2048(%rdx), %xmm28, %xmm29 + +// CHECK: vpavgw -2064(%rdx), %xmm28, %xmm29 +// CHECK: encoding: [0x62,0x61,0x1d,0x00,0xe3,0xaa,0xf0,0xf7,0xff,0xff] + vpavgw -2064(%rdx), %xmm28, %xmm29 + +// CHECK: vpavgw %ymm17, %ymm18, %ymm27 +// CHECK: encoding: [0x62,0x21,0x6d,0x20,0xe3,0xd9] + vpavgw %ymm17, %ymm18, %ymm27 + +// CHECK: vpavgw %ymm17, %ymm18, %ymm27 {%k5} +// CHECK: encoding: [0x62,0x21,0x6d,0x25,0xe3,0xd9] + vpavgw %ymm17, %ymm18, %ymm27 {%k5} + +// CHECK: vpavgw %ymm17, %ymm18, %ymm27 {%k5} {z} +// CHECK: encoding: [0x62,0x21,0x6d,0xa5,0xe3,0xd9] + vpavgw %ymm17, %ymm18, %ymm27 {%k5} {z} + +// CHECK: vpavgw (%rcx), %ymm18, %ymm27 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xe3,0x19] + vpavgw (%rcx), %ymm18, %ymm27 + +// CHECK: vpavgw 4660(%rax,%r14,8), %ymm18, %ymm27 +// CHECK: encoding: [0x62,0x21,0x6d,0x20,0xe3,0x9c,0xf0,0x34,0x12,0x00,0x00] + vpavgw 4660(%rax,%r14,8), %ymm18, %ymm27 + +// CHECK: vpavgw 4064(%rdx), %ymm18, %ymm27 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xe3,0x5a,0x7f] + vpavgw 4064(%rdx), %ymm18, %ymm27 + +// CHECK: vpavgw 4096(%rdx), %ymm18, %ymm27 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xe3,0x9a,0x00,0x10,0x00,0x00] + vpavgw 4096(%rdx), %ymm18, %ymm27 + +// CHECK: vpavgw -4096(%rdx), %ymm18, %ymm27 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xe3,0x5a,0x80] + vpavgw -4096(%rdx), %ymm18, %ymm27 + +// CHECK: vpavgw -4128(%rdx), %ymm18, %ymm27 +// CHECK: encoding: [0x62,0x61,0x6d,0x20,0xe3,0x9a,0xe0,0xef,0xff,0xff] + vpavgw -4128(%rdx), %ymm18, %ymm27 + +// CHECK: vpavgb %xmm20, %xmm22, %xmm26 +// CHECK: encoding: [0x62,0x21,0x4d,0x00,0xe0,0xd4] + vpavgb %xmm20, %xmm22, %xmm26 + +// CHECK: vpavgb %xmm20, %xmm22, %xmm26 {%k6} +// CHECK: encoding: [0x62,0x21,0x4d,0x06,0xe0,0xd4] + vpavgb %xmm20, %xmm22, %xmm26 {%k6} + +// CHECK: vpavgb %xmm20, %xmm22, %xmm26 {%k6} {z} +// CHECK: encoding: [0x62,0x21,0x4d,0x86,0xe0,0xd4] + vpavgb %xmm20, %xmm22, %xmm26 {%k6} {z} + +// CHECK: vpavgb (%rcx), %xmm22, %xmm26 +// CHECK: encoding: [0x62,0x61,0x4d,0x00,0xe0,0x11] + vpavgb (%rcx), %xmm22, %xmm26 + +// CHECK: vpavgb 291(%rax,%r14,8), %xmm22, %xmm26 +// CHECK: encoding: [0x62,0x21,0x4d,0x00,0xe0,0x94,0xf0,0x23,0x01,0x00,0x00] + vpavgb 291(%rax,%r14,8), %xmm22, %xmm26 + +// CHECK: vpavgb 2032(%rdx), %xmm22, %xmm26 +// CHECK: encoding: [0x62,0x61,0x4d,0x00,0xe0,0x52,0x7f] + vpavgb 2032(%rdx), %xmm22, %xmm26 + +// CHECK: vpavgb 2048(%rdx), %xmm22, %xmm26 +// CHECK: encoding: [0x62,0x61,0x4d,0x00,0xe0,0x92,0x00,0x08,0x00,0x00] + vpavgb 2048(%rdx), %xmm22, %xmm26 + +// CHECK: vpavgb -2048(%rdx), %xmm22, %xmm26 +// CHECK: encoding: [0x62,0x61,0x4d,0x00,0xe0,0x52,0x80] + vpavgb -2048(%rdx), %xmm22, %xmm26 + +// CHECK: vpavgb -2064(%rdx), %xmm22, %xmm26 +// CHECK: encoding: [0x62,0x61,0x4d,0x00,0xe0,0x92,0xf0,0xf7,0xff,0xff] + vpavgb -2064(%rdx), %xmm22, %xmm26 + +// CHECK: vpavgb %ymm18, %ymm22, %ymm29 +// CHECK: encoding: [0x62,0x21,0x4d,0x20,0xe0,0xea] + vpavgb %ymm18, %ymm22, %ymm29 + +// CHECK: vpavgb %ymm18, %ymm22, %ymm29 {%k1} +// CHECK: encoding: [0x62,0x21,0x4d,0x21,0xe0,0xea] + vpavgb %ymm18, %ymm22, %ymm29 {%k1} + +// CHECK: vpavgb %ymm18, %ymm22, %ymm29 {%k1} {z} +// CHECK: encoding: [0x62,0x21,0x4d,0xa1,0xe0,0xea] + vpavgb %ymm18, %ymm22, %ymm29 {%k1} {z} + +// CHECK: vpavgb (%rcx), %ymm22, %ymm29 +// CHECK: encoding: [0x62,0x61,0x4d,0x20,0xe0,0x29] + vpavgb (%rcx), %ymm22, %ymm29 + +// CHECK: vpavgb 291(%rax,%r14,8), %ymm22, %ymm29 +// CHECK: encoding: [0x62,0x21,0x4d,0x20,0xe0,0xac,0xf0,0x23,0x01,0x00,0x00] + vpavgb 291(%rax,%r14,8), %ymm22, %ymm29 + +// CHECK: vpavgb 4064(%rdx), %ymm22, %ymm29 +// CHECK: encoding: [0x62,0x61,0x4d,0x20,0xe0,0x6a,0x7f] + vpavgb 4064(%rdx), %ymm22, %ymm29 + +// CHECK: vpavgb 4096(%rdx), %ymm22, %ymm29 +// CHECK: encoding: [0x62,0x61,0x4d,0x20,0xe0,0xaa,0x00,0x10,0x00,0x00] + vpavgb 4096(%rdx), %ymm22, %ymm29 + +// CHECK: vpavgb -4096(%rdx), %ymm22, %ymm29 +// CHECK: encoding: [0x62,0x61,0x4d,0x20,0xe0,0x6a,0x80] + vpavgb -4096(%rdx), %ymm22, %ymm29 + +// CHECK: vpavgb -4128(%rdx), %ymm22, %ymm29 +// CHECK: encoding: [0x62,0x61,0x4d,0x20,0xe0,0xaa,0xe0,0xef,0xff,0xff] + vpavgb -4128(%rdx), %ymm22, %ymm29 + +// CHECK: vpavgw %xmm23, %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x21,0x3d,0x00,0xe3,0xe7] + vpavgw %xmm23, %xmm24, %xmm28 + +// CHECK: vpavgw %xmm23, %xmm24, %xmm28 {%k7} +// CHECK: encoding: [0x62,0x21,0x3d,0x07,0xe3,0xe7] + vpavgw %xmm23, %xmm24, %xmm28 {%k7} + +// CHECK: vpavgw %xmm23, %xmm24, %xmm28 {%k7} {z} +// CHECK: encoding: [0x62,0x21,0x3d,0x87,0xe3,0xe7] + vpavgw %xmm23, %xmm24, %xmm28 {%k7} {z} + +// CHECK: vpavgw (%rcx), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0x3d,0x00,0xe3,0x21] + vpavgw (%rcx), %xmm24, %xmm28 + +// CHECK: vpavgw 291(%rax,%r14,8), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x21,0x3d,0x00,0xe3,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpavgw 291(%rax,%r14,8), %xmm24, %xmm28 + +// CHECK: vpavgw 2032(%rdx), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0x3d,0x00,0xe3,0x62,0x7f] + vpavgw 2032(%rdx), %xmm24, %xmm28 + +// CHECK: vpavgw 2048(%rdx), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0x3d,0x00,0xe3,0xa2,0x00,0x08,0x00,0x00] + vpavgw 2048(%rdx), %xmm24, %xmm28 + +// CHECK: vpavgw -2048(%rdx), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0x3d,0x00,0xe3,0x62,0x80] + vpavgw -2048(%rdx), %xmm24, %xmm28 + +// CHECK: vpavgw -2064(%rdx), %xmm24, %xmm28 +// CHECK: encoding: [0x62,0x61,0x3d,0x00,0xe3,0xa2,0xf0,0xf7,0xff,0xff] + vpavgw -2064(%rdx), %xmm24, %xmm28 + +// CHECK: vpavgw %ymm22, %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xa1,0x2d,0x20,0xe3,0xf6] + vpavgw %ymm22, %ymm26, %ymm22 + +// CHECK: vpavgw %ymm22, %ymm26, %ymm22 {%k7} +// CHECK: encoding: [0x62,0xa1,0x2d,0x27,0xe3,0xf6] + vpavgw %ymm22, %ymm26, %ymm22 {%k7} + +// CHECK: vpavgw %ymm22, %ymm26, %ymm22 {%k7} {z} +// CHECK: encoding: [0x62,0xa1,0x2d,0xa7,0xe3,0xf6] + vpavgw %ymm22, %ymm26, %ymm22 {%k7} {z} + +// CHECK: vpavgw (%rcx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x2d,0x20,0xe3,0x31] + vpavgw (%rcx), %ymm26, %ymm22 + +// CHECK: vpavgw 291(%rax,%r14,8), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xa1,0x2d,0x20,0xe3,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpavgw 291(%rax,%r14,8), %ymm26, %ymm22 + +// CHECK: vpavgw 4064(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x2d,0x20,0xe3,0x72,0x7f] + vpavgw 4064(%rdx), %ymm26, %ymm22 + +// CHECK: vpavgw 4096(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x2d,0x20,0xe3,0xb2,0x00,0x10,0x00,0x00] + vpavgw 4096(%rdx), %ymm26, %ymm22 + +// CHECK: vpavgw -4096(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x2d,0x20,0xe3,0x72,0x80] + vpavgw -4096(%rdx), %ymm26, %ymm22 + +// CHECK: vpavgw -4128(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe1,0x2d,0x20,0xe3,0xb2,0xe0,0xef,0xff,0xff] + vpavgw -4128(%rdx), %ymm26, %ymm22 + +// CHECK: vpavgb %xmm26, %xmm19, %xmm20 +// CHECK: encoding: [0x62,0x81,0x65,0x00,0xe0,0xe2] + vpavgb %xmm26, %xmm19, %xmm20 + +// CHECK: vpavgb %xmm26, %xmm19, %xmm20 {%k7} +// CHECK: encoding: [0x62,0x81,0x65,0x07,0xe0,0xe2] + vpavgb %xmm26, %xmm19, %xmm20 {%k7} + +// CHECK: vpavgb %xmm26, %xmm19, %xmm20 {%k7} {z} +// CHECK: encoding: [0x62,0x81,0x65,0x87,0xe0,0xe2] + vpavgb %xmm26, %xmm19, %xmm20 {%k7} {z} + +// CHECK: vpavgb (%rcx), %xmm19, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x65,0x00,0xe0,0x21] + vpavgb (%rcx), %xmm19, %xmm20 + +// CHECK: vpavgb 291(%rax,%r14,8), %xmm19, %xmm20 +// CHECK: encoding: [0x62,0xa1,0x65,0x00,0xe0,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpavgb 291(%rax,%r14,8), %xmm19, %xmm20 + +// CHECK: vpavgb 2032(%rdx), %xmm19, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x65,0x00,0xe0,0x62,0x7f] + vpavgb 2032(%rdx), %xmm19, %xmm20 + +// CHECK: vpavgb 2048(%rdx), %xmm19, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x65,0x00,0xe0,0xa2,0x00,0x08,0x00,0x00] + vpavgb 2048(%rdx), %xmm19, %xmm20 + +// CHECK: vpavgb -2048(%rdx), %xmm19, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x65,0x00,0xe0,0x62,0x80] + vpavgb -2048(%rdx), %xmm19, %xmm20 + +// CHECK: vpavgb -2064(%rdx), %xmm19, %xmm20 +// CHECK: encoding: [0x62,0xe1,0x65,0x00,0xe0,0xa2,0xf0,0xf7,0xff,0xff] + vpavgb -2064(%rdx), %xmm19, %xmm20 + +// CHECK: vpavgb %ymm17, %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x21,0x4d,0x20,0xe0,0xd1] + vpavgb %ymm17, %ymm22, %ymm26 + +// CHECK: vpavgb %ymm17, %ymm22, %ymm26 {%k5} +// CHECK: encoding: [0x62,0x21,0x4d,0x25,0xe0,0xd1] + vpavgb %ymm17, %ymm22, %ymm26 {%k5} + +// CHECK: vpavgb %ymm17, %ymm22, %ymm26 {%k5} {z} +// CHECK: encoding: [0x62,0x21,0x4d,0xa5,0xe0,0xd1] + vpavgb %ymm17, %ymm22, %ymm26 {%k5} {z} + +// CHECK: vpavgb (%rcx), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x61,0x4d,0x20,0xe0,0x11] + vpavgb (%rcx), %ymm22, %ymm26 + +// CHECK: vpavgb 291(%rax,%r14,8), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x21,0x4d,0x20,0xe0,0x94,0xf0,0x23,0x01,0x00,0x00] + vpavgb 291(%rax,%r14,8), %ymm22, %ymm26 + +// CHECK: vpavgb 4064(%rdx), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x61,0x4d,0x20,0xe0,0x52,0x7f] + vpavgb 4064(%rdx), %ymm22, %ymm26 + +// CHECK: vpavgb 4096(%rdx), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x61,0x4d,0x20,0xe0,0x92,0x00,0x10,0x00,0x00] + vpavgb 4096(%rdx), %ymm22, %ymm26 + +// CHECK: vpavgb -4096(%rdx), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x61,0x4d,0x20,0xe0,0x52,0x80] + vpavgb -4096(%rdx), %ymm22, %ymm26 + +// CHECK: vpavgb -4128(%rdx), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x61,0x4d,0x20,0xe0,0x92,0xe0,0xef,0xff,0xff] + vpavgb -4128(%rdx), %ymm22, %ymm26 + +// CHECK: vpavgw %xmm20, %xmm18, %xmm22 +// CHECK: encoding: [0x62,0xa1,0x6d,0x00,0xe3,0xf4] + vpavgw %xmm20, %xmm18, %xmm22 + +// CHECK: vpavgw %xmm20, %xmm18, %xmm22 {%k7} +// CHECK: encoding: [0x62,0xa1,0x6d,0x07,0xe3,0xf4] + vpavgw %xmm20, %xmm18, %xmm22 {%k7} + +// CHECK: vpavgw %xmm20, %xmm18, %xmm22 {%k7} {z} +// CHECK: encoding: [0x62,0xa1,0x6d,0x87,0xe3,0xf4] + vpavgw %xmm20, %xmm18, %xmm22 {%k7} {z} + +// CHECK: vpavgw (%rcx), %xmm18, %xmm22 +// CHECK: encoding: [0x62,0xe1,0x6d,0x00,0xe3,0x31] + vpavgw (%rcx), %xmm18, %xmm22 + +// CHECK: vpavgw 291(%rax,%r14,8), %xmm18, %xmm22 +// CHECK: encoding: [0x62,0xa1,0x6d,0x00,0xe3,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpavgw 291(%rax,%r14,8), %xmm18, %xmm22 + +// CHECK: vpavgw 2032(%rdx), %xmm18, %xmm22 +// CHECK: encoding: [0x62,0xe1,0x6d,0x00,0xe3,0x72,0x7f] + vpavgw 2032(%rdx), %xmm18, %xmm22 + +// CHECK: vpavgw 2048(%rdx), %xmm18, %xmm22 +// CHECK: encoding: [0x62,0xe1,0x6d,0x00,0xe3,0xb2,0x00,0x08,0x00,0x00] + vpavgw 2048(%rdx), %xmm18, %xmm22 + +// CHECK: vpavgw -2048(%rdx), %xmm18, %xmm22 +// CHECK: encoding: [0x62,0xe1,0x6d,0x00,0xe3,0x72,0x80] + vpavgw -2048(%rdx), %xmm18, %xmm22 + +// CHECK: vpavgw -2064(%rdx), %xmm18, %xmm22 +// CHECK: encoding: [0x62,0xe1,0x6d,0x00,0xe3,0xb2,0xf0,0xf7,0xff,0xff] + vpavgw -2064(%rdx), %xmm18, %xmm22 + +// CHECK: vpavgw %ymm21, %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xa1,0x45,0x20,0xe3,0xed] + vpavgw %ymm21, %ymm23, %ymm21 + +// CHECK: vpavgw %ymm21, %ymm23, %ymm21 {%k2} +// CHECK: encoding: [0x62,0xa1,0x45,0x22,0xe3,0xed] + vpavgw %ymm21, %ymm23, %ymm21 {%k2} + +// CHECK: vpavgw %ymm21, %ymm23, %ymm21 {%k2} {z} +// CHECK: encoding: [0x62,0xa1,0x45,0xa2,0xe3,0xed] + vpavgw %ymm21, %ymm23, %ymm21 {%k2} {z} + +// CHECK: vpavgw (%rcx), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x45,0x20,0xe3,0x29] + vpavgw (%rcx), %ymm23, %ymm21 + +// CHECK: vpavgw 291(%rax,%r14,8), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xa1,0x45,0x20,0xe3,0xac,0xf0,0x23,0x01,0x00,0x00] + vpavgw 291(%rax,%r14,8), %ymm23, %ymm21 + +// CHECK: vpavgw 4064(%rdx), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x45,0x20,0xe3,0x6a,0x7f] + vpavgw 4064(%rdx), %ymm23, %ymm21 + +// CHECK: vpavgw 4096(%rdx), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x45,0x20,0xe3,0xaa,0x00,0x10,0x00,0x00] + vpavgw 4096(%rdx), %ymm23, %ymm21 + +// CHECK: vpavgw -4096(%rdx), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x45,0x20,0xe3,0x6a,0x80] + vpavgw -4096(%rdx), %ymm23, %ymm21 + +// CHECK: vpavgw -4128(%rdx), %ymm23, %ymm21 +// CHECK: encoding: [0x62,0xe1,0x45,0x20,0xe3,0xaa,0xe0,0xef,0xff,0xff] + vpavgw -4128(%rdx), %ymm23, %ymm21 diff --git a/test/MC/X86/x86-64-avx512f_vl.s b/test/MC/X86/x86-64-avx512f_vl.s index f521b3e42d44..1381b2e76e18 100644 --- a/test/MC/X86/x86-64-avx512f_vl.s +++ b/test/MC/X86/x86-64-avx512f_vl.s @@ -11132,3 +11132,899 @@ vaddpd {rz-sae}, %zmm2, %zmm1, %zmm1 // CHECK: valignq $123, -1032(%rdx){1to4}, %ymm24, %ymm25 // CHECK: encoding: [0x62,0x63,0xbd,0x30,0x03,0x8a,0xf8,0xfb,0xff,0xff,0x7b] valignq $0x7b, -1032(%rdx){1to4}, %ymm24, %ymm25 + +// CHECK: vpermi2d %xmm25, %xmm23, %xmm21 +// CHECK: encoding: [0x62,0x82,0x45,0x00,0x76,0xe9] + vpermi2d %xmm25, %xmm23, %xmm21 + +// CHECK: vpermi2d %xmm25, %xmm23, %xmm21 {%k6} +// CHECK: encoding: [0x62,0x82,0x45,0x06,0x76,0xe9] + vpermi2d %xmm25, %xmm23, %xmm21 {%k6} + +// CHECK: vpermi2d %xmm25, %xmm23, %xmm21 {%k6} {z} +// CHECK: encoding: [0x62,0x82,0x45,0x86,0x76,0xe9] + vpermi2d %xmm25, %xmm23, %xmm21 {%k6} {z} + +// CHECK: vpermi2d (%rcx), %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x76,0x29] + vpermi2d (%rcx), %xmm23, %xmm21 + +// CHECK: vpermi2d 291(%rax,%r14,8), %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xa2,0x45,0x00,0x76,0xac,0xf0,0x23,0x01,0x00,0x00] + vpermi2d 291(%rax,%r14,8), %xmm23, %xmm21 + +// CHECK: vpermi2d (%rcx){1to4}, %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x76,0x29] + vpermi2d (%rcx){1to4}, %xmm23, %xmm21 + +// CHECK: vpermi2d 2032(%rdx), %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x76,0x6a,0x7f] + vpermi2d 2032(%rdx), %xmm23, %xmm21 + +// CHECK: vpermi2d 2048(%rdx), %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x76,0xaa,0x00,0x08,0x00,0x00] + vpermi2d 2048(%rdx), %xmm23, %xmm21 + +// CHECK: vpermi2d -2048(%rdx), %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x76,0x6a,0x80] + vpermi2d -2048(%rdx), %xmm23, %xmm21 + +// CHECK: vpermi2d -2064(%rdx), %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x76,0xaa,0xf0,0xf7,0xff,0xff] + vpermi2d -2064(%rdx), %xmm23, %xmm21 + +// CHECK: vpermi2d 508(%rdx){1to4}, %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x76,0x6a,0x7f] + vpermi2d 508(%rdx){1to4}, %xmm23, %xmm21 + +// CHECK: vpermi2d 512(%rdx){1to4}, %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x76,0xaa,0x00,0x02,0x00,0x00] + vpermi2d 512(%rdx){1to4}, %xmm23, %xmm21 + +// CHECK: vpermi2d -512(%rdx){1to4}, %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x76,0x6a,0x80] + vpermi2d -512(%rdx){1to4}, %xmm23, %xmm21 + +// CHECK: vpermi2d -516(%rdx){1to4}, %xmm23, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x76,0xaa,0xfc,0xfd,0xff,0xff] + vpermi2d -516(%rdx){1to4}, %xmm23, %xmm21 + +// CHECK: vpermi2d %ymm22, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xa2,0x3d,0x20,0x76,0xd6] + vpermi2d %ymm22, %ymm24, %ymm18 + +// CHECK: vpermi2d %ymm22, %ymm24, %ymm18 {%k1} +// CHECK: encoding: [0x62,0xa2,0x3d,0x21,0x76,0xd6] + vpermi2d %ymm22, %ymm24, %ymm18 {%k1} + +// CHECK: vpermi2d %ymm22, %ymm24, %ymm18 {%k1} {z} +// CHECK: encoding: [0x62,0xa2,0x3d,0xa1,0x76,0xd6] + vpermi2d %ymm22, %ymm24, %ymm18 {%k1} {z} + +// CHECK: vpermi2d (%rcx), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x20,0x76,0x11] + vpermi2d (%rcx), %ymm24, %ymm18 + +// CHECK: vpermi2d 291(%rax,%r14,8), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xa2,0x3d,0x20,0x76,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermi2d 291(%rax,%r14,8), %ymm24, %ymm18 + +// CHECK: vpermi2d (%rcx){1to8}, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x30,0x76,0x11] + vpermi2d (%rcx){1to8}, %ymm24, %ymm18 + +// CHECK: vpermi2d 4064(%rdx), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x20,0x76,0x52,0x7f] + vpermi2d 4064(%rdx), %ymm24, %ymm18 + +// CHECK: vpermi2d 4096(%rdx), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x20,0x76,0x92,0x00,0x10,0x00,0x00] + vpermi2d 4096(%rdx), %ymm24, %ymm18 + +// CHECK: vpermi2d -4096(%rdx), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x20,0x76,0x52,0x80] + vpermi2d -4096(%rdx), %ymm24, %ymm18 + +// CHECK: vpermi2d -4128(%rdx), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x20,0x76,0x92,0xe0,0xef,0xff,0xff] + vpermi2d -4128(%rdx), %ymm24, %ymm18 + +// CHECK: vpermi2d 508(%rdx){1to8}, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x30,0x76,0x52,0x7f] + vpermi2d 508(%rdx){1to8}, %ymm24, %ymm18 + +// CHECK: vpermi2d 512(%rdx){1to8}, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x30,0x76,0x92,0x00,0x02,0x00,0x00] + vpermi2d 512(%rdx){1to8}, %ymm24, %ymm18 + +// CHECK: vpermi2d -512(%rdx){1to8}, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x30,0x76,0x52,0x80] + vpermi2d -512(%rdx){1to8}, %ymm24, %ymm18 + +// CHECK: vpermi2d -516(%rdx){1to8}, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x30,0x76,0x92,0xfc,0xfd,0xff,0xff] + vpermi2d -516(%rdx){1to8}, %ymm24, %ymm18 + +// CHECK: vpermi2q %xmm17, %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xa2,0x9d,0x00,0x76,0xd1] + vpermi2q %xmm17, %xmm28, %xmm18 + +// CHECK: vpermi2q %xmm17, %xmm28, %xmm18 {%k3} +// CHECK: encoding: [0x62,0xa2,0x9d,0x03,0x76,0xd1] + vpermi2q %xmm17, %xmm28, %xmm18 {%k3} + +// CHECK: vpermi2q %xmm17, %xmm28, %xmm18 {%k3} {z} +// CHECK: encoding: [0x62,0xa2,0x9d,0x83,0x76,0xd1] + vpermi2q %xmm17, %xmm28, %xmm18 {%k3} {z} + +// CHECK: vpermi2q (%rcx), %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x00,0x76,0x11] + vpermi2q (%rcx), %xmm28, %xmm18 + +// CHECK: vpermi2q 291(%rax,%r14,8), %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xa2,0x9d,0x00,0x76,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermi2q 291(%rax,%r14,8), %xmm28, %xmm18 + +// CHECK: vpermi2q (%rcx){1to2}, %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x10,0x76,0x11] + vpermi2q (%rcx){1to2}, %xmm28, %xmm18 + +// CHECK: vpermi2q 2032(%rdx), %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x00,0x76,0x52,0x7f] + vpermi2q 2032(%rdx), %xmm28, %xmm18 + +// CHECK: vpermi2q 2048(%rdx), %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x00,0x76,0x92,0x00,0x08,0x00,0x00] + vpermi2q 2048(%rdx), %xmm28, %xmm18 + +// CHECK: vpermi2q -2048(%rdx), %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x00,0x76,0x52,0x80] + vpermi2q -2048(%rdx), %xmm28, %xmm18 + +// CHECK: vpermi2q -2064(%rdx), %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x00,0x76,0x92,0xf0,0xf7,0xff,0xff] + vpermi2q -2064(%rdx), %xmm28, %xmm18 + +// CHECK: vpermi2q 1016(%rdx){1to2}, %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x10,0x76,0x52,0x7f] + vpermi2q 1016(%rdx){1to2}, %xmm28, %xmm18 + +// CHECK: vpermi2q 1024(%rdx){1to2}, %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x10,0x76,0x92,0x00,0x04,0x00,0x00] + vpermi2q 1024(%rdx){1to2}, %xmm28, %xmm18 + +// CHECK: vpermi2q -1024(%rdx){1to2}, %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x10,0x76,0x52,0x80] + vpermi2q -1024(%rdx){1to2}, %xmm28, %xmm18 + +// CHECK: vpermi2q -1032(%rdx){1to2}, %xmm28, %xmm18 +// CHECK: encoding: [0x62,0xe2,0x9d,0x10,0x76,0x92,0xf8,0xfb,0xff,0xff] + vpermi2q -1032(%rdx){1to2}, %xmm28, %xmm18 + +// CHECK: vpermi2q %ymm23, %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x22,0xcd,0x20,0x76,0xd7] + vpermi2q %ymm23, %ymm22, %ymm26 + +// CHECK: vpermi2q %ymm23, %ymm22, %ymm26 {%k2} +// CHECK: encoding: [0x62,0x22,0xcd,0x22,0x76,0xd7] + vpermi2q %ymm23, %ymm22, %ymm26 {%k2} + +// CHECK: vpermi2q %ymm23, %ymm22, %ymm26 {%k2} {z} +// CHECK: encoding: [0x62,0x22,0xcd,0xa2,0x76,0xd7] + vpermi2q %ymm23, %ymm22, %ymm26 {%k2} {z} + +// CHECK: vpermi2q (%rcx), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x62,0xcd,0x20,0x76,0x11] + vpermi2q (%rcx), %ymm22, %ymm26 + +// CHECK: vpermi2q 291(%rax,%r14,8), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x22,0xcd,0x20,0x76,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermi2q 291(%rax,%r14,8), %ymm22, %ymm26 + +// CHECK: vpermi2q (%rcx){1to4}, %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x62,0xcd,0x30,0x76,0x11] + vpermi2q (%rcx){1to4}, %ymm22, %ymm26 + +// CHECK: vpermi2q 4064(%rdx), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x62,0xcd,0x20,0x76,0x52,0x7f] + vpermi2q 4064(%rdx), %ymm22, %ymm26 + +// CHECK: vpermi2q 4096(%rdx), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x62,0xcd,0x20,0x76,0x92,0x00,0x10,0x00,0x00] + vpermi2q 4096(%rdx), %ymm22, %ymm26 + +// CHECK: vpermi2q -4096(%rdx), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x62,0xcd,0x20,0x76,0x52,0x80] + vpermi2q -4096(%rdx), %ymm22, %ymm26 + +// CHECK: vpermi2q -4128(%rdx), %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x62,0xcd,0x20,0x76,0x92,0xe0,0xef,0xff,0xff] + vpermi2q -4128(%rdx), %ymm22, %ymm26 + +// CHECK: vpermi2q 1016(%rdx){1to4}, %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x62,0xcd,0x30,0x76,0x52,0x7f] + vpermi2q 1016(%rdx){1to4}, %ymm22, %ymm26 + +// CHECK: vpermi2q 1024(%rdx){1to4}, %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x62,0xcd,0x30,0x76,0x92,0x00,0x04,0x00,0x00] + vpermi2q 1024(%rdx){1to4}, %ymm22, %ymm26 + +// CHECK: vpermi2q -1024(%rdx){1to4}, %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x62,0xcd,0x30,0x76,0x52,0x80] + vpermi2q -1024(%rdx){1to4}, %ymm22, %ymm26 + +// CHECK: vpermi2q -1032(%rdx){1to4}, %ymm22, %ymm26 +// CHECK: encoding: [0x62,0x62,0xcd,0x30,0x76,0x92,0xf8,0xfb,0xff,0xff] + vpermi2q -1032(%rdx){1to4}, %ymm22, %ymm26 + +// CHECK: vpermi2ps %xmm23, %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xa2,0x3d,0x00,0x77,0xff] + vpermi2ps %xmm23, %xmm24, %xmm23 + +// CHECK: vpermi2ps %xmm23, %xmm24, %xmm23 {%k3} +// CHECK: encoding: [0x62,0xa2,0x3d,0x03,0x77,0xff] + vpermi2ps %xmm23, %xmm24, %xmm23 {%k3} + +// CHECK: vpermi2ps %xmm23, %xmm24, %xmm23 {%k3} {z} +// CHECK: encoding: [0x62,0xa2,0x3d,0x83,0x77,0xff] + vpermi2ps %xmm23, %xmm24, %xmm23 {%k3} {z} + +// CHECK: vpermi2ps (%rcx), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x00,0x77,0x39] + vpermi2ps (%rcx), %xmm24, %xmm23 + +// CHECK: vpermi2ps 291(%rax,%r14,8), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xa2,0x3d,0x00,0x77,0xbc,0xf0,0x23,0x01,0x00,0x00] + vpermi2ps 291(%rax,%r14,8), %xmm24, %xmm23 + +// CHECK: vpermi2ps (%rcx){1to4}, %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x10,0x77,0x39] + vpermi2ps (%rcx){1to4}, %xmm24, %xmm23 + +// CHECK: vpermi2ps 2032(%rdx), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x00,0x77,0x7a,0x7f] + vpermi2ps 2032(%rdx), %xmm24, %xmm23 + +// CHECK: vpermi2ps 2048(%rdx), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x00,0x77,0xba,0x00,0x08,0x00,0x00] + vpermi2ps 2048(%rdx), %xmm24, %xmm23 + +// CHECK: vpermi2ps -2048(%rdx), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x00,0x77,0x7a,0x80] + vpermi2ps -2048(%rdx), %xmm24, %xmm23 + +// CHECK: vpermi2ps -2064(%rdx), %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x00,0x77,0xba,0xf0,0xf7,0xff,0xff] + vpermi2ps -2064(%rdx), %xmm24, %xmm23 + +// CHECK: vpermi2ps 508(%rdx){1to4}, %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x10,0x77,0x7a,0x7f] + vpermi2ps 508(%rdx){1to4}, %xmm24, %xmm23 + +// CHECK: vpermi2ps 512(%rdx){1to4}, %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x10,0x77,0xba,0x00,0x02,0x00,0x00] + vpermi2ps 512(%rdx){1to4}, %xmm24, %xmm23 + +// CHECK: vpermi2ps -512(%rdx){1to4}, %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x10,0x77,0x7a,0x80] + vpermi2ps -512(%rdx){1to4}, %xmm24, %xmm23 + +// CHECK: vpermi2ps -516(%rdx){1to4}, %xmm24, %xmm23 +// CHECK: encoding: [0x62,0xe2,0x3d,0x10,0x77,0xba,0xfc,0xfd,0xff,0xff] + vpermi2ps -516(%rdx){1to4}, %xmm24, %xmm23 + +// CHECK: vpermi2ps %ymm20, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xa2,0x3d,0x20,0x77,0xd4] + vpermi2ps %ymm20, %ymm24, %ymm18 + +// CHECK: vpermi2ps %ymm20, %ymm24, %ymm18 {%k5} +// CHECK: encoding: [0x62,0xa2,0x3d,0x25,0x77,0xd4] + vpermi2ps %ymm20, %ymm24, %ymm18 {%k5} + +// CHECK: vpermi2ps %ymm20, %ymm24, %ymm18 {%k5} {z} +// CHECK: encoding: [0x62,0xa2,0x3d,0xa5,0x77,0xd4] + vpermi2ps %ymm20, %ymm24, %ymm18 {%k5} {z} + +// CHECK: vpermi2ps (%rcx), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x20,0x77,0x11] + vpermi2ps (%rcx), %ymm24, %ymm18 + +// CHECK: vpermi2ps 291(%rax,%r14,8), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xa2,0x3d,0x20,0x77,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermi2ps 291(%rax,%r14,8), %ymm24, %ymm18 + +// CHECK: vpermi2ps (%rcx){1to8}, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x30,0x77,0x11] + vpermi2ps (%rcx){1to8}, %ymm24, %ymm18 + +// CHECK: vpermi2ps 4064(%rdx), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x20,0x77,0x52,0x7f] + vpermi2ps 4064(%rdx), %ymm24, %ymm18 + +// CHECK: vpermi2ps 4096(%rdx), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x20,0x77,0x92,0x00,0x10,0x00,0x00] + vpermi2ps 4096(%rdx), %ymm24, %ymm18 + +// CHECK: vpermi2ps -4096(%rdx), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x20,0x77,0x52,0x80] + vpermi2ps -4096(%rdx), %ymm24, %ymm18 + +// CHECK: vpermi2ps -4128(%rdx), %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x20,0x77,0x92,0xe0,0xef,0xff,0xff] + vpermi2ps -4128(%rdx), %ymm24, %ymm18 + +// CHECK: vpermi2ps 508(%rdx){1to8}, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x30,0x77,0x52,0x7f] + vpermi2ps 508(%rdx){1to8}, %ymm24, %ymm18 + +// CHECK: vpermi2ps 512(%rdx){1to8}, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x30,0x77,0x92,0x00,0x02,0x00,0x00] + vpermi2ps 512(%rdx){1to8}, %ymm24, %ymm18 + +// CHECK: vpermi2ps -512(%rdx){1to8}, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x30,0x77,0x52,0x80] + vpermi2ps -512(%rdx){1to8}, %ymm24, %ymm18 + +// CHECK: vpermi2ps -516(%rdx){1to8}, %ymm24, %ymm18 +// CHECK: encoding: [0x62,0xe2,0x3d,0x30,0x77,0x92,0xfc,0xfd,0xff,0xff] + vpermi2ps -516(%rdx){1to8}, %ymm24, %ymm18 + +// CHECK: vpermi2pd %xmm27, %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x02,0xf5,0x00,0x77,0xe3] + vpermi2pd %xmm27, %xmm17, %xmm28 + +// CHECK: vpermi2pd %xmm27, %xmm17, %xmm28 {%k4} +// CHECK: encoding: [0x62,0x02,0xf5,0x04,0x77,0xe3] + vpermi2pd %xmm27, %xmm17, %xmm28 {%k4} + +// CHECK: vpermi2pd %xmm27, %xmm17, %xmm28 {%k4} {z} +// CHECK: encoding: [0x62,0x02,0xf5,0x84,0x77,0xe3] + vpermi2pd %xmm27, %xmm17, %xmm28 {%k4} {z} + +// CHECK: vpermi2pd (%rcx), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x77,0x21] + vpermi2pd (%rcx), %xmm17, %xmm28 + +// CHECK: vpermi2pd 291(%rax,%r14,8), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x22,0xf5,0x00,0x77,0xa4,0xf0,0x23,0x01,0x00,0x00] + vpermi2pd 291(%rax,%r14,8), %xmm17, %xmm28 + +// CHECK: vpermi2pd (%rcx){1to2}, %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x77,0x21] + vpermi2pd (%rcx){1to2}, %xmm17, %xmm28 + +// CHECK: vpermi2pd 2032(%rdx), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x77,0x62,0x7f] + vpermi2pd 2032(%rdx), %xmm17, %xmm28 + +// CHECK: vpermi2pd 2048(%rdx), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x77,0xa2,0x00,0x08,0x00,0x00] + vpermi2pd 2048(%rdx), %xmm17, %xmm28 + +// CHECK: vpermi2pd -2048(%rdx), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x77,0x62,0x80] + vpermi2pd -2048(%rdx), %xmm17, %xmm28 + +// CHECK: vpermi2pd -2064(%rdx), %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0xf5,0x00,0x77,0xa2,0xf0,0xf7,0xff,0xff] + vpermi2pd -2064(%rdx), %xmm17, %xmm28 + +// CHECK: vpermi2pd 1016(%rdx){1to2}, %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x77,0x62,0x7f] + vpermi2pd 1016(%rdx){1to2}, %xmm17, %xmm28 + +// CHECK: vpermi2pd 1024(%rdx){1to2}, %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x77,0xa2,0x00,0x04,0x00,0x00] + vpermi2pd 1024(%rdx){1to2}, %xmm17, %xmm28 + +// CHECK: vpermi2pd -1024(%rdx){1to2}, %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x77,0x62,0x80] + vpermi2pd -1024(%rdx){1to2}, %xmm17, %xmm28 + +// CHECK: vpermi2pd -1032(%rdx){1to2}, %xmm17, %xmm28 +// CHECK: encoding: [0x62,0x62,0xf5,0x10,0x77,0xa2,0xf8,0xfb,0xff,0xff] + vpermi2pd -1032(%rdx){1to2}, %xmm17, %xmm28 + +// CHECK: vpermi2pd %ymm27, %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x02,0xe5,0x20,0x77,0xf3] + vpermi2pd %ymm27, %ymm19, %ymm30 + +// CHECK: vpermi2pd %ymm27, %ymm19, %ymm30 {%k3} +// CHECK: encoding: [0x62,0x02,0xe5,0x23,0x77,0xf3] + vpermi2pd %ymm27, %ymm19, %ymm30 {%k3} + +// CHECK: vpermi2pd %ymm27, %ymm19, %ymm30 {%k3} {z} +// CHECK: encoding: [0x62,0x02,0xe5,0xa3,0x77,0xf3] + vpermi2pd %ymm27, %ymm19, %ymm30 {%k3} {z} + +// CHECK: vpermi2pd (%rcx), %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x62,0xe5,0x20,0x77,0x31] + vpermi2pd (%rcx), %ymm19, %ymm30 + +// CHECK: vpermi2pd 291(%rax,%r14,8), %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x22,0xe5,0x20,0x77,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpermi2pd 291(%rax,%r14,8), %ymm19, %ymm30 + +// CHECK: vpermi2pd (%rcx){1to4}, %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x62,0xe5,0x30,0x77,0x31] + vpermi2pd (%rcx){1to4}, %ymm19, %ymm30 + +// CHECK: vpermi2pd 4064(%rdx), %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x62,0xe5,0x20,0x77,0x72,0x7f] + vpermi2pd 4064(%rdx), %ymm19, %ymm30 + +// CHECK: vpermi2pd 4096(%rdx), %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x62,0xe5,0x20,0x77,0xb2,0x00,0x10,0x00,0x00] + vpermi2pd 4096(%rdx), %ymm19, %ymm30 + +// CHECK: vpermi2pd -4096(%rdx), %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x62,0xe5,0x20,0x77,0x72,0x80] + vpermi2pd -4096(%rdx), %ymm19, %ymm30 + +// CHECK: vpermi2pd -4128(%rdx), %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x62,0xe5,0x20,0x77,0xb2,0xe0,0xef,0xff,0xff] + vpermi2pd -4128(%rdx), %ymm19, %ymm30 + +// CHECK: vpermi2pd 1016(%rdx){1to4}, %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x62,0xe5,0x30,0x77,0x72,0x7f] + vpermi2pd 1016(%rdx){1to4}, %ymm19, %ymm30 + +// CHECK: vpermi2pd 1024(%rdx){1to4}, %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x62,0xe5,0x30,0x77,0xb2,0x00,0x04,0x00,0x00] + vpermi2pd 1024(%rdx){1to4}, %ymm19, %ymm30 + +// CHECK: vpermi2pd -1024(%rdx){1to4}, %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x62,0xe5,0x30,0x77,0x72,0x80] + vpermi2pd -1024(%rdx){1to4}, %ymm19, %ymm30 + +// CHECK: vpermi2pd -1032(%rdx){1to4}, %ymm19, %ymm30 +// CHECK: encoding: [0x62,0x62,0xe5,0x30,0x77,0xb2,0xf8,0xfb,0xff,0xff] + vpermi2pd -1032(%rdx){1to4}, %ymm19, %ymm30 + +// CHECK: vpermt2d %xmm23, %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xa2,0x15,0x00,0x7e,0xef] + vpermt2d %xmm23, %xmm29, %xmm21 + +// CHECK: vpermt2d %xmm23, %xmm29, %xmm21 {%k4} +// CHECK: encoding: [0x62,0xa2,0x15,0x04,0x7e,0xef] + vpermt2d %xmm23, %xmm29, %xmm21 {%k4} + +// CHECK: vpermt2d %xmm23, %xmm29, %xmm21 {%k4} {z} +// CHECK: encoding: [0x62,0xa2,0x15,0x84,0x7e,0xef] + vpermt2d %xmm23, %xmm29, %xmm21 {%k4} {z} + +// CHECK: vpermt2d (%rcx), %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x15,0x00,0x7e,0x29] + vpermt2d (%rcx), %xmm29, %xmm21 + +// CHECK: vpermt2d 291(%rax,%r14,8), %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xa2,0x15,0x00,0x7e,0xac,0xf0,0x23,0x01,0x00,0x00] + vpermt2d 291(%rax,%r14,8), %xmm29, %xmm21 + +// CHECK: vpermt2d (%rcx){1to4}, %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x15,0x10,0x7e,0x29] + vpermt2d (%rcx){1to4}, %xmm29, %xmm21 + +// CHECK: vpermt2d 2032(%rdx), %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x15,0x00,0x7e,0x6a,0x7f] + vpermt2d 2032(%rdx), %xmm29, %xmm21 + +// CHECK: vpermt2d 2048(%rdx), %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x15,0x00,0x7e,0xaa,0x00,0x08,0x00,0x00] + vpermt2d 2048(%rdx), %xmm29, %xmm21 + +// CHECK: vpermt2d -2048(%rdx), %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x15,0x00,0x7e,0x6a,0x80] + vpermt2d -2048(%rdx), %xmm29, %xmm21 + +// CHECK: vpermt2d -2064(%rdx), %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x15,0x00,0x7e,0xaa,0xf0,0xf7,0xff,0xff] + vpermt2d -2064(%rdx), %xmm29, %xmm21 + +// CHECK: vpermt2d 508(%rdx){1to4}, %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x15,0x10,0x7e,0x6a,0x7f] + vpermt2d 508(%rdx){1to4}, %xmm29, %xmm21 + +// CHECK: vpermt2d 512(%rdx){1to4}, %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x15,0x10,0x7e,0xaa,0x00,0x02,0x00,0x00] + vpermt2d 512(%rdx){1to4}, %xmm29, %xmm21 + +// CHECK: vpermt2d -512(%rdx){1to4}, %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x15,0x10,0x7e,0x6a,0x80] + vpermt2d -512(%rdx){1to4}, %xmm29, %xmm21 + +// CHECK: vpermt2d -516(%rdx){1to4}, %xmm29, %xmm21 +// CHECK: encoding: [0x62,0xe2,0x15,0x10,0x7e,0xaa,0xfc,0xfd,0xff,0xff] + vpermt2d -516(%rdx){1to4}, %xmm29, %xmm21 + +// CHECK: vpermt2d %ymm21, %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xa2,0x2d,0x20,0x7e,0xf5] + vpermt2d %ymm21, %ymm26, %ymm22 + +// CHECK: vpermt2d %ymm21, %ymm26, %ymm22 {%k2} +// CHECK: encoding: [0x62,0xa2,0x2d,0x22,0x7e,0xf5] + vpermt2d %ymm21, %ymm26, %ymm22 {%k2} + +// CHECK: vpermt2d %ymm21, %ymm26, %ymm22 {%k2} {z} +// CHECK: encoding: [0x62,0xa2,0x2d,0xa2,0x7e,0xf5] + vpermt2d %ymm21, %ymm26, %ymm22 {%k2} {z} + +// CHECK: vpermt2d (%rcx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x7e,0x31] + vpermt2d (%rcx), %ymm26, %ymm22 + +// CHECK: vpermt2d 291(%rax,%r14,8), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xa2,0x2d,0x20,0x7e,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpermt2d 291(%rax,%r14,8), %ymm26, %ymm22 + +// CHECK: vpermt2d (%rcx){1to8}, %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x7e,0x31] + vpermt2d (%rcx){1to8}, %ymm26, %ymm22 + +// CHECK: vpermt2d 4064(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x7e,0x72,0x7f] + vpermt2d 4064(%rdx), %ymm26, %ymm22 + +// CHECK: vpermt2d 4096(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x7e,0xb2,0x00,0x10,0x00,0x00] + vpermt2d 4096(%rdx), %ymm26, %ymm22 + +// CHECK: vpermt2d -4096(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x7e,0x72,0x80] + vpermt2d -4096(%rdx), %ymm26, %ymm22 + +// CHECK: vpermt2d -4128(%rdx), %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x2d,0x20,0x7e,0xb2,0xe0,0xef,0xff,0xff] + vpermt2d -4128(%rdx), %ymm26, %ymm22 + +// CHECK: vpermt2d 508(%rdx){1to8}, %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x7e,0x72,0x7f] + vpermt2d 508(%rdx){1to8}, %ymm26, %ymm22 + +// CHECK: vpermt2d 512(%rdx){1to8}, %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x7e,0xb2,0x00,0x02,0x00,0x00] + vpermt2d 512(%rdx){1to8}, %ymm26, %ymm22 + +// CHECK: vpermt2d -512(%rdx){1to8}, %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x7e,0x72,0x80] + vpermt2d -512(%rdx){1to8}, %ymm26, %ymm22 + +// CHECK: vpermt2d -516(%rdx){1to8}, %ymm26, %ymm22 +// CHECK: encoding: [0x62,0xe2,0x2d,0x30,0x7e,0xb2,0xfc,0xfd,0xff,0xff] + vpermt2d -516(%rdx){1to8}, %ymm26, %ymm22 + +// CHECK: vpermt2q %xmm18, %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xa2,0xb5,0x00,0x7e,0xf2] + vpermt2q %xmm18, %xmm25, %xmm22 + +// CHECK: vpermt2q %xmm18, %xmm25, %xmm22 {%k1} +// CHECK: encoding: [0x62,0xa2,0xb5,0x01,0x7e,0xf2] + vpermt2q %xmm18, %xmm25, %xmm22 {%k1} + +// CHECK: vpermt2q %xmm18, %xmm25, %xmm22 {%k1} {z} +// CHECK: encoding: [0x62,0xa2,0xb5,0x81,0x7e,0xf2] + vpermt2q %xmm18, %xmm25, %xmm22 {%k1} {z} + +// CHECK: vpermt2q (%rcx), %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xe2,0xb5,0x00,0x7e,0x31] + vpermt2q (%rcx), %xmm25, %xmm22 + +// CHECK: vpermt2q 291(%rax,%r14,8), %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xa2,0xb5,0x00,0x7e,0xb4,0xf0,0x23,0x01,0x00,0x00] + vpermt2q 291(%rax,%r14,8), %xmm25, %xmm22 + +// CHECK: vpermt2q (%rcx){1to2}, %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xe2,0xb5,0x10,0x7e,0x31] + vpermt2q (%rcx){1to2}, %xmm25, %xmm22 + +// CHECK: vpermt2q 2032(%rdx), %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xe2,0xb5,0x00,0x7e,0x72,0x7f] + vpermt2q 2032(%rdx), %xmm25, %xmm22 + +// CHECK: vpermt2q 2048(%rdx), %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xe2,0xb5,0x00,0x7e,0xb2,0x00,0x08,0x00,0x00] + vpermt2q 2048(%rdx), %xmm25, %xmm22 + +// CHECK: vpermt2q -2048(%rdx), %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xe2,0xb5,0x00,0x7e,0x72,0x80] + vpermt2q -2048(%rdx), %xmm25, %xmm22 + +// CHECK: vpermt2q -2064(%rdx), %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xe2,0xb5,0x00,0x7e,0xb2,0xf0,0xf7,0xff,0xff] + vpermt2q -2064(%rdx), %xmm25, %xmm22 + +// CHECK: vpermt2q 1016(%rdx){1to2}, %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xe2,0xb5,0x10,0x7e,0x72,0x7f] + vpermt2q 1016(%rdx){1to2}, %xmm25, %xmm22 + +// CHECK: vpermt2q 1024(%rdx){1to2}, %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xe2,0xb5,0x10,0x7e,0xb2,0x00,0x04,0x00,0x00] + vpermt2q 1024(%rdx){1to2}, %xmm25, %xmm22 + +// CHECK: vpermt2q -1024(%rdx){1to2}, %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xe2,0xb5,0x10,0x7e,0x72,0x80] + vpermt2q -1024(%rdx){1to2}, %xmm25, %xmm22 + +// CHECK: vpermt2q -1032(%rdx){1to2}, %xmm25, %xmm22 +// CHECK: encoding: [0x62,0xe2,0xb5,0x10,0x7e,0xb2,0xf8,0xfb,0xff,0xff] + vpermt2q -1032(%rdx){1to2}, %xmm25, %xmm22 + +// CHECK: vpermt2q %ymm20, %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xa2,0xf5,0x20,0x7e,0xd4] + vpermt2q %ymm20, %ymm17, %ymm18 + +// CHECK: vpermt2q %ymm20, %ymm17, %ymm18 {%k6} +// CHECK: encoding: [0x62,0xa2,0xf5,0x26,0x7e,0xd4] + vpermt2q %ymm20, %ymm17, %ymm18 {%k6} + +// CHECK: vpermt2q %ymm20, %ymm17, %ymm18 {%k6} {z} +// CHECK: encoding: [0x62,0xa2,0xf5,0xa6,0x7e,0xd4] + vpermt2q %ymm20, %ymm17, %ymm18 {%k6} {z} + +// CHECK: vpermt2q (%rcx), %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xf5,0x20,0x7e,0x11] + vpermt2q (%rcx), %ymm17, %ymm18 + +// CHECK: vpermt2q 291(%rax,%r14,8), %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xa2,0xf5,0x20,0x7e,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermt2q 291(%rax,%r14,8), %ymm17, %ymm18 + +// CHECK: vpermt2q (%rcx){1to4}, %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xf5,0x30,0x7e,0x11] + vpermt2q (%rcx){1to4}, %ymm17, %ymm18 + +// CHECK: vpermt2q 4064(%rdx), %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xf5,0x20,0x7e,0x52,0x7f] + vpermt2q 4064(%rdx), %ymm17, %ymm18 + +// CHECK: vpermt2q 4096(%rdx), %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xf5,0x20,0x7e,0x92,0x00,0x10,0x00,0x00] + vpermt2q 4096(%rdx), %ymm17, %ymm18 + +// CHECK: vpermt2q -4096(%rdx), %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xf5,0x20,0x7e,0x52,0x80] + vpermt2q -4096(%rdx), %ymm17, %ymm18 + +// CHECK: vpermt2q -4128(%rdx), %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xf5,0x20,0x7e,0x92,0xe0,0xef,0xff,0xff] + vpermt2q -4128(%rdx), %ymm17, %ymm18 + +// CHECK: vpermt2q 1016(%rdx){1to4}, %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xf5,0x30,0x7e,0x52,0x7f] + vpermt2q 1016(%rdx){1to4}, %ymm17, %ymm18 + +// CHECK: vpermt2q 1024(%rdx){1to4}, %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xf5,0x30,0x7e,0x92,0x00,0x04,0x00,0x00] + vpermt2q 1024(%rdx){1to4}, %ymm17, %ymm18 + +// CHECK: vpermt2q -1024(%rdx){1to4}, %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xf5,0x30,0x7e,0x52,0x80] + vpermt2q -1024(%rdx){1to4}, %ymm17, %ymm18 + +// CHECK: vpermt2q -1032(%rdx){1to4}, %ymm17, %ymm18 +// CHECK: encoding: [0x62,0xe2,0xf5,0x30,0x7e,0x92,0xf8,0xfb,0xff,0xff] + vpermt2q -1032(%rdx){1to4}, %ymm17, %ymm18 + +// CHECK: vpermt2ps %xmm18, %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xa2,0x45,0x00,0x7f,0xda] + vpermt2ps %xmm18, %xmm23, %xmm19 + +// CHECK: vpermt2ps %xmm18, %xmm23, %xmm19 {%k1} +// CHECK: encoding: [0x62,0xa2,0x45,0x01,0x7f,0xda] + vpermt2ps %xmm18, %xmm23, %xmm19 {%k1} + +// CHECK: vpermt2ps %xmm18, %xmm23, %xmm19 {%k1} {z} +// CHECK: encoding: [0x62,0xa2,0x45,0x81,0x7f,0xda] + vpermt2ps %xmm18, %xmm23, %xmm19 {%k1} {z} + +// CHECK: vpermt2ps (%rcx), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x7f,0x19] + vpermt2ps (%rcx), %xmm23, %xmm19 + +// CHECK: vpermt2ps 291(%rax,%r14,8), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xa2,0x45,0x00,0x7f,0x9c,0xf0,0x23,0x01,0x00,0x00] + vpermt2ps 291(%rax,%r14,8), %xmm23, %xmm19 + +// CHECK: vpermt2ps (%rcx){1to4}, %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x7f,0x19] + vpermt2ps (%rcx){1to4}, %xmm23, %xmm19 + +// CHECK: vpermt2ps 2032(%rdx), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x7f,0x5a,0x7f] + vpermt2ps 2032(%rdx), %xmm23, %xmm19 + +// CHECK: vpermt2ps 2048(%rdx), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x7f,0x9a,0x00,0x08,0x00,0x00] + vpermt2ps 2048(%rdx), %xmm23, %xmm19 + +// CHECK: vpermt2ps -2048(%rdx), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x7f,0x5a,0x80] + vpermt2ps -2048(%rdx), %xmm23, %xmm19 + +// CHECK: vpermt2ps -2064(%rdx), %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x7f,0x9a,0xf0,0xf7,0xff,0xff] + vpermt2ps -2064(%rdx), %xmm23, %xmm19 + +// CHECK: vpermt2ps 508(%rdx){1to4}, %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x7f,0x5a,0x7f] + vpermt2ps 508(%rdx){1to4}, %xmm23, %xmm19 + +// CHECK: vpermt2ps 512(%rdx){1to4}, %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x7f,0x9a,0x00,0x02,0x00,0x00] + vpermt2ps 512(%rdx){1to4}, %xmm23, %xmm19 + +// CHECK: vpermt2ps -512(%rdx){1to4}, %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x7f,0x5a,0x80] + vpermt2ps -512(%rdx){1to4}, %xmm23, %xmm19 + +// CHECK: vpermt2ps -516(%rdx){1to4}, %xmm23, %xmm19 +// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x7f,0x9a,0xfc,0xfd,0xff,0xff] + vpermt2ps -516(%rdx){1to4}, %xmm23, %xmm19 + +// CHECK: vpermt2ps %ymm21, %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x22,0x25,0x20,0x7f,0xd5] + vpermt2ps %ymm21, %ymm27, %ymm26 + +// CHECK: vpermt2ps %ymm21, %ymm27, %ymm26 {%k3} +// CHECK: encoding: [0x62,0x22,0x25,0x23,0x7f,0xd5] + vpermt2ps %ymm21, %ymm27, %ymm26 {%k3} + +// CHECK: vpermt2ps %ymm21, %ymm27, %ymm26 {%k3} {z} +// CHECK: encoding: [0x62,0x22,0x25,0xa3,0x7f,0xd5] + vpermt2ps %ymm21, %ymm27, %ymm26 {%k3} {z} + +// CHECK: vpermt2ps (%rcx), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x62,0x25,0x20,0x7f,0x11] + vpermt2ps (%rcx), %ymm27, %ymm26 + +// CHECK: vpermt2ps 291(%rax,%r14,8), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x22,0x25,0x20,0x7f,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermt2ps 291(%rax,%r14,8), %ymm27, %ymm26 + +// CHECK: vpermt2ps (%rcx){1to8}, %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x62,0x25,0x30,0x7f,0x11] + vpermt2ps (%rcx){1to8}, %ymm27, %ymm26 + +// CHECK: vpermt2ps 4064(%rdx), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x62,0x25,0x20,0x7f,0x52,0x7f] + vpermt2ps 4064(%rdx), %ymm27, %ymm26 + +// CHECK: vpermt2ps 4096(%rdx), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x62,0x25,0x20,0x7f,0x92,0x00,0x10,0x00,0x00] + vpermt2ps 4096(%rdx), %ymm27, %ymm26 + +// CHECK: vpermt2ps -4096(%rdx), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x62,0x25,0x20,0x7f,0x52,0x80] + vpermt2ps -4096(%rdx), %ymm27, %ymm26 + +// CHECK: vpermt2ps -4128(%rdx), %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x62,0x25,0x20,0x7f,0x92,0xe0,0xef,0xff,0xff] + vpermt2ps -4128(%rdx), %ymm27, %ymm26 + +// CHECK: vpermt2ps 508(%rdx){1to8}, %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x62,0x25,0x30,0x7f,0x52,0x7f] + vpermt2ps 508(%rdx){1to8}, %ymm27, %ymm26 + +// CHECK: vpermt2ps 512(%rdx){1to8}, %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x62,0x25,0x30,0x7f,0x92,0x00,0x02,0x00,0x00] + vpermt2ps 512(%rdx){1to8}, %ymm27, %ymm26 + +// CHECK: vpermt2ps -512(%rdx){1to8}, %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x62,0x25,0x30,0x7f,0x52,0x80] + vpermt2ps -512(%rdx){1to8}, %ymm27, %ymm26 + +// CHECK: vpermt2ps -516(%rdx){1to8}, %ymm27, %ymm26 +// CHECK: encoding: [0x62,0x62,0x25,0x30,0x7f,0x92,0xfc,0xfd,0xff,0xff] + vpermt2ps -516(%rdx){1to8}, %ymm27, %ymm26 + +// CHECK: vpermt2pd %xmm17, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x22,0xd5,0x00,0x7f,0xd1] + vpermt2pd %xmm17, %xmm21, %xmm26 + +// CHECK: vpermt2pd %xmm17, %xmm21, %xmm26 {%k5} +// CHECK: encoding: [0x62,0x22,0xd5,0x05,0x7f,0xd1] + vpermt2pd %xmm17, %xmm21, %xmm26 {%k5} + +// CHECK: vpermt2pd %xmm17, %xmm21, %xmm26 {%k5} {z} +// CHECK: encoding: [0x62,0x22,0xd5,0x85,0x7f,0xd1] + vpermt2pd %xmm17, %xmm21, %xmm26 {%k5} {z} + +// CHECK: vpermt2pd (%rcx), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x00,0x7f,0x11] + vpermt2pd (%rcx), %xmm21, %xmm26 + +// CHECK: vpermt2pd 291(%rax,%r14,8), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x22,0xd5,0x00,0x7f,0x94,0xf0,0x23,0x01,0x00,0x00] + vpermt2pd 291(%rax,%r14,8), %xmm21, %xmm26 + +// CHECK: vpermt2pd (%rcx){1to2}, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x10,0x7f,0x11] + vpermt2pd (%rcx){1to2}, %xmm21, %xmm26 + +// CHECK: vpermt2pd 2032(%rdx), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x00,0x7f,0x52,0x7f] + vpermt2pd 2032(%rdx), %xmm21, %xmm26 + +// CHECK: vpermt2pd 2048(%rdx), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x00,0x7f,0x92,0x00,0x08,0x00,0x00] + vpermt2pd 2048(%rdx), %xmm21, %xmm26 + +// CHECK: vpermt2pd -2048(%rdx), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x00,0x7f,0x52,0x80] + vpermt2pd -2048(%rdx), %xmm21, %xmm26 + +// CHECK: vpermt2pd -2064(%rdx), %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x00,0x7f,0x92,0xf0,0xf7,0xff,0xff] + vpermt2pd -2064(%rdx), %xmm21, %xmm26 + +// CHECK: vpermt2pd 1016(%rdx){1to2}, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x10,0x7f,0x52,0x7f] + vpermt2pd 1016(%rdx){1to2}, %xmm21, %xmm26 + +// CHECK: vpermt2pd 1024(%rdx){1to2}, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x10,0x7f,0x92,0x00,0x04,0x00,0x00] + vpermt2pd 1024(%rdx){1to2}, %xmm21, %xmm26 + +// CHECK: vpermt2pd -1024(%rdx){1to2}, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x10,0x7f,0x52,0x80] + vpermt2pd -1024(%rdx){1to2}, %xmm21, %xmm26 + +// CHECK: vpermt2pd -1032(%rdx){1to2}, %xmm21, %xmm26 +// CHECK: encoding: [0x62,0x62,0xd5,0x10,0x7f,0x92,0xf8,0xfb,0xff,0xff] + vpermt2pd -1032(%rdx){1to2}, %xmm21, %xmm26 + +// CHECK: vpermt2pd %ymm17, %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xa2,0xc5,0x20,0x7f,0xc9] + vpermt2pd %ymm17, %ymm23, %ymm17 + +// CHECK: vpermt2pd %ymm17, %ymm23, %ymm17 {%k1} +// CHECK: encoding: [0x62,0xa2,0xc5,0x21,0x7f,0xc9] + vpermt2pd %ymm17, %ymm23, %ymm17 {%k1} + +// CHECK: vpermt2pd %ymm17, %ymm23, %ymm17 {%k1} {z} +// CHECK: encoding: [0x62,0xa2,0xc5,0xa1,0x7f,0xc9] + vpermt2pd %ymm17, %ymm23, %ymm17 {%k1} {z} + +// CHECK: vpermt2pd (%rcx), %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xc5,0x20,0x7f,0x09] + vpermt2pd (%rcx), %ymm23, %ymm17 + +// CHECK: vpermt2pd 291(%rax,%r14,8), %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xa2,0xc5,0x20,0x7f,0x8c,0xf0,0x23,0x01,0x00,0x00] + vpermt2pd 291(%rax,%r14,8), %ymm23, %ymm17 + +// CHECK: vpermt2pd (%rcx){1to4}, %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xc5,0x30,0x7f,0x09] + vpermt2pd (%rcx){1to4}, %ymm23, %ymm17 + +// CHECK: vpermt2pd 4064(%rdx), %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xc5,0x20,0x7f,0x4a,0x7f] + vpermt2pd 4064(%rdx), %ymm23, %ymm17 + +// CHECK: vpermt2pd 4096(%rdx), %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xc5,0x20,0x7f,0x8a,0x00,0x10,0x00,0x00] + vpermt2pd 4096(%rdx), %ymm23, %ymm17 + +// CHECK: vpermt2pd -4096(%rdx), %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xc5,0x20,0x7f,0x4a,0x80] + vpermt2pd -4096(%rdx), %ymm23, %ymm17 + +// CHECK: vpermt2pd -4128(%rdx), %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xc5,0x20,0x7f,0x8a,0xe0,0xef,0xff,0xff] + vpermt2pd -4128(%rdx), %ymm23, %ymm17 + +// CHECK: vpermt2pd 1016(%rdx){1to4}, %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xc5,0x30,0x7f,0x4a,0x7f] + vpermt2pd 1016(%rdx){1to4}, %ymm23, %ymm17 + +// CHECK: vpermt2pd 1024(%rdx){1to4}, %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xc5,0x30,0x7f,0x8a,0x00,0x04,0x00,0x00] + vpermt2pd 1024(%rdx){1to4}, %ymm23, %ymm17 + +// CHECK: vpermt2pd -1024(%rdx){1to4}, %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xc5,0x30,0x7f,0x4a,0x80] + vpermt2pd -1024(%rdx){1to4}, %ymm23, %ymm17 + +// CHECK: vpermt2pd -1032(%rdx){1to4}, %ymm23, %ymm17 +// CHECK: encoding: [0x62,0xe2,0xc5,0x30,0x7f,0x8a,0xf8,0xfb,0xff,0xff] + vpermt2pd -1032(%rdx){1to4}, %ymm23, %ymm17 |