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-#-
-# Copyright (C) 2009-2012 Semihalf
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-#
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-# SUCH DAMAGE.
-#
-# $FreeBSD$
-
-#
-# Sample NANDsim configuration file.
-#
-
-#############################################################################
-#
-# [sim] General (common) simulator configuration section.
-#
-[sim]
-# log_level=0..255
-log_level=11
-
-# log_output=[none, console, ram, file]
-#
-# When log_output=file is specified, each [ctrl] section must have a
-# corresponding 'log_filename' field provided, which specifies log file name
-# to be used.
-log_output=none
-
-#############################################################################
-#
-# [ctrl] Controller configuration section.
-#
-# There can be a number of controllers defined for simulation, each has a
-# dedicated [ctrl] section. With a given controller there are associated
-# subordinate NAND chips, which are tied to chip select lines.
-#
-[ctrl]
-# The number of this controller.
-# ctrl_num=0..3
-ctrl_num=0
-
-# The number of chip selects available at this controller.
-# num_cs=1..4
-num_cs=1
-
-# ECC enable flag.
-# ecc=[on|off]
-ecc=on
-
-# ECC layout. This is the list of byte offsets within OOB area, which comprise
-# the ECC contents set.
-#
-# ecc_layout=[byte1, byte2-byte3, ..byten]
-ecc_layout=[0-53]
-
-# Absolute path to the log file for this controller.
-#log_filename=/var/log/nandsim-ctl0.log
-
-
-#############################################################################
-#
-# [chip] Chip configuration section.
-#
-# There can be a number of individual NAND chip devices defined for
-# simulation, and each has a dedicated [chip] section.
-#
-# A particular chip needs to be associated with its parent NAND controller by
-# specifying the following fields: controller number (chip_ctrl) and the chip
-# select line it is connected to (chip_cs). The chip can be connected to only
-# a single (and unique) controller:cs pair.
-#
-[chip]
-# The number of parent controller. This has to fit one of the controller
-# instance number (ctrl_num from [ctrl] section).
-# chip_ctrl=0..3
-chip_ctrl=0
-
-# Chip select line.
-# chip_cs=0..3
-chip_cs=0
-
-# ONFI device identifier.
-# device_id=0x00..0xff
-device_id=0xd3
-
-# ONFI manufacturer identifier.
-# manufacturer_id=0x00..0xff
-manufacturer_id=0xec
-
-# Textual description of the chip.
-# model="model_name"
-model="k9xxg08uxM:1GiB 3,3V 8-bit"
-
-# Textual name of the chip manufacturer.
-# manufacturer="manufacturer name"
-manufacturer="SAMSUNG"
-
-# page_size=[must be power of 2 and >= 512] (in bytes)
-page_size=2048
-# oob_size=[>0]
-oob_size=64
-# pages_per_block=n*32
-pages_per_block=64
-# blocks_per_lun=[>0]
-blocks_per_lun=4096
-# luns=1..N
-luns=1
-# column_addr_cycle=[1,2]
-column_addr_cycle=2
-# row_addr_cycle=[1,2,3]
-row_addr_cycle=3
-
-# program_time= (in us)
-program_time=0
-# erase_time= (in us)
-erase_time=0
-# read_time= (in us)
-read_time=0
-# ccs_time= (in us)
-#ccs_time=200
-
-# Simulate write-protect on the chip.
-# write_protect=[yes|no]
-#write_protect=no
-
-# Blocks wear-out threshold. Each block has a counter of program-erase cycles;
-# when this counter reaches 'wear_out' value a given block is treated as a bad
-# block (access will report error).
-#
-# Setting wear_out to 0 means that blocks will never wear out.
-#
-# wear_out=0..100000
-wear_out=50000
-
-# Errors per million read/write bytes. This simulates an accidental read/write
-# block error, which can happen in real devices with certain probability. Note
-# this isn't a bad block condition i.e. the block at which the read/write
-# operation is simulated to fail here remains usable, only the operation has
-# not succeeded (this is where ECC comes into play and is supposed to correct
-# such problems).
-#
-# error_ratio=0..1000000
-#error_ratio=50
-
-# Chip data bus width. All chips connected to the same controller must have
-# the same bus width.
-#
-# width=[8|16]
-width=8
-
-# Bad block map. NANDsim emulates bad block behavior upon accessing a block
-# with number from the specified list.
-#
-# bad_block_map=[bad_block1, bad_block2-bad_block3, ..bad_blockn]
-bad_block_map=[100-200]
-