| Commit message (Collapse) | Author | Age | Files | Lines |
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This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-13.0.0-rc3-8-g08642a395f23.
PR: 258209
MFC after: 2 weeks
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This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-13.0.0-rc2-43-gf56129fe78d5.
PR: 258209
MFC after: 2 weeks
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This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-13.0.0-rc1-97-g23ba3732246a.
PR: 258209
MFC after: 2 weeks
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This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-13-init-16847-g88e66fa60ae5, the last commit before
the upstream release/13.x branch was created.
PR: 258209
MFC after: 2 weeks
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Merge commit 2d8c18fbbdd1 from llvm git (by Jessica Clarke):
[X86] Don't add implicit REP prefix to VIA PadLock xstore
Commit 8fa3e8fa1492 added an implicit REP prefix to all VIA PadLock
instructions, but GNU as doesn't add one to xstore, only all the others.
This resulted in a kernel panic regression in FreeBSD upon updating to
LLVM 11 (https://bugs.freebsd.org/259218) which includes the commit in
question. This partially reverts that commit.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D112355
MFC after: 3 days
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for InitLoopCount."
Reverts llvm commit 42eaf4fe0adef3344adfd9fbccd49f325cb549ef, pointed
from bisect as source of regression that causes liblzma to compress/
uncompress incorrectly. It's know to affect powerpc64 BE only.
The patch unbreaks FreeBSD powerpc64 installation media, since
bsdinstall can't uncompress the *.txz produced by FreeBSD CI. It's
probably miscompiling other software bas well.
Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=51714
Reviewed by: dim
MFC after: 2 days
Sponsored by: Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision: https://reviews.freebsd.org/D31804
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Amends LLVM commit 2518433f861fcb877d0a7bdd9aec1aec1f77505a that
was pointed as the source of regression on LLVM12.
This affects powerpc64*, making binaries crash with segmentation fault
due to bad code generation around "__stack_chk_guard"
Root cause and/or proper fix is under investigation by:
https://bugs.llvm.org/show_bug.cgi?id=51590
Reviewed by: dim
MFC after: 2 days
Sponsored by: Instituto de Pesquisas Eldorado (eldorado.org.br)
Differential Revision: https://reviews.freebsd.org/D31698
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This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-12.0.1-0-gfed41342a82f, a.k.a. 12.0.1 release.
PR: 255570
MFC after: 6 weeks
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Merge commit 789708617d20 from llvm git (Koutheir Attouchi):
Do not generate calls to the 128-bit function __multi3() on 32-bit ARM
Re-applying this patch after bots failures. Should be fine now.
The function __multi3() is undefined on 32-bit ARM, so a call to it should
never be emitted. Instead, plain instructions need to be generated to
perform 128-bit multiplications.
Differential Revision: https://reviews.llvm.org/D103906
Reported by: mmel
MFC after: 3 days
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This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-12.0.1-rc2-0-ge7dac564cd0e, a.k.a. 12.0.1 rc2.
PR: 255570
MFC after: 6 weeks
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This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-12.0.0-0-gd28af7c654d8, a.k.a. 12.0.0 release.
PR: 255570
MFC after: 6 weeks
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This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-12-init-17869-g8e464dd76bef, the last commit before the
upstream release/12.x branch was created.
PR: 255570
MFC after: 6 weeks
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Merge commit 99eca1bd9c7a from llvm git (by Mark Johnston):
[Driver] Enable kernel address and memory sanitizers on FreeBSD
Test Plan: using kernel ASAN and MSAN implementations in FreeBSD
Reviewed By: emaste, dim, arichardson
Differential Revision: https://reviews.llvm.org/D98286
Merge commit f511dc75e4c1 from llvm git (by Mark Johnston):
[asan] Add an offset for the kernel address sanitizer on FreeBSD
This is based on a port of the sanitizer runtime to the FreeBSD kernel
that has been commited as https://cgit.freebsd.org/src/commit/?id=38da497a4dfcf1979c8c2b0e9f3fa0564035c147
and the following commits.
Reviewed By: emaste, dim
Differential Revision: https://reviews.llvm.org/D98285
Requested by: markj
MFC after: 3 days
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release/11.x llvmorg-11.0.1-rc2-0-g43ff75f2c3f (aka 11.0.1 rc2).
MFC after: 4 weeks
X-MFC-With: r364284
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[PowerPC] Do not emit HW loop when TLS var accessed in PHI of loop
exit
If any PHI nodes in loop exit blocks have incoming values from the
loop that are accesses of TLS variables with local dynamic or general
dynamic TLS model, the address will be computed inside the loop.
Since this includes a call to __tls_get_addr, this will in turn cause
the CTR loops verifier to complain. Disable CTR loops in such cases.
Fixes: https://bugs.llvm.org/show_bug.cgi?id=48527
This should fix building ceph 12.2.12 on powerpc64, powerpc, powerpcspe
and powerpc64le.
Requested by: pkubaj
MFC after: 3 days
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Implement computeHostNumHardwareThreads() for FreeBSD
This retrieves CPU affinity via FreeBSD's cpuset(2) API, and makes
LLVM respect affinity settings configured by the user via the
cpuset(1) command.
In particular, this allows to reduce the number of threads used on
machines with high core counts, which can interact badly with
parallelized build systems. This is particularly noticable with lld,
which spawns lots of threads even for linking e.g. hello_world!
This fix is related to PR48193, but does not adress the more
fundamental problem, which is that LLVM by default grabs as many CPUs
and/or threads as possible.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D92271
Originally by: mjg
MFC after: 1 week
Notes:
svn path=/head/; revision=368309
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landed upstream:
For llvm's internal function which retrieves the number of available
"hardware threads", use cpuset_getaffinity(2) on FreeBSD, so it will
honor processor sets configured by the cpuset(1) command.
This should make it possible to avoid e.g. lld creating a huge number of
threads on a machine with many cores, even for linking simple programs.
This will also be submitted upstream.
Submitted by: mjg
Notes:
svn path=/head/; revision=368308
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"hardware threads", use cpuset_getaffinity(2) on FreeBSD, so it will
honor processor sets configured by the cpuset(1) command.
This should make it possible to avoid e.g. lld creating a huge number of
threads on a machine with many cores, even for linking simple programs.
This will also be submitted upstream.
Submitted by: mjg
MFC after: 1 week
Notes:
svn path=/head/; revision=367815
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[PowerPC] Skip combining (uint_to_fp x) if x is not simple type
Current powerpc64le backend hits
```
Combining: t7: f64 = uint_to_fp t6
llc: llvm-project/llvm/include/llvm/CodeGen/ValueTypes.h:291:
llvm::MVT llvm::EVT::getSimpleVT() const: Assertion `isSimple() &&
"Expected a SimpleValueType!"' failed.
```
This patch fixes it by skipping combination if `t6` is not simple
type.
Fixed https://bugs.llvm.org/show_bug.cgi?id=47660.
Reviewed By: #powerpc, steven.zhang
Differential Revision: https://reviews.llvm.org/D88388
This should fix the llvm assertion mentioned above when building the
following ports for powerpc64le:
* audio/traverso
* databases/percona57-pam-for-mysql
* databases/percona57-server
* emulators/citra
* emulators/citra-qt5
* games/7kaa
* graphics/dia
* graphics/mandelbulber
* graphics/pcl-pointclouds
* net-p2p/libtorrent-rasterbar
* textproc/htmldoc
Requested by: pkubaj
MFC after: 3 days
Notes:
svn path=/head/; revision=367485
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release/11.x llvmorg-11.0.0-0-g176249bd673 (aka 11.0.0 release).
MFC after: 4 weeks
X-MFC-With: r364284
Notes:
svn path=/head/; revision=366655
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release/11.x llvmorg-11.0.0-rc5-0-g60a25202a7d.
MFC after: 4 weeks
X-MFC-With: r364284
Notes:
svn path=/head/; revision=366339
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[X86] Place new constant node in topological order in
X86DAGToDAGISel::matchBitExtract
Fixes PR47482
This should fix 'Assertion failed: (Op->getNodeId() != -1 && "Node has
already selected predecessor node"), function DoInstructionSelection,
file
/usr/src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp,
line 1149' when compiling part of the project_painter project, while
targeting the bdver2 (or higher) CPU.
Reported by: jkim
MFC after: 6 weeks
X-MFC-With: r364284
Notes:
svn path=/head/; revision=365849
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release/11.x llvmorg-11.0.0-rc2-91-g6e042866c30.
MFC after: 6 weeks
X-MFC-With: r364284
Notes:
svn path=/head/; revision=365807
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[X86] SSE4_A should only imply SSE3 not SSSE3 in the frontend.
SSE4_1 and SSE4_2 due imply SSSE3. So I guess I got confused when
switching the code to being table based in D83273.
Fixes PR47464
This should fix builds with -march=amdfam10 emitting SSSE3 instructions
such as pshufb, which lead to programs crashing with SIGILL on such
processors.
Reported by: avg
MFC after: 6 weeks
X-MFC-With: r364284
Notes:
svn path=/head/; revision=365507
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release/11.x llvmorg-11.0.0-rc2-0-g414f32a9e86.
MFC after: 6 weeks
X-MFC-With: r364284
Notes:
svn path=/head/; revision=364718
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[PowerPC] Fix a typo for InstAlias of mfsprg
D77531 has a type for mfsprg, it should be mtsprg. This patch is to
fix this typo.
This should fix booting powerpc64 kernels, after LLVM 11 was imported.
PR: 248763
Notes:
svn path=/head/; revision=364455
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[PowerPC] Make StartMI ignore COPY like instructions.
Reviewed By: lkail
Differential Revision: https://reviews.llvm.org/D85659
This fixes an assertion failure when building world for powerpc. It was
reported upstream as <https://bugs.llvm.org/show_bug.cgi?id=47041>.
Notes:
svn path=/head/; revision=364314
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Tentatively apply https://reviews.llvm.org/D85659, which fixes an
assertion failure when building world for powerpc. This has been
reported upstream as <https://bugs.llvm.org/show_bug.cgi?id=47041>.
Notes:
svn path=/head/; revision=364313
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assertion failure when building world for powerpc. This has been
reported upstream as <https://bugs.llvm.org/show_bug.cgi?id=47041>.
Notes:
svn path=/projects/clang1100-import/; revision=364275
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release/11.x llvmorg-11.0.0-rc1-47-gff47911ddfc.
Notes:
svn path=/projects/clang1100-import/; revision=364253
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Disable PDB support in LLVMSymbolizer for now, to avoid llvm-objdump
pulling in all the PDB handling code.
Notes:
svn path=/projects/clang1100-import/; revision=363776
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release/11.x llvmorg-11.0.0-rc1-25-g903c872b169.
Notes:
svn path=/projects/clang1100-import/; revision=363746
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release/11.x llvmorg-11-init-20933-g3c1fca803bc.
Notes:
svn path=/projects/clang1100-import/; revision=363743
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master 2e10b7a39b9, the last commit before the llvmorg-12-init tag, from
which release/11.x was branched.
Note that for now, I rolled back all our local changes to make merging
easier, and I will reapply the still-relevant ones after updating to
11.0.0-rc1.
Notes:
svn path=/projects/clang1100-import/; revision=363742
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llvmorg-10.0.1-rc2-0-g77d76b71d7d.
Also add a few more llvm utilities under WITH_CLANG_EXTRAS:
* llvm-dwp, a utility for merging DWARF 5 Split DWARF .dwo files into
.dwp (DWARF package files)
* llvm-size, a size(1) replacement
* llvm-strings, a strings(1) replacement
MFC after: 3 weeks
Notes:
svn path=/head/; revision=362719
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llvmorg-10.0.0-129-gd24d5c8e308. Getting closer to 10.0.1-rc2.
MFC after: 3 weeks
Notes:
svn path=/head/; revision=362609
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llvmorg-10.0.0-97-g6f71678ecd2 (not quite 10.0.1 rc2, as more fixes are
still pending).
MFC after: 3 weeks
Notes:
svn path=/head/; revision=362445
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[BasicAA] Make BasicAA a cfg pass.
Summary:
Part of the changes in D44564 made BasicAA not CFG only due to it
using PhiAnalysisValues which may have values invalidated. Subsequent
patches (rL340613) appear to have addressed this limitation.
BasicAA should not be invalidated by non-CFG-altering passes. A
concrete example is MemCpyOpt which preserves CFG, but we are testing
it invalidates BasicAA.
llvm-dev RFC:
https://groups.google.com/forum/#!topic/llvm-dev/eSPXuWnNfzM
Reviewers: john.brawn, sebpop, hfinkel, brzycki
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74353
This fixes an issue with clang's -fintegrated-cc1 feature, which could
make it output slightly different assembly code, depending on the way it
was invoked.
In r361755 we attempted to work around it by disabling the integrated
cc1 stage, but it did not solve the root cause for all situations.
Extensive testing and bisecting showed that the above change finally
makes the output deterministic, even if -fintegrated-cc1 is on.
Reported by: Fabian Keil <fk@fabiankeil.de>
PR: 246630
MFC after: 3 days
Notes:
svn path=/head/; revision=362341
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llvmorg-10.0.1-rc1-0-gf79cd71e145 (aka 10.0.1 rc1).
MFC after: 3 weeks
Notes:
svn path=/head/; revision=361410
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getMainExecutable: Fix hand-rolled AT_EXECPATH for older FreeBSD
Once we hit AT_NULL, we need to bail out of the loop; not just the
enclosing switch. This fixes basic usage (e.g. `cc --version`) when
AT_EXECPATH isn't present on older branches (e.g. under
emu-user-static, at the moment), where we would previously run off
the end of ::environ.
Patch By: kevans
Reviewed By: arichardson
Differential Revision: https://reviews.llvm.org/D79239
MFC after: 3 days
Notes:
svn path=/head/; revision=360801
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unsupported relocation on symbol" when assembling arm 'adr' pseudo
instructions. However, the upstream commit did not take big-endian arm
into account.
Applying the same changes to the big-endian handling is straightforward,
thanks to Andrew Turner and Peter Smith for the hint. This will also be
submitted upstream.
MFC after: immediately, since this fix is meant for stable/11
Notes:
svn path=/head/; revision=360697
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[ARM] Only produce qadd8b under hasV6Ops
When compiling for a arm5te cpu from clang, the +dsp attribute is
set. This meant we could try and generate qadd8 instructions where we
would end up having no pattern. I've changed the condition here to be
hasV6Ops && hasDSP, which is what other parts of ARMISelLowering seem
to use for similar instructions.
Fixed PR45677.
This fixes "fatal error: error in backend: Cannot select: t37: i32 =
ARMISD::QADD8b t43, t44" when compiling sys/dev/sound/pcm/feeder_mixer.c
for armv5. For some reason we do not encounter this on head, but this
error popped up while building universes for stable/12.
MFC after: 3 days
Notes:
svn path=/head/; revision=360350
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[PowerPC] Do not attempt to reuse load for 64-bit FP_TO_UINT without
FPCVT
We call the function that attempts to reuse the conversion without
checking whether the target matches the constraints that the callee
expects. This patch adds the check prior to the call.
Fixes: https://bugs.llvm.org/show_bug.cgi?id=43976
Differential revision: https://reviews.llvm.org/D77564
This should fix 'Assertion failed: ((Op.getOpcode() == ISD::FP_TO_SINT
|| Subtarget.hasFPCVT()) && "i64 FP_TO_UINT is supported only with
FPCVT"), function LowerFP_TO_INTForReuse, file
/usr/src/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, line 7276'
when building the devel/libslang2 port (and a few others) for PowerPC64.
Requested by: pkubaj
MFC after: 6 weeks
X-MFC-With: 358851
Notes:
svn path=/head/; revision=360134
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Fix bots after a9ad65a2b34f
In the last commit, I neglected to initialize the new subtarget
feature I added which caused failures on a few bots. This should fix
that.
This unbreaks the build after r359981, which reverted upstream commit
a9ad65a2b34f.
Reported by: jhibbits (and jenkins :)
MFC after: 6 weeks
X-MFC-With: 358851
Notes:
svn path=/head/; revision=359994
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[PowerPC] Change default for unaligned FP access for older subtargets
This is a fix for https://bugs.llvm.org/show_bug.cgi?id=40554
Some CPU's trap to the kernel on unaligned floating point access and
there are kernels that do not handle the interrupt. The program then
fails with a SIGBUS according to the PR. This just switches the
default for unaligned access to only allow it on recent server CPUs
that are known to allow this.
Differential revision: https://reviews.llvm.org/D71954
This upstream commit causes a compiler hang when building certain ports
(e.g. security/nss, multimedia/x264) for powerpc64. The hang has been
reported in https://bugs.llvm.org/show_bug.cgi?id=45186, but in the mean
time it is more convenient to revert the commit.
Requested by: jhibbits
MFC after: 6 weeks
X-MFC-With: 358851
Notes:
svn path=/head/; revision=359981
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[PowerPC]: Don't allow r0 as a target for LD_GOT_TPREL_L/32
Summary:
The linker is free to relax this (relocation R_PPC_GOT_TPREL16)
against R_PPC_TLS, if it sees fit (initial exec to local exec). If r0
is used, this can generate execution-invalid code (converts to 'addi
%rX, %r0, FOO, which translates in PPC-lingo to li %rX, FOO). Forbid
this instead.
This fixes static binaries using locales on FreeBSD/powerpc (tested
on FreeBSD/powerpcspe).
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D76662
Requested by: jhibbits
MFC after: 6 weeks
X-MFC-With: 358851
Notes:
svn path=/head/; revision=359334
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[PowerPC]: e500 target can't use lwsync, use msync instead
The e500 core has a silicon bug that triggers an illegal instruction
program trap on any sync other than msync. Other cores will typically
ignore illegal sync types, and the documentation even implies that
the 'illegal' bits are ignored.
Address this hardware deficiency by only using msync, like the PPC440.
Differential Revision: https://reviews.llvm.org/D76614
Requested by: jhibbits
MFC after: 6 weeks
X-MFC-With: 358851
Notes:
svn path=/head/; revision=359333
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[EarlyCSE] avoid crashing when detecting min/max/abs patterns (PR41083)
As discussed in PR41083:
https://bugs.llvm.org/show_bug.cgi?id=41083
...we can assert/crash in EarlyCSE using the current hashing scheme
and instructions with flags.
ValueTracking's matchSelectPattern() may rely on overflow (nsw, etc)
or other flags when detecting patterns such as min/max/abs composed
of compare+select. But the value numbering / hashing mechanism used
by EarlyCSE intersects those flags to allow more CSE.
Several alternatives to solve this are discussed in the bug report.
This patch avoids the issue by doing simple matching of min/max/abs
patterns that never requires instruction flags. We give up some CSE
power because of that, but that is not expected to result in much
actual performance difference because InstCombine will canonicalize
these patterns when possible. It even has this comment for abs/nabs:
/// Canonicalize all these variants to 1 pattern.
/// This makes CSE more likely.
(And this patch adds PhaseOrdering tests to verify that the expected
transforms are still happening in the standard optimization
pipelines.
I left this code to use ValueTracking's "flavor" enum values, so we
don't have to change the callers' code. If we decide to go back to
using the ValueTracking call (by changing the hashing algorithm
instead), it should be obvious how to replace this chunk.
Differential Revision: https://reviews.llvm.org/D74285
This fixes an assertion when building the math/gsl port on PowerPC64.
Requested by: pkubja
MFC after: 6 weeks
X-MFC-With: 358851
Notes:
svn path=/head/; revision=359086
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llvmorg-10.0.0-rc4-5-g52c365aa9ca. The actual release should follow Real
Soon Now.
PR: 244251
MFC after: 6 weeks
Notes:
svn path=/head/; revision=359082
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commit llvmorg-10.0.0-rc3-1-gc290cb61fdc), and bump versions.
Notes:
svn path=/projects/clang1000-import/; revision=358682
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