| Commit message (Collapse) | Author | Age | Files | Lines |
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Notes:
svn path=/head/; revision=235556
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MFC after: 1 week
Notes:
svn path=/head/; revision=233704
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Notes:
svn path=/head/; revision=233250
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AcpiEnterSleepState() executes (optional) _GTS method since ACPICA 20120215
(r231844). To evaluate the method, we need malloc(9), which may sleep.
Reported by: bschmidt
MFC after: 3 days
Notes:
svn path=/head/; revision=233249
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Reported by: bschmidt
Reviewed by: jhb
Pointy hat to: jkim
MFC after: 3 days
Notes:
svn path=/head/; revision=233208
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Notes:
svn path=/head/; revision=231840
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spinlock_enter()/spinlock_exit() to save/restore RFLAGS. We know interrupt
is disabled when returning from S3. For AP, we do not have to save/restore
it because IRET will do it for us any way. Do not save CR3 locally because
savectx() does it and BSP does not have to switch to kernel map for amd64.
Change contigmalloc(9) flag while I am in the neighborhood.
Notes:
svn path=/head/; revision=231797
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will stop beeping after all device drivers are resumed. Use proper API to
"acquire" and "release" PIC timer2 for consistency and correctness.
Notes:
svn path=/head/; revision=231791
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svn path=/head/; revision=231787
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svn path=/head/; revision=231227
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Notes:
svn path=/head/; revision=230958
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Notes:
svn path=/head/; revision=230957
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- Update my copyright dates.
Reviewed by: kib
Notes:
svn path=/head/; revision=230830
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Notes:
svn path=/head/; revision=230777
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64bit and 32bit ABIs. As a side-effect, it enables AVX on capable
CPUs.
In particular:
- Query the CPU support for XSAVE, list of the supported extensions
and the required size of FPU save area. The hw.use_xsave tunable is
provided for disabling XSAVE, and hw.xsave_mask may be used to
select the enabled extensions.
- Remove the FPU save area from PCB and dynamically allocate the
(run-time sized) user save area on the top of the kernel stack,
right above the PCB. Reorganize the thread0 PCB initialization to
postpone it after BSP is queried for save area size.
- The dumppcb, stoppcbs and susppcbs now do not carry the FPU state as
well. FPU state is only useful for suspend, where it is saved in
dynamically allocated suspfpusave area.
- Use XSAVE and XRSTOR to save/restore FPU state, if supported and
enabled.
- Define new mcontext_t flag _MC_HASFPXSTATE, indicating that
mcontext_t has a valid pointer to out-of-struct extended FPU
state. Signal handlers are supplied with stack-allocated fpu
state. The sigreturn(2) and setcontext(2) syscall honour the flag,
allowing the signal handlers to inspect and manipilate extended
state in the interrupted context.
- The getcontext(2) never returns extended state, since there is no
place in the fixed-sized mcontext_t to place variable-sized save
area. And, since mcontext_t is embedded into ucontext_t, makes it
impossible to fix in a reasonable way. Instead of extending
getcontext(2) syscall, provide a sysarch(2) facility to query
extended FPU state.
- Add ptrace(2) support for getting and setting extended state; while
there, implement missed PT_I386_{GET,SET}XMMREGS for 32bit binaries.
- Change fpu_kern KPI to not expose struct fpu_kern_ctx layout to
consumers, making it opaque. Internally, struct fpu_kern_ctx now
contains a space for the extended state. Convert in-kernel consumers
of fpu_kern KPI both on i386 and amd64.
First version of the support for AVX was submitted by Tim Bird
<tim.bird am sony com> on behalf of Sony. This version was written
from scratch.
Tested by: pho (previous version), Yamagi Burmeister <lists yamagi org>
MFC after: 1 month
Notes:
svn path=/head/; revision=230426
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Tested by: pluknet
Notes:
svn path=/projects/largeSMP/; revision=223363
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cpuset_t objects.
That is going to offer the underlying support for a simple bump of
MAXCPU and then support for number of cpus > 32 (as it is today).
Right now, cpumask_t is an int, 32 bits on all our supported architecture.
cpumask_t on the other side is implemented as an array of longs, and
easilly extendible by definition.
The architectures touched by this commit are the following:
- amd64
- i386
- pc98
- arm
- ia64
- XEN
while the others are still missing.
Userland is believed to be fully converted with the changes contained
here.
Some technical notes:
- This commit may be considered an ABI nop for all the architectures
different from amd64 and ia64 (and sparc64 in the future)
- per-cpu members, which are now converted to cpuset_t, needs to be
accessed avoiding migration, because the size of cpuset_t should be
considered unknown
- size of cpuset_t objects is different from kernel and userland (this is
primirally done in order to leave some more space in userland to cope
with KBI extensions). If you need to access kernel cpuset_t from the
userland please refer to example in this patch on how to do that
correctly (kgdb may be a good source, for example).
- Support for other architectures is going to be added soon
- Only MAXCPU for amd64 is bumped now
The patch has been tested by sbruno and Nicholas Esborn on opteron
4 x 12 pack CPUs. More testing on big SMP is expected to came soon.
pluknet tested the patch with his 8-ways on both amd64 and i386.
Tested by: pluknet, sbruno, gianni, Nicholas Esborn
Reviewed by: jeff, jhb, sbruno
Notes:
svn path=/projects/largeSMP/; revision=221499
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Commit the kernel changes.
Notes:
svn path=/head/; revision=217326
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better job since r215703 and it is safer now.
Notes:
svn path=/head/; revision=215753
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instead of hardcoding acpi(4) unit number as we have device_t for it.
Notes:
svn path=/head/; revision=215097
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file acpi_apm.c, and place it on sys/x86/acpica.
Notes:
svn path=/head/; revision=215072
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svn path=/head/; revision=215024
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Notes:
svn path=/head/; revision=215023
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identical on both platforms.
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svn path=/head/; revision=215012
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svn path=/head/; revision=215002
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Notes:
svn path=/head/; revision=214631
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Notes:
svn path=/head/; revision=214630
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It is more appropriate in this context because TSC MSR is reset to zero
when the CPU is restarted from S3 and above. Move acpi_resync_clock() back
to where it was before r211202. It does not make a difference any more.
Notes:
svn path=/head/; revision=211292
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This should fix weird runtime problem after resume on amd64. It also fixes
"calcru: runtime went backwards" warnings with bootverbose.
Notes:
svn path=/head/; revision=211202
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Notes:
svn path=/head/; revision=210942
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svn path=/head/; revision=210940
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Notes:
svn path=/head/; revision=210810
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Do not clobber FPU thread's PCB as it is more harmful. When we resume CPU,
unconditionally reload FPU state.
Pointed out by: bde [1]
Notes:
svn path=/head/; revision=210804
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savectx() is only used for panic dump (dumppcb) and kdb (stoppcbs). Thus,
saving additional information does not hurt and it may be even beneficial.
Unfortunately, struct pcb has grown larger to accommodate more data.
Move 512-byte long pcb_user_save to the end of struct pcb while I am here.
- savectx() now saves FPU state unconditionally and copy it to the PCB of
FPU thread if necessary. This gives panic dump and kdb a chance to take
a look at the current FPU state even if the FPU is "supposedly" not used.
- Resuming CPU now unconditionally reinitializes FPU. If the saved FPU
state was irrelevant, it could be in an unknown state.
Suggested by: bde [1]
Notes:
svn path=/head/; revision=210777
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Notes:
svn path=/head/; revision=210614
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of critical_enter(9) and critical_exit(9) by fpugetregs() and fpusetregs().
Also, we do not touch PCB flags any more.
MFC after: 1 month
Notes:
svn path=/head/; revision=210514
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better places and remove intermediate makefile and shell scripts. This
makes parallel kernel build little bit safer for amd64.
Notes:
svn path=/head/; revision=209957
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monitored via CMCI, reset the interrupt threshold to 1 on resume.
Reviewed by: jkim
MFC after: 2 weeks
Notes:
svn path=/head/; revision=209212
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We need actual storage for FPU state to save and restore.
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svn path=/head/; revision=209174
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Notes:
svn path=/head/; revision=209059
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FPU/SSE hardware. Caller should provide a save area that is chained
into the stack of the areas; pcb save_area for usermode FPU state is
on top. The pcb now contains a pointer to the current FPU saved area,
used during FPUDNA handling and context switches. There is also a
facility to allow the kernel thread to use pcb save_area.
Change the dreaded warnings "npxdna in kernel mode!" into the panics
when FPU usage is not registered.
KPI discussed with: fabient
Tested by: pho, fabient
Hardware provided by: Sentex Communications
MFC after: 1 month
Notes:
svn path=/head/; revision=208833
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checksums as the base acpi(4) driver. This fixes a problem where the MADT
parser would reject the MADT table during early boot causing the MP Table
to be, but then the acpi(4) driver would attach and use non-SMP interrupt
routing.
Tested by: Alastair Hogge agh of coolrhaug com
MFC after: 1 week
Notes:
svn path=/head/; revision=205332
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Notes:
svn path=/head/; revision=200280
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svn path=/head/; revision=198931
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Notes:
svn path=/head/; revision=198422
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- Allocate memory for wakeup code after ACPI bus is attached. The early
memory allocation hack was inherited from i386 but amd64 does not need it.
- Exclude real mode IVT and BDA explicitly. Improve comments about memory
allocation and reason for the exclusions. It is a no-op in reality, though.
- Remove an unnecessary CLD from wakeup code and re-align.
Notes:
svn path=/head/; revision=197863
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install apm(8) and apm_bios.h on amd64.
Notes:
svn path=/head/; revision=197536
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startup and genericize it so it can be reused to map other tables as well:
- Add a routine to walk a list of ACPI subtables such as those used in the
APIC and SRAT tables in the MI acpi(4) driver.
- Move the routines for mapping and unmapping an ACPI table as well as
mapping the RSDT or XSDT and searching for a table with a given signature
out into acpica_machdep.c for both amd64 and i386.
Notes:
svn path=/head/; revision=197439
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Notes:
svn path=/head/; revision=193530
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Notes:
svn path=/head/; revision=190636
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