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* amd64: do not assume that kernel is loaded at 2M physicalKonstantin Belousov2021-07-311-5/+2
* amd64: make efi_boot globalKonstantin Belousov2021-07-241-0/+2
* amd64: retire sse2_pagezeroMateusz Guzik2021-01-301-1/+0
* amd64: Store full 64bit of FIP/FDP for 64bit processes when using XSAVE.Konstantin Belousov2020-10-031-0/+1
* Move ctx_switch_xsave declaration to amd64 md_var.h.Konstantin Belousov2020-10-031-0/+1
* Move vm_page_dump bitset array definition to MI codeD Scott Phillips2020-09-211-1/+0
* amd64 pmap: LA57 AKA 5-level pagingKonstantin Belousov2020-08-231-0/+2
* amd64: move pcb out of kstack to struct thread.Konstantin Belousov2019-10-251-0/+1
* amd64: rework PCPU allocationKonstantin Belousov2019-08-241-0/+3
* Add pci_early function to detect Intel stolen memory.Konstantin Belousov2018-10-311-0/+4
* amd64: flush L1 data cache on syscall return with an error.Konstantin Belousov2018-10-201-0/+4
* Update L1TF workaround to sustain L1D pollution from NMI.Konstantin Belousov2018-08-191-0/+1
* Add Intel Spec Store Bypass Disable control.Konstantin Belousov2018-05-211-0/+1
* Move the CR0.WP manipulation KPI to x86.Konstantin Belousov2018-03-201-2/+0
* Provide KPI for handling of rw/ro kernel text.Konstantin Belousov2018-03-201-0/+2
* IBRS support, AKA Spectre hardware mitigation.Konstantin Belousov2018-01-311-0/+1
* Move the kernphys declaration to machine/md_var.h.Konstantin Belousov2018-01-181-0/+6
* Move the hardware setup for fast syscalls into a common function.Konstantin Belousov2018-01-111-0/+1
* sys: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-201-0/+2
* Lower the amd64 shared page, which contains the signal trampoline,Don Lewis2017-08-021-1/+4
* On amd64, declare sse2_pagezero() and start using it again, but onlyBruce Evans2016-08-291-0/+1
* Type of the interrupt handlers on x86 cannot be expressed in C.Konstantin Belousov2016-03-291-3/+0
* Remove redundant ctx_switch_xsave declaration in sys/amd64/include/md_var.hEnji Cooper2015-12-221-1/+0
* Merge common parts of i386 and amd64 md_var.h and smp.h intoKonstantin Belousov2015-12-071-72/+5
* Clear the IA32_MISC_ENABLE MSR bit, which limits the max CPUIDKonstantin Belousov2015-08-031-0/+1
* Update print_INTEL_TLB() by the tag values from the Intel SDMKonstantin Belousov2015-06-061-0/+1
* If x86 CPU implementation of the MWAIT instruction reasonablyKonstantin Belousov2015-05-091-0/+1
* Move some common code from sys/amd64/amd64/machdep.c andKonstantin Belousov2015-04-221-0/+1
* For x86, read MAXPHYADDR, defined in SDM vol 3 4.1.4 Enumeration of PagingKonstantin Belousov2015-01-121-0/+1
* Rework virtual machine hypervisor detection.John Baldwin2014-10-281-0/+2
* Pass up the error status of minidumpsys() to its callers.Mark Johnston2014-10-081-1/+1
* - Move prototypes for various functions into out of C files and intoJohn Baldwin2014-09-041-0/+3
* Move fpusave() wrapper for suspend hander to sys/amd64/amd64/fpu.c.Jung-uk Kim2014-03-041-1/+0
* x86: detect mwait capabilities and extensions, when presentAndriy Gapon2013-07-281-0/+3
* Fix the hardware watchpoints on SMP amd64. Load the updated %drKonstantin Belousov2013-05-211-0/+1
* Provide the reading and display of the Standard Extended Features,Konstantin Belousov2012-11-011-0/+1
* Add support for the XSAVEOPT instruction use. Our XSAVE/XRSTOR usageKonstantin Belousov2012-07-141-0/+1
* Add support for the extended FPU states on amd64, both for nativeKonstantin Belousov2012-01-211-0/+10
* Put amd64_syscall() prototype in md_var.h.Konstantin Belousov2011-09-151-0/+1
* Handle a case when non-canonical address is loaded into the fsbase orKonstantin Belousov2010-04-101-0/+4
* Implement AMD's recommended workaround for Erratum 383 on Family 10hAlan Cox2010-03-091-0/+1
* Amd64 init_secondary() calls initializecpu() while curthread is stillKonstantin Belousov2009-11-131-0/+1
* When the page caching attributes are changed, after new mapping isKonstantin Belousov2009-07-221-0/+1
* Save and restore segment registers on amd64 when entering and leavingKonstantin Belousov2009-04-011-0/+13
* Add basic amd64 support for VIA Nano processors.Jung-uk Kim2009-01-121-0/+2
* Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "...").Jung-uk Kim2008-11-261-0/+1
* Detect Advanced Power Management Information for AMD CPUs.Jung-uk Kim2008-10-211-0/+1
* Remove extern struct pcpu __pcpu[]; from the header file andAlexander Kabaev2007-05-191-2/+0
* Revert previous change.Craig Rodrigues2007-01-181-1/+1
* Forward declare __pcpu as a pointer type instead of an array type toCraig Rodrigues2007-01-181-1/+1