| Commit message (Expand) | Author | Age | Files | Lines |
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| * | Add bhyve support for LA57 guest mode. | Konstantin Belousov | 2020-08-23 | 1 | -1/+5 |
| * | bhyve(8): For prototyping, reattempt decode in userspace | Conrad Meyer | 2020-06-25 | 1 | -8/+24 |
| * | vmm(4): Decode and emulate BEXTR | Conrad Meyer | 2020-04-21 | 1 | -0/+86 |
| * | vmm(4): Decode 3-byte VEX-prefixed instructions | Conrad Meyer | 2020-04-21 | 1 | -2/+84 |
| * | vmm(4): Expose instruction decode to userspace build | Conrad Meyer | 2020-04-16 | 1 | -2/+15 |
| * | Emulate the "TEST r/m{16,32,64}, imm{16,32,32}" instructions (opcode F7H). | Rodney W. Grimes | 2019-06-26 | 1 | -0/+95 |
| * | Emulate the "ADD reg, r/m" instruction (opcode 03H). | John Baldwin | 2019-05-03 | 1 | -0/+100 |
| * | bhyve: emulate CLFLUSH and CLFLUSHOPT. | Konstantin Belousov | 2018-10-12 | 1 | -0/+40 |
| * | Add a new variant of the GLA2GPA ioctl for use by the debug server. | John Baldwin | 2018-02-26 | 1 | -17/+45 |
| * | sys/amd64: further adoption of SPDX licensing ID tags. | Pedro F. Giffuni | 2017-11-27 | 1 | -0/+2 |
| * | Emulate the "OR reg, r/m" instruction (opcode 0BH). | Peter Grehan | 2017-11-01 | 1 | -1/+31 |
| * | vmm(4): Small spelling fixes. | Pedro F. Giffuni | 2016-05-03 | 1 | -1/+1 |
| * | verify_gla() needs to account for non-zero segment base addresses. | Tycho Nightingale | 2015-06-26 | 1 | -7/+44 |
| * | Restructure memory allocation in bhyve to support "devmem". | Neel Natu | 2015-06-18 | 1 | -5/+7 |
| * | The 'verify_gla()' function is used to ensure that the effective address | Neel Natu | 2015-06-05 | 1 | -1/+1 |
| * | Remove the verification of instruction length after instruction decode. The | Neel Natu | 2015-05-22 | 1 | -16/+0 |
| * | Emulate the "CMP r/m, reg" instruction (opcode 39H). | Neel Natu | 2015-05-21 | 1 | -6/+22 |
| * | Deprecate the 3-way return values from vm_gla2gpa() and vm_copy_setup(). | Neel Natu | 2015-05-06 | 1 | -59/+64 |
| * | Emulate the 'CMP r/m8, imm8' instruction encountered when booting a Windows | Neel Natu | 2015-05-04 | 1 | -2/+14 |
| * | Emulate the 'bit test' instruction. Windows 7 uses 'bit test' to check the | Neel Natu | 2015-04-29 | 1 | -0/+52 |
| * | STOS/STOSB/STOSW/STOSD/STOSQ instruction emulation. | Tycho Nightingale | 2015-04-25 | 1 | -0/+77 |
| * | Enhance the support for Group 1 Extended opcodes: | Tycho Nightingale | 2015-04-06 | 1 | -38/+84 |
| * | Fix "MOVS" instruction memory to MMIO emulation. Currently updates to | Tycho Nightingale | 2015-04-01 | 1 | -31/+50 |
| * | When fetching an instruction in non-64bit mode, consider the value of the | Tycho Nightingale | 2015-03-24 | 1 | -3/+3 |
| * | MOVS instruction emulation. | Neel Natu | 2015-01-19 | 1 | -4/+267 |
| * | IFC @r273206 | Neel Natu | 2014-10-19 | 1 | -20/+77 |
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| | * | Emulate "POP r/m". | Neel Natu | 2014-10-14 | 1 | -20/+77 |
| * | | IFC @r271694 | Neel Natu | 2014-09-17 | 1 | -52/+154 |
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| | * | The "SUB" instruction used in getcc() actually does 'x -= y' so use the | Neel Natu | 2014-08-30 | 1 | -42/+66 |
| | * | Implement the 0x2B SUB instruction, and the OR variant of 0x81. | Peter Grehan | 2014-08-27 | 1 | -13/+91 |
| * | | AMD processors that have the SVM decode assist capability will store the | Neel Natu | 2014-09-13 | 1 | -1/+8 |
| * | | IFC @r269962 | Neel Natu | 2014-09-02 | 1 | -148/+533 |
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| | * | Support PCI extended config space in bhyve. | Neel Natu | 2014-08-08 | 1 | -0/+23 |
| | * | Don't return -1 from the push emulation handler. Negative return values are | Neel Natu | 2014-07-26 | 1 | -4/+11 |
| | * | Fix a couple of issues in the PUSH emulation: | Neel Natu | 2014-07-24 | 1 | -5/+15 |
| | * | Emulate instructions emitted by OpenBSD/i386 version 5.5: | Neel Natu | 2014-07-23 | 1 | -58/+298 |
| | * | Add support for operand size and address size override prefixes in bhyve's | Neel Natu | 2014-07-15 | 1 | -113/+202 |
| | * | Use the correct offset when converting a logical address (segment:offset) | Neel Natu | 2014-07-11 | 1 | -4/+5 |
| | * | Add support for emulating the move instruction: "mov r/m8, imm8". | Tycho Nightingale | 2014-06-26 | 1 | -0/+15 |
| * | | MFC @ r266724 | Peter Grehan | 2014-06-03 | 1 | -45/+482 |
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| | * | Add segment protection and limits violation checks in vie_calculate_gla() | Neel Natu | 2014-05-27 | 1 | -5/+81 |
| | * | Do the linear address calculation for the ins/outs emulation using a new | Neel Natu | 2014-05-25 | 1 | -38/+32 |
| | * | Consolidate all the information needed by the guest page table walker into | Neel Natu | 2014-05-24 | 1 | -20/+48 |
| | * | When injecting a page fault into the guest also update the guest's %cr2 to | Neel Natu | 2014-05-24 | 1 | -17/+16 |
| | * | Check for alignment check violation when processing in/out string instructions. | Neel Natu | 2014-05-23 | 1 | -8/+26 |
| | * | Add emulation of the "outsb" instruction. NetBSD guests use this to write to | Neel Natu | 2014-05-23 | 1 | -1/+47 |
| | * | Inject page fault into the guest if the page table walker detects an invalid | Neel Natu | 2014-05-22 | 1 | -23/+52 |
| | * | Add PG_RW check when translating a guest linear to guest physical address. | Neel Natu | 2014-05-20 | 1 | -20/+83 |
| | * | Add PG_U (user/supervisor) checks when translating a guest linear address | Neel Natu | 2014-05-19 | 1 | -10/+19 |
| | * | Add support for emulating the byte move and sign extend instructions: | Tycho Nightingale | 2014-04-15 | 1 | -5/+37 |
