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* Follow up to r225617. In order to maximize the re-usability of kernel codeDavide Italiano2014-10-162-4/+4
| | | | | | | | | | | in userland rename in-kernel getenv()/setenv() to kern_setenv()/kern_getenv(). This fixes a namespace collision with libc symbols. Submitted by: kmacy Tested by: make universe Notes: svn path=/head/; revision=273174
* Emulate "POP r/m".Neel Natu2014-10-141-20/+77
| | | | | | | | | | This is needed to boot OpenBSD/i386 MP kernel in bhyve. Reported by: grehan MFC after: 1 week Notes: svn path=/head/; revision=273108
* Support Intel-specific MSRs that are accessed when booting up a linux in bhyve:Neel Natu2014-10-091-0/+100
| | | | | | | | | | | | - MSR_PLATFORM_INFO - MSR_TURBO_RATIO_LIMITx - MSR_RAPL_POWER_UNIT Reviewed by: grehan MFC after: 1 week Notes: svn path=/head/; revision=272839
* Pass up the error status of minidumpsys() to its callers.Mark Johnston2014-10-082-3/+4
| | | | | | | | | PR: 193761 Submitted by: Conrad Meyer <conrad.meyer@isilon.com> Sponsored by: EMC / Isilon Storage Division Notes: svn path=/head/; revision=272766
* Add an argument to the x86 pmap_invalidate_cache_range() to requestKonstantin Belousov2014-10-082-10/+15
| | | | | | | | | | | | | | | forced invalidation of the cache range regardless of the presence of self-snoop feature. Some recent Intel GPUs in some modes are not coherent, and dirty lines in CPU cache must be flushed before the pages are transferred to GPU domain. Reviewed by: alc (previous version) Tested by: pho (amd64) Sponsored by: The FreeBSD Foundation MFC after: 1 week Notes: svn path=/head/; revision=272761
* Inject #UD into the guest when it executes either 'MONITOR' or 'MWAIT'.Neel Natu2014-10-063-0/+14
| | | | | | | | | | | The hypervisor hides the MONITOR/MWAIT capability by unconditionally setting CPUID.01H:ECX[3] to 0 so the guest should not expect these instructions to be present anyways. Discussed with: grehan Notes: svn path=/head/; revision=272670
* Get rid of code that dealt with the hardware not being able to save/restoreNeel Natu2014-10-021-55/+17
| | | | | | | | | | | | | the PAT MSR on guest exit/entry. This workaround was done for a beta release of VMware Fusion 5 but is no longer needed in later versions. All Intel CPUs since Nehalem have supported saving and restoring MSR_PAT in the VM exit and entry controls. Discussed with: grehan Notes: svn path=/head/; revision=272395
* msi: add Xen MSI implementationRoger Pau Monné2014-09-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for MSI interrupts when running on Xen. Apart from adding the Xen related code needed in order to register MSI interrupts this patch also makes the msi_init function a hook in init_ops, so different MSI implementations can have different initialization functions. Sponsored by: Citrix Systems R&D xen/interface/physdev.h: - Add the MAP_PIRQ_TYPE_MULTI_MSI to map multi-vector MSI to the Xen public interface. x86/include/init.h: - Add a hook for setting custom msi_init methods. amd64/amd64/machdep.c: i386/i386/machdep.c: - Set the default msi_init hook to point to the native MSI initialization method. x86/xen/pv.c: - Set the Xen MSI init hook when running as a Xen guest. x86/x86/local_apic.c: - Call the msi_init hook instead of directly calling msi_init. xen/xen_intr.h: x86/xen/xen_intr.c: - Introduce support for registering/releasing MSI interrupts with Xen. - The MSI interrupts will use the same PIC as the IO APIC interrupts. xen/xen_msi.h: x86/xen/xen_msi.c: - Introduce a Xen MSI implementation. x86/xen/xen_nexus.c: - Overwrite the default MSI hooks in the Xen Nexus to use the Xen MSI implementation. x86/xen/xen_pci.c: - Introduce a Xen specific PCI bus that inherits from the ACPI PCI bus and overwrites the native MSI methods. - This is needed because when running under Xen the MSI messages used to configure MSI interrupts on PCI devices are written by Xen itself. dev/acpica/acpi_pci.c: - Lower the quality of the ACPI PCI bus so the newly introduced Xen PCI bus can take over when needed. conf/files.i386: conf/files.amd64: - Add the newly created files to the build process. Notes: svn path=/head/; revision=272310
* Allow the PIC's IMR register to be read before ICW initialisation.Peter Grehan2014-09-271-13/+12
| | | | | | | | | | | | | | | | | | | As of git submit e179f6914152eca9, the Linux kernel does a simple probe of the PIC by writing a pattern to the IMR and then reading it back, prior to the init sequence of ICW words. The bhyve PIC emulation wasn't allowing the IMR to be read until the ICW sequence was complete. This limitation isn't required so relax the test. With this change, Linux kernels 3.15-rc2 and later won't hang on boot when calibrating the local APIC. Reviewed by: tychon MFC after: 3 days Notes: svn path=/head/; revision=272193
* ddb: allow specifying the exact address of the symtab and strtabRoger Pau Monné2014-09-251-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the FreeBSD kernel is loaded from Xen the symtab and strtab are not loaded the same way as the native boot loader. This patch adds three new global variables to ddb that can be used to specify the exact position and size of those tables, so they can be directly used as parameters to db_add_symbol_table. A new helper is introduced, so callers that used to set ksym_start and ksym_end can use this helper to set the new variables. It also adds support for loading them from the Xen PVH port, that was previously missing those tables. Sponsored by: Citrix Systems R&D Reviewed by: kib ddb/db_main.c: - Add three new global variables: ksymtab, kstrtab, ksymtab_size that can be used to specify the position and size of the symtab and strtab. - Use those new variables in db_init in order to call db_add_symbol_table. - Move the logic in db_init to db_fetch_symtab in order to set ksymtab, kstrtab, ksymtab_size from ksym_start and ksym_end. ddb/ddb.h: - Add prototype for db_fetch_ksymtab. - Declate the extern variables ksymtab, kstrtab and ksymtab_size. x86/xen/pv.c: - Add support for finding the symtab and strtab when booted as a Xen PVH guest. Since Xen loads the symtab and strtab as NetBSD expects to find them we have to adapt and use the same method. amd64/amd64/machdep.c: arm/arm/machdep.c: i386/i386/machdep.c: mips/mips/machdep.c: pc98/pc98/machdep.c: powerpc/aim/machdep.c: powerpc/booke/machdep.c: sparc64/sparc64/machdep.c: - Use the newly introduced db_fetch_ksymtab in order to set ksymtab, kstrtab and ksymtab_size. Notes: svn path=/head/; revision=272098
* As per [1] Intel only supports this driver on 64bit platforms.Bjoern A. Zeeb2014-09-232-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | For now restrict it to amd64. Other architectures might be re-added later once tested. Remove the drivers from the global NOTES and files files and move them to the amd64 specifics. Remove the drivers from the i386 modules build and only leave the amd64 version. Rather than depending on "inet" depend on "pci" and make sure that ixl(4) and ixlv(4) can be compiled independently [2]. This also allows the drivers to build properly on IPv4-only or IPv6-only kernels. PR: 193824 [2] Reviewed by: eric.joyner intel.com MFC after: 3 days References: [1] http://lists.freebsd.org/pipermail/svn-src-all/2014-August/090470.html Notes: svn path=/head/; revision=272022
* Update and clarify comments. Remove the useless counter for impossible, butKonstantin Belousov2014-09-212-12/+13
| | | | | | | | | | seen in wild situation (on buggy hypervisors). In collaboration with: bde MFC after: 1 week Notes: svn path=/head/; revision=271924
* Add some more KTR events to help debugging.Neel Natu2014-09-202-1/+8
| | | | Notes: svn path=/head/; revision=271891
* MSR_KGSBASE is no longer saved and restored from the guest MSR save area. ThisNeel Natu2014-09-201-7/+0
| | | | | | | | | | | behavior was changed in r271888 so update the comment block to reflect this. MSR_KGSBASE is accessible from the guest without triggering a VM-exit. The permission bitmap for MSR_KGSBASE is modified by vmx_msr_guest_init() so get rid of redundant code in vmx_vminit(). Notes: svn path=/head/; revision=271890
* Restructure the MSR handling so it is entirely handled by processor-specificNeel Natu2014-09-2010-372/+201
| | | | | | | | | | | | | | | | | | | | | | code. There are only a handful of MSRs common between the two so there isn't too much duplicate functionality. The VT-x code has the following types of MSRs: - MSRs that are unconditionally saved/restored on every guest/host context switch (e.g., MSR_GSBASE). - MSRs that are restored to guest values on entry to vmx_run() and saved before returning. This is an optimization for MSRs that are not used in host kernel context (e.g., MSR_KGSBASE). - MSRs that are emulated and every access by the guest causes a trap into the hypervisor (e.g., MSR_IA32_MISC_ENABLE). Reviewed by: grehan Notes: svn path=/head/; revision=271888
* - Use NULL instead of 0 for fpcurthread.Konstantin Belousov2014-09-181-13/+16
| | | | | | | | | | | | - Note the quirk with the interrupt enabled state of the dna handler. - Use just panic() instead of printf() and panic(). Print tid instead of pid, the fpu state is per-thread. Sponsored by: The FreeBSD Foundation MFC after: 1 week Notes: svn path=/head/; revision=271747
* Re-gen after r271743 implementing most ofBjoern A. Zeeb2014-09-185-19/+109
| | | | | | | | | | timer_{create,settime,gettime,getoverrun,delete}. MFC after: 3 days Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=271744
* Implement most of timer_{create,settime,gettime,getoverrun,delete}Bjoern A. Zeeb2014-09-183-10/+12
| | | | | | | | | | | | | | | | | for amd64/linux32. Fix the entirely bogus (untested) version from r161310 for i386/linux using the same shared code in compat/linux. It is unclear to me if we could support more clock mappings but the current set allows me to successfully run commercial 32bit linux software under linuxolator on amd64. Reviewed by: jhb Differential Revision: D784 MFC after: 3 days Sponsored by: DARPA, AFRL Notes: svn path=/head/; revision=271743
* Presence of any VM_PROT bits in the permission argument on x86 impliesKonstantin Belousov2014-09-171-1/+2
| | | | | | | | | | | | that the entry is readable and valid. Reported by: markj Submitted by: alc Tested by: pho (previous version), markj MFC after: 3 days Notes: svn path=/head/; revision=271716
* Add a sysctl to export the EFI memory map along with a handler in theJohn Baldwin2014-09-131-0/+20
| | | | | | | | | | | sysctl(8) binary to format it. Reviewed by: emaste MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D771 Notes: svn path=/head/; revision=271495
* Optimize the common case of injecting an interrupt into a vcpu after a HLTNeel Natu2014-09-123-1/+64
| | | | | | | | | | | | | | | | by explicitly moving it out of the interrupt shadow. The hypervisor is done "executing" the HLT and by definition this moves the vcpu out of the 1-instruction interrupt shadow. Prior to this change the interrupt would be held pending because the VMCS guest-interruptibility-state would indicate that "blocking by STI" was in effect. This resulted in an unnecessary round trip into the guest before the pending interrupt could be injected. Reviewed by: grehan Notes: svn path=/head/; revision=271451
* MFamd64: Use initializecpu() to set various model-specific registers onJohn Baldwin2014-09-101-1/+1
| | | | | | | | | | | | | | | | | AP startup and AP resume (it was already used for BSP startup and BSP resume). - Split code to do one-time probing of cache properties out of initializecpu() and into initializecpucache(). This is called once on the BSP during boot. - Move enable_sse() into initializecpu(). - Call initializecpu() for AP startup instead of enable_sse() and manually frobbing MSR_EFER to enable PG_NX. - Call initializecpu() when an AP resumes. In theory this will now properly re-enable PG_NX in MSR_EFER when resuming a PAE kernel on APs. Notes: svn path=/head/; revision=271409
* Create a separate structure for per-CPU state saved across suspend andJohn Baldwin2014-09-066-38/+29
| | | | | | | | | | | | resume that is a superset of a pcb. Move the FPU state out of the pcb and into this new structure. As part of this, move the FPU resume code on amd64 into a C function. This allows resumectx() to still operate only on a pcb and more closely mirrors the i386 code. Reviewed by: kib (earlier version) Notes: svn path=/head/; revision=271192
* Apply known workarounds for modern MacBooks.Pedro F. Giffuni2014-09-051-0/+2
| | | | | | | | | | | | | The legacy USB circuit tends to give trouble on MacBook. While the original report covered MacBook, extend the fix preemptively for the newer MacBookPro too. PR: 191693 Reviewed by: emaste MFC after: 5 days Notes: svn path=/head/; revision=271149
* Add mrsas(4) to GENERIC for i386 and amd64.Mark Johnston2014-09-041-0/+1
| | | | | | | | Approved by: ambrisko, kadesai MFC after: 3 days Notes: svn path=/head/; revision=271137
* Merge the amd64 and i386 identcpu.c into a single x86 implementation.John Baldwin2014-09-041-916/+0
| | | | | | | | This brings the structured extended features mask and VT-x reporting to i386 and Intel cache and TLB info (under bootverbose) to amd64. Notes: svn path=/head/; revision=271098
* Remove trailing whitespace.John Baldwin2014-09-041-8/+8
| | | | Notes: svn path=/head/; revision=271077
* - Move prototypes for various functions into out of C files and intoJohn Baldwin2014-09-043-11/+3
| | | | | | | | | | | | | <machine/md_var.h>. - Move some CPU-related variables out of i386/i386/identcpu.c to initcpu.c to match amd64. - Move the declaration of has_f00f_hack out of identcpu.c to machdep.c. - Remove a misleading comment from i386/i386/initcpu.c (locore zeros the BSS before it calls identify_cpu()) and remove explicit zero assignments to reduce the diff with amd64. Notes: svn path=/head/; revision=271076
* Update a comment to reflect the changes in r213408.Alan Cox2014-09-021-1/+1
| | | | | | | MFC after: 5 days Notes: svn path=/head/; revision=270961
* The "SUB" instruction used in getcc() actually does 'x -= y' so use theNeel Natu2014-08-301-42/+66
| | | | | | | | | | | | | | | proper constraint for 'x'. The "+r" constraint indicates that 'x' is an input and output register operand. While here generate code for different variants of getcc() using a macro GETCC(sz) where 'sz' indicates the operand size. Update the status bits in %rflags when emulating AND and OR opcodes. Reviewed by: grehan Notes: svn path=/head/; revision=270857
* Minor space/tab cleanups.Pedro F. Giffuni2014-08-301-5/+5
| | | | | | | | | | | | Most of them were ripped from the GSoC 2104 SMAP + kpatch project. This is only a cosmetic change. Taken from: Oliver Pinter (op@) MFC after: 5 days Notes: svn path=/head/; revision=270844
* - Add a new structure type for the ACPI 3.0 SMAP entry that includes theJohn Baldwin2014-08-292-0/+44
| | | | | | | | | | | | | | | | | | optional attributes field. - Add a 'machdep.smap' sysctl that exports the SMAP table of the running system as an array of the ACPI 3.0 structure. (On older systems, the attributes are given a value of zero.) Note that the sysctl only exports the SMAP table if it is available via the metadata passed from the loader to the kernel. If an SMAP is not available, an empty array is returned. - Add a format handler for the ACPI 3.0 SMAP structure to the sysctl(8) binary to format the SMAP structures in a readable format similar to the format found in boot messages. MFC after: 2 weeks Notes: svn path=/head/; revision=270828
* Implement the 0x2B SUB instruction, and the OR variant of 0x81.Peter Grehan2014-08-271-13/+91
| | | | | | | | | | Found with local APIC accesses from bitrig/amd64 bsd.rd, 07/15-snap. Reviewed by: neel MFC after: 3 days Notes: svn path=/head/; revision=270689
* Change __inline style to be consistent with FreeBSD usage,Peter Grehan2014-08-241-4/+4
| | | | | | | | | | | | and also fix gcc build (on STABLE, when MFCd). PR: 192880 Reviewed by: neel Reported by: ngie MFC after: 1 day Notes: svn path=/head/; revision=270438
* Add "hw.vmm.topology.threads_per_core" and "hw.vmm.topology.cores_per_package"Neel Natu2014-08-241-24/+77
| | | | | | | | | | | | | tunables to modify the default cpu topology advertised by bhyve. Also add a tunable "hw.vmm.topology.cpuid_leaf_b" to disable the CPUID leaf 0xb. This is intended for testing guest behavior when it falls back on using CPUID leaf 0x4 to deduce CPU topology. The default behavior is to advertise each vcpu as a core in a separate soket. Notes: svn path=/head/; revision=270437
* Fix a bug in the emulation of CPUID leaf 0x4 where bhyve was claiming thatNeel Natu2014-08-231-2/+2
| | | | | | | | | | the vcpu had no caches at all. This causes problems when executing applications in the guest compiled with the Intel compiler. Submitted by: Mark Hill (mark.hill@tidalscale.com) Notes: svn path=/head/; revision=270436
* Return the spurious interrupt vector (IRQ7 or IRQ15) if the atpic cannotNeel Natu2014-08-231-2/+8
| | | | | | | | | | | find any unmasked pin with an interrupt asserted. Reviewed by: tychon CR: https://reviews.freebsd.org/D669 MFC after: 1 week Notes: svn path=/head/; revision=270434
* Fix build of si(4) and enable it in LINT on amd64 and i386.John Baldwin2014-08-201-1/+1
| | | | Notes: svn path=/head/; revision=270224
* Bump MAXCPU on amd64 from 64 to 256. In practice APIC only permits 255John Baldwin2014-08-201-1/+1
| | | | | | | | | CPUs (IDs 0 through 254). Getting above that limit requires x2APIC. MFC after: 1 month Notes: svn path=/head/; revision=270223
* Increase max number of physical segments on amd64 to 63.Konstantin Belousov2014-08-201-1/+1
| | | | | | | | | | | | Eventually, the vmd_segs of the struct vm_domain should become bitset instead of long, to allow arbitrary compile-time selected maximum. Reviewed by: alc Sponsored by: The FreeBSD Foundation MFC after: 1 week Notes: svn path=/head/; revision=270202
* There exists a possible sequence of page table page allocation failuresAlan Cox2014-08-181-2/+3
| | | | | | | | | | | | | | starting with a superpage demotion by pmap_enter() that could result in a PV list lock being held when pmap_enter() is just about to return KERN_RESOURCE_SHORTAGE. Consequently, the KASSERT that no PV list locks are held needs to be replaced with a conditional unlock. Discussed with: kib X-MFC with: r269728 Sponsored by: EMC / Isilon Storage Division Notes: svn path=/head/; revision=270151
* Update i386/NOTES and amd64/NOTES files to contain the complete list ofGavin Atkinson2014-08-141-4/+17
| | | | | | | | | firmwares for iwn(4) and sort them. MFC after: 1 week Notes: svn path=/head/; revision=269992
* Reword comment to match the interrupt mode names from the MPtable spec.Neel Natu2014-08-141-7/+10
| | | | | | | Reviewed by: tychon Notes: svn path=/head/; revision=269989
* Use the max guest memory address when creating its iommu domain.Neel Natu2014-08-142-1/+21
| | | | | | | | | | Also, assert that the GPA being mapped in the domain is less than its maxaddr. Reviewed by: grehan Pointed out by: Anish Gupta (akgupt3@gmail.com) Notes: svn path=/head/; revision=269962
* Update the text of a KASSERT() to reflect the changes in r269728.Alan Cox2014-08-091-1/+1
| | | | Notes: svn path=/head/; revision=269759
* Change pmap_enter(9) interface to take flags parameter and superpageKonstantin Belousov2014-08-081-7/+17
| | | | | | | | | | | | | | | | | | | mapping size (currently unused). The flags includes the fault access bits, wired flag as PMAP_ENTER_WIRED, and a new flag PMAP_ENTER_NOSLEEP to indicate that pmap should not sleep. For powerpc aim both 32 and 64 bit, fix implementation to ensure that the requested mapping is created when PMAP_ENTER_NOSLEEP is not specified, in particular, wait for the available memory required to proceed. In collaboration with: alc Tested by: nwhitehorn (ppc aim32 and booke) Sponsored by: The FreeBSD Foundation and EMC / Isilon Storage Division MFC after: 2 weeks Notes: svn path=/head/; revision=269728
* Support PCI extended config space in bhyve.Neel Natu2014-08-081-0/+23
| | | | | | | | | | | | | | | | | | Add the ACPI MCFG table to advertise the extended config memory window. Introduce a new flag MEM_F_IMMUTABLE for memory ranges that cannot be deleted or moved in the guest's address space. The PCI extended config space is an example of an immutable memory range. Add emulation for the "movzw" instruction. This instruction is used by FreeBSD to read a 16-bit extended config space register. CR: https://phabric.freebsd.org/D505 Reviewed by: jhb, grehan Requested by: tychon Notes: svn path=/head/; revision=269700
* Merge all MD sf_buf allocators into one MI, residing in kern/subr_sfbuf.cGleb Smirnoff2014-08-051-21/+2
| | | | | | | | | | | | | | | | | | The MD allocators were very common, however there were some minor differencies. These differencies were all consolidated in the MI allocator, under ifdefs. The defines from machine/vmparam.h turn on features required for a particular machine. For details look in the comment in sys/sf_buf.h. As result no MD code left in sys/*/*/vm_machdep.c. Some arches still have machine/sf_buf.h, which is usually quite small. Tested by: glebius (i386), tuexen (arm32), kevlo (arm32) Reviewed by: kib Sponsored by: Netflix Sponsored by: Nginx, Inc. Notes: svn path=/head/; revision=269577
* Retire pmap_change_wiring(). We have never used it to wire virtual pages.Alan Cox2014-08-031-52/+0
| | | | | | | | | | | We continue to use pmap_enter() for that. For unwiring virtual pages, we now use pmap_unwire(), which unwires a range of virtual addresses instead of a single virtual page. Sponsored by: EMC / Isilon Storage Division Notes: svn path=/head/; revision=269485
* - Output a summary of optional VT-x features in dmesg similar to CPUJohn Baldwin2014-07-304-30/+226
| | | | | | | | | | | | | | | features. If bootverbose is enabled, a detailed list is provided; otherwise, a single-line summary is displayed. - Add read-only sysctls for optional VT-x capabilities used by bhyve under a new hw.vmm.vmx.cap node. Move a few exiting sysctls that indicate the presence of optional capabilities under this node. CR: https://phabric.freebsd.org/D498 Reviewed by: grehan, neel MFC after: 1 week Notes: svn path=/head/; revision=269281
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