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* arm: Remove support for Armv6 CPU coresAndrew Turner2024-09-111-65/+1
| | | | | | | | The ARM1176 is an Armv6 CPU. As Armv6 support has been removed we can also remove ARM1176 support. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45958
* sys: Automated cleanup of cdefs and other formattingWarner Losh2023-11-271-1/+1
| | | | | | | | | | | | | | | | Apply the following automated changes to try to eliminate no-longer-needed sys/cdefs.h includes as well as now-empty blank lines in a row. Remove /^#if.*\n#endif.*\n#include\s+<sys/cdefs.h>.*\n/ Remove /\n+#include\s+<sys/cdefs.h>.*\n+#if.*\n#endif.*\n+/ Remove /\n+#if.*\n#endif.*\n+/ Remove /^#if.*\n#endif.*\n/ Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/types.h>/ Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/param.h>/ Remove /\n+#include\s+<sys/cdefs.h>\n#include\s+<sys/capsicum.h>/ Sponsored by: Netflix
* uma: Make the cache alignment mask unsignedOlivier Certner2023-11-021-3/+3
| | | | | | | | | | | | | In uma_set_align_mask(), ensure that the passed value doesn't have its highest bit set, which would lead to problems since keg/zone alignment is internally stored as signed integers. Such big values do not make sense anyway and indicate some programming error. A future commit will introduce checks for this case and other ones. Reviewed by: kib, markj MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D42262
* arm: Simplify get_cachetype_cp15()Olivier Certner2023-11-021-4/+3
| | | | | | | | | | There's no point in setting 'arm_dcache_align_mask' before the function's end. Reviewed by: markj, kib MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D42261
* uma: Hide 'uma_align_cache'; Create/rename accessorsOlivier Certner2023-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Create the uma_get_cache_align_mask() accessor and put it in a separate private header so as to minimize namespace pollution in header/source files that need only this function and not the whole 'uma.h' header. Make sure the accessors have '_mask' as a suffix, so that callers are aware that the real alignment is the power of two that is the mask plus one. Rename the stem to something more explicit. Rename uma_set_cache_align_mask()'s single parameter to 'mask'. Hide 'uma_align_cache' to ensure that it cannot be set in any other way then by a call to uma_set_cache_align_mask(), which will perform sanity checks in a further commit. While here, rename it to 'uma_cache_align_mask'. This is also in preparation for some further changes, such as improving the sanity checks, eliminating internal resolving of UMA_ALIGN_CACHE and changing the type of the 'uma_cache_align_mask' variable. Reviewed by: markj, kib MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D42258
* sys: Remove $FreeBSD$: one-line .c patternWarner Losh2023-08-161-2/+0
| | | | Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
* get_cachetype_cp15: eliminate write only multilierWarner Losh2022-04-051-2/+0
| | | | Sponsored by: Netflix
* Remove unused functions and variables in cpufunc.[ch].Michal Meloun2020-12-141-61/+3
| | | | Notes: svn path=/head/; revision=368635
* Remove remaining fragments of code for older already ceased ARM versions.Michal Meloun2020-11-291-179/+0
| | | | Notes: svn path=/head/; revision=368154
* Remove remaining support of big endian byte order.Michal Meloun2020-11-291-3/+0
| | | | | | | Big endian support was ceased by removing ARMv4 sub architecture. Notes: svn path=/head/; revision=368153
* Remove now unused armv4 and not-INTRNG files.Michal Meloun2020-11-281-3/+0
| | | | Notes: svn path=/head/; revision=368126
* arm: clean up empty lines in .c and .h filesMateusz Guzik2020-09-011-3/+0
| | | | Notes: svn path=/head/; revision=365068
* Use the cp15 functions to read cp15 registers rather than using assemblyAndrew Turner2018-07-281-6/+4
| | | | | | | | functions. The former are static inline functions so will compile to a single instruction. Notes: svn path=/head/; revision=336834
* Remove some write only global values from the arm cpufunc code.Andrew Turner2018-07-281-11/+0
| | | | Notes: svn path=/head/; revision=336831
* Make the arm cpu setup functions static. Any other place that needs theseAndrew Turner2018-07-281-5/+17
| | | | | | | functions will use the function pointer we create for them. Notes: svn path=/head/; revision=336828
* Remove old CPU_ values from the arm cpufunc code. These have been removed.Andrew Turner2018-07-281-408/+2
| | | | Notes: svn path=/head/; revision=336826
* Revert r336773: it removed too much.Warner Losh2018-07-271-1/+201
| | | | | | | | | | r336773 removed all things xscale. However, some things xscale are really armv5. Revert that entirely. A more modest removal will follow. Noticed by: andrew@ Notes: svn path=/head/; revision=336783
* Remove xscale supportWarner Losh2018-07-271-201/+1
| | | | | | | | | | | | | The OLD XSCALE stuff hasn't been useful in a while. The original committer (cognet@) was the only one that had boards for it. He's blessed this removal. Newer XSCALE (GUMSTIX) is for hardware that's quite old. After discussion on arm@, it was clear there was no support for keeping it. Differential Review: https://reviews.freebsd.org/D16313 Notes: svn path=/head/; revision=336773
* Remove kernel support for armebWarner Losh2018-07-171-23/+5
| | | | | | | | | | Remove all the big-endian arm architectures (ixp425 and ixp435) support in the kernel and associated drivers. Differential Revision: https://reviews.freebsd.org/D16257 Notes: svn path=/head/; revision=336436
* sys/arm: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-271-0/+2
| | | | | | | | | | | | | | | Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Notes: svn path=/head/; revision=326258
* Remake support for SMP kernel on UP cpu:Michal Meloun2017-02-021-8/+8
| | | | | | | | | | | | | | | | | - Use new option SMP_ON_UP instead of (mis)using specific CPU type. By this, any SMP kernel can be compiled with SMP_ON_UP support. - Enable runtime detection of CPU multiprocessor extensions only if SMP_ON_UP option is used. In other cases (pure SMP or UP), statically compile only required variant. - Don't leak multiprocessor instructions to UP kernel. - Correctly handle data cache write back to point of unification. DCCMVAU is supported on all armv7 cpus. - For SMP_ON_UP kernels, detect proper TTB flags on runtime. Differential Revision: https://reviews.freebsd.org/D9133 Notes: svn path=/head/; revision=313090
* Remove arm's cpuconf.h, and references to it, after moving a few lines fromIan Lepore2017-01-161-1/+0
| | | | | | | | | | | | | | | | it into pmap-v4.h where they are used. Other than those few lines of support for different MMU types, nothing in cpuconf.h has been used in our code for quite a while. The file existed to set up a variety of symbols to describe the architecture. Over the past few years we have converted all of our source to use the new architecture symbols standardized by ARM Inc, and predefined by both clang and gcc. PR: 216104 Notes: svn path=/head/; revision=312292
* Add the missing void to function signatures in much of the arm code.Andrew Turner2016-12-131-2/+2
| | | | | | | Sponsored by: ABT Systems Ltd Notes: svn path=/head/; revision=310021
* ARM: Remove next bunch of unused cpu_functions from ARMv6.Michal Meloun2016-10-051-12/+0
| | | | Notes: svn path=/head/; revision=306704
* Split CPU_CORTEXA into CPU_CORTEXA8, for the Cortex-A8, and CPU_CORTEXA_MP,Andrew Turner2016-10-041-8/+8
| | | | | | | | | | | | | | for later Cortex-A CPUs that support the Multiprocessor Extensions. This will be needed to support both in a single GENERIC kernel while still being able to only build for a single SoC. Reviewed by: mmel Relnotes: yes Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D8138 Notes: svn path=/head/; revision=306672
* Use the cortex functions when booting on one of the Cortex-A ARMv8 CPUs.Andrew Turner2016-10-031-0/+3
| | | | | | | | | | | This list is incomplete, however we don't have the ID values for the missing Cortex-A32 or A35. Submitted by: loos (Cortex-A53) Sponsored by: ABT Systems Ltd Notes: svn path=/head/; revision=306656
* Remove the parts of cpu_functions from armv6 that are unused on thatAndrew Turner2016-10-031-59/+0
| | | | | | | | | architecture. Sponsored by: ABT Systems Ltd Notes: svn path=/head/; revision=306641
* Use C99 designated initializers to create the armv6 cpu_functions structs.Andrew Turner2016-10-031-102/+73
| | | | | | | | | This will help with a later cleanup of what functions we implement. Sponsored by: ABT Systems Ltd Notes: svn path=/head/; revision=306631
* Start to clean MIDR values using the CPUID scheme. We don't need to knowAndrew Turner2016-06-071-16/+10
| | | | | | | | | | | | the exact CPU we are running on to set the cpu functions. Relax the check to ignore the CPU revision. Even so this may still be too specific. Reviewed by: mmel Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D6504 Notes: svn path=/head/; revision=301561
* Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn'tIan Lepore2016-05-251-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | have ACLE support built in. The ACLE (ARM C Language Extensions) defines a set of standardized symbols which indicate the architecture version and features available. ACLE support is built in to modern compilers (both clang and gcc), but absent from gcc prior to 4.4. ARM (the company) provides the acle-compat.h header file to define the right symbols for older versions of gcc. Basically, acle-compat.h does for arm about the same thing cdefs.h does for freebsd: defines standardized macros that work no matter which compiler you use. If ARM hadn't provided this file we would have ended up with a big #ifdef __arm__ section in cdefs.h with our own compatibility shims. Remove #include <machine/acle-compat.h> from the zillion other places (an ever-growing list) that it appears. Since style(9) requires sys/types.h or sys/param.h early in the include list, and both of those lead to including cdefs.h, only a couple special cases still need to include acle-compat.h directly. Loves it: imp Notes: svn path=/head/; revision=300694
* Use the new(-ish) CP15_SCTLR macro to generate system control reg accessesIan Lepore2016-05-231-1/+1
| | | | | | | | | | | | where possible. In the places that doesn't work (multi-line inline asm, and places where the old armv4 cpufuncs mechanism is used), annotate the accesses with a comment that includes SCTLR. Now a grep -i sctlr can find all the system control register manipulations. No functional changes. Notes: svn path=/head/; revision=300533
* The cpu_reset_needs_v4_MMU_disable variable is only used in locore-v4.S,Andrew Turner2016-03-021-3/+4
| | | | | | | | | only define it when building for ARMv5 or prior. Sponsored by: ABT Systems Ltd Notes: svn path=/head/; revision=296313
* ARM: For ARMv6/v7, code in locore.S initializes SCTLR and ACTRL registers.Michal Meloun2016-02-041-112/+0
| | | | | | | Don't duplicate this initialization in cpu_setup(). Notes: svn path=/head/; revision=295259
* ARM: Don't use ugly (and hidden) global variable, control register isMichal Meloun2016-02-041-9/+0
| | | | | | | readable at any time. Notes: svn path=/head/; revision=295252
* ARM: Replace only once used cpu_icache_sync_all() by ranged equivalent.Michal Meloun2016-02-031-9/+0
| | | | | | | Remove it from cpu_functions table. Notes: svn path=/head/; revision=295207
* ARM: Remove support for xscale i80219 and i80321 CPUs. We haven't singleMichal Meloun2016-02-031-36/+8
| | | | | | | supported config/board with these CPUs. Notes: svn path=/head/; revision=295200
* ARM: All remaining functions in cpufunc_asm_arm10.S are identical withMichal Meloun2016-02-021-4/+4
| | | | | | | | functions in cpufunc_asm_arm9.S. Use arm9 variants and remove cpufunc_asm_arm10.S completly. Notes: svn path=/head/; revision=295149
* ARM: Remove last unused function, cpu_flush_prefetchbuf(),Michal Meloun2016-02-021-9/+0
| | | | | | | from cpu_functions table. Notes: svn path=/head/; revision=295145
* ARM: Rename remaining instances of cpufunc_id() to cpu_ident(),Michal Meloun2016-02-011-2/+0
| | | | | | | | forgotten in r295096. Remove tlb_flushI/tlb_flushI_SE functions forgotten in r295122. Notes: svn path=/head/; revision=295123
* ARM: Remove never used cpu_tlb_flushI and cpu_tlb_flushI_SE() functionsMichal Meloun2016-02-011-16/+0
| | | | | | | and their implementations. Notes: svn path=/head/; revision=295122
* ARM: cpufunc_domains, cpufunc_faultstatus and cpufunc_faultaddressMichal Meloun2016-01-311-39/+3
| | | | | | | | functions are equal for all ARM variants. Remove them from cpu_functions table. Notes: svn path=/head/; revision=295096
* ARM: Next round of cpufunc.* cleaning. Nobody uses flush_brnchtgt* functions,Michal Meloun2016-01-311-18/+0
| | | | | | | delete them. Notes: svn path=/head/; revision=295095
* ARM: First round of cpufunc.* cleaning. All abort_fixup functions areMichal Meloun2016-01-311-48/+0
| | | | | | | not currently used or defined. Delete them. Notes: svn path=/head/; revision=295092
* Retire pmap_pte_init_mmu_v6() which was used by old pmap-v6.Svatopluk Kraus2016-01-291-6/+0
| | | | Notes: svn path=/head/; revision=295049
* ARM: Add support for new KRAIT 300 CPU revision.Michal Meloun2015-11-281-1/+2
| | | | | | | Approved by: kib (mentor) Notes: svn path=/head/; revision=291425
* Set the correct values in the arm aux control register, based on chip type.Ian Lepore2015-10-191-1/+1
| | | | | | | | | | | | | The bits in the aux control register vary based on the processor type. In the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits, which worked fine for the first few SoCs we supported. Now that we support most of the cortex-a series processors, it's important to get the right bits set based on the processor type. Submitted by: Svatopluk Kraus <onwahe@gmail.com> Notes: svn path=/head/; revision=289602
* The Broadcom BCM56060 chip has a Cortex-A9R4 core.Marcel Moolenaar2015-08-131-0/+1
| | | | | | | | | Submitted by: Steve Kiernan <stevek@juniper.net> Reviewed by: imp@ Differential Revision: https://reviews.freebsd.org/D3357 Notes: svn path=/head/; revision=286725
* Remove trailing whitespace from sys/arm/armAndrew Turner2015-05-241-50/+50
| | | | Notes: svn path=/head/; revision=283366
* Add more cp15_ functions, and use them in cpufunc.c where possible.Andrew Turner2015-05-241-30/+12
| | | | Notes: svn path=/head/; revision=283365
* It appears to be armv7_sleep is a duplication of armv7_cpu_sleep.Ganbold Tsagaankhuu2015-05-151-1/+1
| | | | | | | | | | | | For consistency with the naming conventions used by the other implementations kill armv7_sleep and keep armv7_cpu_sleep. Differential Revision: https://reviews.freebsd.org/D2537 Submitted by: John Wehle Reviewed by: ian@, andrew@ Notes: svn path=/head/; revision=282934
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