src - FreeBSD source tree

	Commit message (Collapse)	Author	Age	Files	Lines
*	Remove some prototypes for undefined functions.	Mark Johnston	2014-05-15	1	-2/+0
\| \| \| \| \| \| \|	MFC after: 3 days Notes: svn path=/head/; revision=266195
*	- Add support for the Intel Sandy Bridge microarchitecture (both core and ↵	Davide Italiano	2012-03-01	1	-0/+2
\| \| \| \| \| \| \| \| \| \| \| \| \| \|	uncore counting events) - New manpages with event lists. - Add MSRs for the Intel Sandy Bridge microarchitecture Reviewed by: attilio, brueffer, fabient Approved by: gnn (mentor) MFC after: 3 weeks Notes: svn path=/head/; revision=232366
*	Clean up a switch statement for uncore events on Westmere processors.	George V. Neville-Neil	2012-01-13	1	-1/+0
\| \| \| \| \| \| \| \| \|	Submitted by: Davide Italiano Reviewed by: gnn MFC after: 1 week Notes: svn path=/head/; revision=230063
*	Add missing MSR programming for some events.	Fabien Thomas	2012-01-04	1	-0/+7
\| \| \| \| \| \| \| \|	Submitted by: Davide Italiano <davide.italiano@gmail.com> MFC after: 3 days Notes: svn path=/head/; revision=229469
*	- Support for uncore counting events: one fixed PMC with the uncore	Fabien Thomas	2010-04-02	1	-0/+120
	domain clock, 8 programmable PMC. - Westmere based CPU (Xeon 5600, Corei7 980X) support. - New man pages with events list for core and uncore. - Updated Corei7 events with Intel 253669-033US December 2009 doc. There is some removed events in the documentation, they have been kept in the code but documented in the man page as obsolete. - Offcore response events can be setup with rsp token. Sponsored by: NETASQ Notes: svn path=/head/; revision=206089