| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
| |
macro names, rename val4 to val, and m4 to md.
No functional change.
MFC after: 2 weeks
Notes:
svn path=/head/; revision=267918
|
|
|
|
|
|
|
|
|
| |
future for nf10bmac(4). Also, add support for and enable RX interrupts.
MFC after: 2 weeks
Notes:
svn path=/head/; revision=265766
|
|
|
|
|
|
|
|
|
|
|
| |
on NetFPGA-10G, assign one to the interface by default in a very
similar way.
MFC after: 6 days
X-Easter-Egg-Hunt: yes
Notes:
svn path=/head/; revision=264646
|
|
NetFPGA-10G Embedded CPU Ethernet Core.
The current version operates on a simple PIO based interface connected
to a NetFPGA-10G port.
To avoid confusion: this driver operates on a CPU running on the FPGA,
e.g. BERI/mips, and is not suited for the PCI host interface.
MFC after: 1 week
Relnotes: yes
Sponsored by: DARPA/AFRL
Notes:
svn path=/head/; revision=264601
|