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* uart: Add ns8250 ACPI entry for SPCR rev 2Colin Percival2026-02-081-0/+1
| | | | | | | | | | | | This is an MFC "in spirit" of a685a263b803; the code in this area has been significantly restructured between 14.x and 15.x, but the general concept of adding ACPI_DBG2_16550_WITH_GAS (aka 0x12) as a recognized flavour of ns8250 UART which can be configured via SPCR remains. Reviewed by: imp Tested by: David Woodhouse Sponsored by: Amazon Differential Revision: https://reviews.freebsd.org/D55173
* ns8250: use LSR_THRE instead of LSR_TEMT for checking tx flushAndriy Gapon2025-06-271-2/+2
| | | | | | | | | | LSR_TEMT bit is set if both transmit hold and shift registers are empty, but the flush command flushes only the hold register. While here, update the diagnostic message to report which registers could not be flushed. (cherry picked from commit 0d2fd5b99c95329085d0700a4dd38507a054a50d)
* uart: Add support for Brainboxes / Intashield serial cards.Yoshihiro Takahashi2025-01-111-0/+14
| | | | | | | PR: 283226 Reported by: Cameron Williams (cherry picked from commit 41b30bbc1a57b60afee9acdd6ad240c92ef13790)
* dev/uart: Add APMC0D08 as found in the Intel E2100Andrew Turner2024-09-021-0/+1
| | | | | | | | | | | | This uart has the requirement for 32-bit sized and aligned memory accesses. It is also described in the Serial Port Console Redirection Table (SPCR) with a different interface type value. Reviewed by: imp Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45834 (cherry picked from commit 9840598aa31f2a89272f5bef6545e316f254f0c6)
* uart: Split out initilisation of the acpi devinfoAndrew Turner2024-09-021-37/+49
| | | | | | | | | | | | Split out the common parts of building the uart devinfo from ACPI tables from the SPCR parser. This will be used when we support the DBG2 table to find the debug uart to be used by the kernel gdb stub. Reviewed by: imp Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D44357 (cherry picked from commit 473c0b44ae8c51b2aebc51887714b2ed14de50bf)
* uart: Use device_set_descf()Mark Johnston2024-06-092-6/+2
| | | | | | | | No functional change intended. MFC after: 1 week (cherry picked from commit 66d2d42a1f26a6ef868d7d46f87d6fad0bc099aa)
* Add support for Intel Atom S1200 UARTHenrich Hartzer2024-04-241-0/+2
| | | | | | | | | PR: 278316 Signed-off-by: Henrich Hartzer <henrichhartzer@tuta.io> Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/1164 (cherry picked from commit 1f2776e123603042944aad9f41ceb46b5b28d8ae)
* dev/uart: Support 8-byte register accessAndrew Turner2024-02-191-1/+11
| | | | | | | | | | | | | | | | While we only support 4-byte registers in the uart code the physical access may be to an 8-byte register. Support this as an option on non-i386. On i386 we lack the needed 8-byte bus_space functions. ACPI has an option for 8-byte register io width, and FDT can be given any size. Support these sizes, even if we don't expect to see hardware with an 8-byte io width. Reviewed by: imp Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D43374 (cherry picked from commit a9fc9d6d15f006feb6d7ddb036e020d5f9d19fce)
* uart(4): Honor hardware state of NS8250-class for tsw_busyMarius Strobl2024-01-186-3/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | In 9750d9e5, I brought the equivalent of the TS_BUSY flag back in a mostly hardware-agnostic way in order to fix tty_drain() and, thus, TIOCDRAIN for UARTs with TX FIFOs. This proved to be sufficient for fixing the regression reported. So in light of the release cycle of FreeBSD 10.3, I decided that this change was be good enough for the time being and opted to go with the smallest possible yet generic (for all UARTs driven by uart(4)) solution addressing the problem at hand. However, at least for the NS8250-class the above isn't a complete fix as these UARTs only trigger an interrupt when the TX FIFO became empty. At this point, there still can be an outstanding character left in the transmit shift register as indicated via the LSR. Thus, this change adds the 3rd (besides the tty(4) and generic uart(4) bits) part I had in my tree ever since, adding a uart_txbusy method to be queried in addition for tsw_busy and hooking it up as appropriate for the NS8250-class. As it turns out, the exact equivalent of this 3rd part later on was implemented for uftdi(4) in 9ad221a5. While at it, explain the rational behind the deliberately missing locking in uart_tty_busy() (also applying to the generic sc_txbusy testing already present). (cherry picked from commit 353e4c5a068d06b0d6dcfa9eb736ecb16e9eae45)
* sys: Remove $FreeBSD$: one-line sh patternWarner Losh2023-08-161-1/+0
| | | | Remove /^\s*#[#!]?\s*\$FreeBSD\$.*$\n/
* sys: Remove $FreeBSD$: one-line .c patternWarner Losh2023-08-1626-52/+0
| | | | Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/
* sys: Remove $FreeBSD$: two-line .h patternWarner Losh2023-08-1611-22/+0
| | | | Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
* spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSDWarner Losh2023-05-1224-24/+24
| | | | | | | | | The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch up to that fact and revert to their recommended match of BSD-2-Clause. Discussed with: pfg MFC After: 3 days Sponsored by: Netflix
* Revert "uart(4): add Sunrise Point UART controllers"Kyle Evans2023-05-091-2/+0
| | | | | | | | | | This reverts commit d1b6271118188dd25a18f2372ab1d3004335ea3c. I've received multiple reports of machines failing to boot with this hardware; back it out for now until we can fix it. PR: 271147 MFC after: Morning coffee
* Use bool for one-bit wide bit-fieldsDimitry Andric2023-04-251-10/+10
| | | | | | | | | | | | A signed one-bit wide bit-field can take only the values 0 and -1. Clang 16 introduced a warning that "implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1". Fix the warnings by using C99 bool. Reported by: Clang 16 Reviewed by: emaste, jhb MFC after: 3 days Differential Revision: https://reviews.freebsd.org/D39705
* uart(4): add Sunrise Point UART controllersKyle Evans2023-04-141-0/+2
| | | | | Sponsored by: Zenith Electronics LLC Sponsored by: Klara, Inc.
* uart: Don't change settings or throttle putc for Hyper-VWei Hu2023-03-181-7/+13
| | | | | | | | | | | | | | | | Azure setup does not like it when FreeBSD overrides the settings of the UART device. When Hyper-V is detected, don't do this and also don't throttle putc() output. This is a workaround for the early boot hang of FreeBSD on Azure. Tested on Azure, ESXi (VM with serial port), and SG-8200 PR: 264267 Reviewed by: kevans, whu Tested by: whu Obtained from: Rubicon Communications, LLC (Netgate) MFC after: 2 weeks Sponsored by: Rubicon Communications, LLC (Netgate)
* Add support for the new Arm Generic UART _HIDAndrew Turner2022-12-221-2/+2
| | | | | | | | | | | Historically the ACPI _HID for both the Arm PL011 and Generic UARTs was ARMH0011. In the Arm Base Boot Requirements 2.0 the Generic UART _HID is changed to ARMHB000. Use this new value in the PL011 driver where we support both UART types. This has been observed in some recent EDK2 builds. Sponsored by: Arm Ltd
* uart(4): Add support for AMT virtual serial port (C610/X99 series)Stuart McLaren2022-12-201-0/+2
| | | | | PR: 267053 MFC after: 3 days
* ns8250: Fix sense of LSR_TEMT FCR checkColin Percival2022-10-281-1/+1
| | | | | | | | | When flushing the UART, we need to drain manually if LSR_TEMT is *not* asserted, aka. if the transmit FIFO is not empty. Reported by: void <void@f-m.fm> Fixes: c4b68e7e53bb "ns8250: Check if flush via FCR succeeded" Differential Revision: https://reviews.freebsd.org/D37185
* ns8250: Check if flush via FCR succeededColin Percival2022-10-181-0/+19
| | | | | | | | | | | | | The emulated UART in the Firecracker VMM (aka the implementation in the rust-vmm/vm-superio project) includes FIFOs but does not implement the FCR register, which is used by ns8250_flush to flush the FIFOs. Check the LSR to see if there is still data in the FIFOs and call ns8250_drain if necessary. Discussed with: emaste, imp, jrtc27 Sponsored by: https://patreon.com/cperciva Differential Revision: https://reviews.freebsd.org/D36979
* Downgrade tty_intr_event from a globalMitchell Horne2022-10-121-0/+3
| | | | | | | | | | It can be static within uart_tty.c. It is an open question whether there remains any real benefit to having uart instances share a swi thread. Reviewed by: imp, markj, jhb MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D36938
* ns8250_drain: Drain without DELAY firstColin Percival2022-10-081-3/+10
| | | | | | | | | | | | | | | | In virtual machines with virtual UARTs which have fictitious baud rates, it may be possible to drain the receive queue very quickly, without needing to DELAY after each character. Attempt to read (and discard) the receive queue as fast as possible, stopping for a DELAY only when LSR_RXRDY is no longer asserted; assume that we have finished draining the queue when LSR_RXRDY is asserted both before and after a DELAY. This speeds up the boot process in FreeBSD/Firecracker by 27 ms. Reviewed by: imp, jrtc27 Sponsored by: https://www.patreon.com/cperciva Differential Revision: https://reviews.freebsd.org/D36184
* uart_dev_snps: Fix device probingKornel Dulęba2022-10-061-2/+2
| | | | | | | | | | | | | | The "uart_bus_probe" function is used as a generic part of uart probe logic. It returns a driver priority(negative number) if successful and an error code otherwise. Fix the error checking condition to account for that. Also, while here return "BUS_PROBE_VENDOR", instead of "0". This fixes uart on clearfog pro with recent DT. PR: 266657 Reviewed by: mw Obtained from: Semihalf Differential Revision: https://reviews.freebsd.org/D36880
* uart: Remove sbbc referenceWarner Losh2022-10-011-1/+0
| | | | | | sbbc support is for sparc64 only, which was removed in 58aa35d42975. Sponsored by: Netflix
* arm: Catch up with Samsung S3C2xx0 code removalWarner Losh2022-10-012-4/+0
| | | | | | | The code backing these uart_class was removed 7 years ago in 4648ee952520. Sponsored by: Netflix
* uart: uart_cpu_arm64: fix the build without FDTKyle Evans2022-09-291-21/+31
| | | | | | | | | | clang 14 doesn't properly determine that we're unconditionally returning if we have ACPI but not FDT. Push FDT setup entirely into a new function, much like we currently do with ACPI, and just return ENXIO if that doesn't succeed. Reviewed by: andrew, manu (earlier version) Differential Revision: https://reviews.freebsd.org/D36788
* uart_bus_acpi: Read clock frequency from busMateusz Kozyra2022-09-071-9/+19
| | | | | | | | | | | | It is stored in the clock-frequency property. In case of failure, fallback to the harcoded value stored in the compat data. Also, while here improve style. Tested on LS1046ARDB and x86 PC. Reviewed by: mw Obtained from: Semihalf Differential Revision: https://reviews.freebsd.org/D36326
* uart: Add ACPI entry for LS1046A UARTMateusz Kozyra2022-08-221-0/+1
| | | | | | | | | | | | NXP defines unique name for LS1046A UART - "NXP0018". It is ns8250 compatible, adding a new uart compat data entry is enough to make it work. Tested on LS1046ARDB. Approved by: mw(mentor) Reviewed by: mw, kd Obtained from: Semihalf Differential Revision: https://reviews.freebsd.org/D36260
* uart: Don't check SPCR tables if !late_consoleColin Percival2022-07-141-2/+8
| | | | | | | | | | | | | | | | On x86 systems, the debug.late_console tunable makes it possible to set up the console before we call pmap_bootstrap. (The tunable is turned on by default; setting late_console=0 results in consoles being probed early.) Unfortunately this is not compatible with using the ACPI SPCR table to find the console, since consulting ACPI tables requires mapping memory addresses. As such, we skip the call to uart_cpu_acpi_spcr from uart_cpu_x86 in the !late_console case. Reviewed by: imp Sponsored by: https://www.patreon.com/cperciva Differential Revision: https://reviews.freebsd.org/D35794
* Remove unused uart_devclass.John Baldwin2022-05-069-10/+8
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* uart: plug a set-but-not-used varMateusz Guzik2022-04-191-0/+2
| | | | Sponsored by: Rubicon Communications, LLC ("Netgate")
* uart_dev_lowrisc: Remove unused variables in stub functions.John Baldwin2022-04-121-6/+0
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* uart_mu: Remove unused variables.John Baldwin2022-04-091-4/+0
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* quicc_bus_setsig: eliminate write only variable basWarner Losh2022-04-051-2/+0
| | | | Sponsored by: Netflix
* uart(4): Add a concept of "unique" serial devicesColin Percival2022-03-313-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FreeBSD detects serial ports twice: First, very early in the boot process, in order to obtain a usable console; and second, during the device probe/attach process. When a UART is discovered during device probing, FreeBSD attempts to determine whether it is a device which was already being used as a console; without this, the console doesn't work in userland. Unfortunately it's possible for a UART to be mapped to a different location in memory when it is discovered on a bus than it has when it is announced via the ACPI SPCR table; this breaks the matching process, which relies on comparing bus addresses. To address this, we introduce a concept of "unique" serial devices, i.e. devices which are guaranteed to be present *only once* on any system. If we discover one of these during device probing, we can match it to a same-PCI-vendor-and-device-numbers console which was announced via the ACPI SPCR table, regardless of the differing bus addresses. At present, the only unique serial device is the "Amazon PCI serial device" (vendor 0x1d0f, device 0x8250) found in some EC2 instances. This unbreaks the serial console on those systems. Reviewed by: imp MFC after: 3 days Sponsored by: https://www.patreon.com/cperciva Differential Revision: https://reviews.freebsd.org/D34703
* uart_dev_snps: Make ext_resources non-optionalEmmanuel Vadot2022-02-211-18/+0
| | | | | | | | EXT_RESOURCES have been introduced in 12-CURRENT and all supported releases have it enabled in their kernel config. MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D33828
* uart_dev_imx: Make ext_resources non-optionalEmmanuel Vadot2022-02-211-1/+1
| | | | | | | | EXT_RESOURCES have been introduced in 12-CURRENT and all supported releases have it enabled in their kernel config. MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D33826
* uart: Remove CTLFLAG_NEEDGIANT from sysctl.Alexander Motin2021-12-261-1/+1
| | | | MFC after: 2 weeks
* uart: Match simple commWarner Losh2021-09-301-0/+15
| | | | | | | | | | | | Match the PCI simple comm devices (or try to). Be conservative and use legacy interrupts rather than msi messages by default for this 'catch all' since it matches what Linux does (it has opt-in generally for MSI, but also matches more devices because it does a catch-all like implemented in this commit). Sponsored by: Netflix Reviewed by: kbowling Differential Revision: https://reviews.freebsd.org/D32228
* uart: Allow PCI quirk for not using MSI interruptsWarner Losh2021-09-301-3/+11
| | | | | | | | | Some setups claim to have one MSI, but they don't actually work. Allow these to be flagged. Sponsored by: Netflix Reviewed by: kbowling Differential Revision: https://reviews.freebsd.org/D32229
* uart: Add PCI ID for intel 100 Series/C230 Series AMTSean Bruno2021-09-251-0/+2
| | | | | | Reviewed by: kib Tested by: kbowling Differential Revision: https://reviews.freebsd.org/D32146
* Remove "All Rights Reserved" from FreeBSD Foundation sys/ copyrightsEd Maste2021-08-085-5/+0
| | | | | | | These ones were unambiguous cases where the Foundation was the only listed copyright holder (in the associated license block). Sponsored by: The FreeBSD Foundation
* uart: Fix an out-of-bounds read in ns8250_bus_probe()Mark Johnston2021-07-131-3/+2
| | | | | | | | | | | | | | | | | | | | | | The problem is that ns8250_bus_probe() accesses a field from the ns8250_softc, which embeds the generic UART softc, but the ns8250_softc hasn't yet been allocated because we're still probing. This is a regression from commit 0aefb0a63c50. This fixed a problem where one of the upper four IER bits, which are usually reserved, needs to be set in order to get RX interrupts before the RX FIFO is full. At the same time, we avoid clearing those reserved bits (see commit 58957d87173, though other UART drivers I looked at do not bother with this). So, copy what ns8250_init() does to disable interrupts, since we don't know what the "right" mask is at this point. Reported by: syzbot+f256beefd0df9eb796e7@syzkaller.appspotmail.com Reviewed by: imp MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D31124
* uart_dev_ns8250: Switch ACPI UART subtype for Marvell SoCsMarcin Wojtas2021-06-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | DBG2 ACPI table description [1] specifies three subtypes related to 16550 UART: 0x0 - 16550 compatible 0x1 - 16550 subset 0x12 - 16550 compatible with parameters defined in Generic Address Structure (GAS) It turned out however, that the Windows OS treats 0x0 subtype as legacy x86 UART with 8-bit access. ARM SoCs can use types 0x1 (16550 with fixed mmio32 access) or 0x12 (16550 with fully respected GAS contents). Switch Marvell SoCs ACPI UART subtype to 0x1 - thanks to that the same firmware can run properly with UART output in FreeBSD, Windows 10, Linux and ESXI hypervisor. Tests showed the older firmware versions that use 0x0 UART subtype in SPCR table continue to display output properly. [1] https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table Obtained from: Semihalf Sponsored by: ARM Differential revision: https://reviews.freebsd.org/D30386 MFC after: 2 weeks
* Add support for Gemini Lake LPSS UARTs.Konstantin Belousov2021-05-231-0/+8
| | | | | | | | | | | | | With this patch: % dmesg | grep -i uart uart2: <Intel Gemini Lake SIO/LPSS UART 0> mem 0xa1426000-0xa1426fff,0xa1425000-0xa1425fff irq 4 at device 24.0 on pci0 uart3: <Intel Gemini Lake SIO/LPSS UART 1> mem 0xa1424000-0xa1424fff,0xa1423000-0xa1423fff irq 5 at device 24.1 on pci0 uart4: <Intel Gemini Lake SIO/LPSS UART 2> mem 0xfea10000-0xfea10fff irq 6 at device 24.2 on pci0 uart5: <Intel Gemini Lake SIO/LPSS UART 3> mem 0xa1422000-0xa1422fff,0xa1421000-0xa1421fff irq 7 at device 24.3 on pci0 PR: 256101 Submitted by: Daniel Ponte <amigan@gmail.com> MFC after: 1 week
* Add Apollo Lake SIO/LPSS UARTs PCI IDsJose Luis Duran2021-05-031-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Add PCI IDs for Intel Apollo Lake Series HSUARTs: # pciconf -ll drv selector class rev hdr vendor device subven subdev uart0@pci0:0:24:0: 118000 0b 00 8086 5abc 8086 7270 uart1@pci0:0:24:1: 118000 0b 00 8086 5abe 8086 7270 uart2@pci0:0:24:2: 118000 0b 00 8086 5ac0 8086 7270 uart3@pci0:0:24:3: 118000 0b 00 8086 5aee 8086 7270 NB (Intel Document Number 336256-004US): 1. The E3900 and A3900 Series Processors support four LPSS_UART ports, while the N- and J- Series Processors support only LPSS_UART [2:1] ports. 2. The LPSS_UART1 port is dedicated for discrete Global Navigation Satellite System (GNSS). This port can be used for generic UART functionality if GNSS is not used. 3. The LPSS_UART2 port is dedicated for host OS debug. 4. The LPSS_UART0 and LPSS_UART3 ports are for generic UART functionality. 5. Only UART [1:0] ports support DMA. PR: 255556 Submitted by: Jose Luis Duran <jlduran@gmail.com> MFC after: 1 week
* uart_bus_pci.c: StyleJose Luis Duran2021-05-031-3/+4
| | | | | | | | Wrap long lines, use tab instead of spaces. PR: 255556 Submitted by: Jose Luis Duran <jlduran@gmail.com> MFC after: 1 week
* ns8250: don't drop IER_TXRDY on bus_grab/ungrabMitchell Horne2021-03-101-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | It has been observed that some systems are often unable to resume from ddb after entering with debug.kdb.enter=1. Checking the status further shows the terminal is blocked waiting in tty_drain(), but it never makes progress in clearing the output queue, because sc->sc_txbusy is high. I noticed that when entering polling mode for the debugger, IER_TXRDY is set in the failure case. Since this bit is never tracked by the softc, it will not be restored by ns8250_bus_ungrab(). This creates a race in which a TX interrupt can be lost, creating the hang described above. Ensuring that this bit is restored is enough to prevent this, and resume from ddb as expected. The solution is to track this bit in the sc->ier field, for the same lifetime that TX interrupts are enabled. PR: 223917, 240122 Reviewed by: imp, manu Tested by: bz MFC after: 5 days Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D29130
* uart: only use MSI on devices that advertise 1 MSI vectorWarner Losh2021-02-171-3/+3
| | | | | | | | | | This updates r311987/fb1d9b7f4113d which allowed any number of vectors to be used. Since we're just attaching one instance, the meaning of more than one vector is not clear and seems to cause problems. Fall back to old methods for these cards. PR: 235016 Submitted by: David Cross
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