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path: root/sys/mips/rmi/xlr_machdep.c
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* Remove sys/mips/rmi. It's been unmaintained since 2011. This hardwareWarner Losh2018-01-011-626/+0
| | | | | | | | | | | | | | is now unobtanium. It's only had API changes in the last 7 years, and is responsible for a very large number of them. In addition, there's a lot of code that reimplements base FreeBSD functionality, diminishing the chances it still works. Without hardware to teset it on, or prospects of obtaining such hardware and without vendor support, it's time to move on. Suggested by: kan@ in mips@ retirement discussion Notes: svn path=/head/; revision=327461
* sys/mips: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-271-0/+2
| | | | | | | | | | | | | | | Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Notes: svn path=/head/; revision=326259
* Allow the use of soft-interrupts for sending IPIs.Ruslan Bukin2016-09-081-2/+9
| | | | | | | | | | | | This will be required for SMP support on MIPS Malta platform. Reviewed by: adrian Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D7835 Notes: svn path=/head/; revision=305621
* Convert remaining {g,s}etenv->kern_{g,s}etenvDavide Italiano2014-10-171-2/+2
| | | | | | | | | left over from r273174. Reported by: bz Notes: svn path=/head/; revision=273234
* Follow up to r225617. In order to maximize the re-usability of kernel codeDavide Italiano2014-10-161-3/+3
| | | | | | | | | | | in userland rename in-kernel getenv()/setenv() to kern_setenv()/kern_getenv(). This fixes a namespace collision with libc symbols. Submitted by: kmacy Tested by: make universe Notes: svn path=/head/; revision=273174
* Remove platform APIs which are not used by any code and which had only stubJuli Mallett2012-03-121-18/+0
| | | | | | | | | | | | implementations or no implementation on all platforms. Some of these functions might be good ideas, but their semantics were unclear given the lack of implementation, and an unlucky porter could be fooled into trying to implement them or, worse, being baffled when something like platform_trap_enter() failed to be called. Notes: svn path=/head/; revision=232853
* Fix a brain-o in platform_cpu_mask() by just specifying a possibleAttilio Rao2011-05-131-6/+4
| | | | | | | | | | cpuset_t to be copied, rather than return the array. I can't rely anymore on this being a simple int/long object. Reported by: art Notes: svn path=/projects/largeSMP/; revision=221857
* Add the cpuset_t conversion for mips.Attilio Rao2011-05-131-3/+9
| | | | Notes: svn path=/projects/largeSMP/; revision=221847
* Allow the platform code to return a bitmask of running cores rather than justJuli Mallett2011-02-121-3/+3
| | | | | | | | | | | | | | | | | a number of cores, this allows for a sparse set of CPUs. Implement support for sparse core masks on Octeon. XXX jeff@ suggests that all_cpus should include cores that are offline or running other applications/OSes, so the platform API should be further extended to allow us to set all_cpus to include all cores that are physically-present as opposed to only those that are running FreeBSD. Submitted by: Bhanu Prakash (with modifications) Reviewed by: jchandra Glanced at by: kib, jeff, jhb Notes: svn path=/head/; revision=218591
* Fix format of physical addresses; this fixes the n32 build.Juli Mallett2011-01-191-3/+3
| | | | Notes: svn path=/head/; revision=217607
* Support for 64 bit PTEs on n32 and n64 compilation.Jayachandran C.2011-01-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | In n32 and n64, add support for physical address above 4GB by having 64 bit page table entries and physical addresses. Major changes are: - param.h: update PTE sizes, masks and shift values to support 64 bit PTEs. - param.h: remove DELAY(), mips_btop(same as atop), mips_ptob (same as ptoa), and reformat. - param.h: remove casting to unsigned long in trunc_page and round_page since this will be used on physical addresses. - _types.h: have 64 bit __vm_paddr_t for n32. - pte.h: update TLB LO0/1 access macros to support 64 bit PTE - pte.h: assembly macros for PTE operations. - proc.h: md_upte is now 64 bit for n32 and n64. - exception.S and swtch.S: use the new PTE macros for PTE operations. - cpufunc.h: TLB_LO0/1 registers are 64bit for n32 and n64. - xlr_machdep.c: Add memory segments above 4GB to phys_avail[] as they are supported now. Reviewed by: jmallett (earlier version) Notes: svn path=/head/; revision=217354
* The message ring interrupt needs to be enabled for all cpus, not justJayachandran C.2011-01-121-65/+52
| | | | | | | | | | | | | | | | the ones which run the message ring handler. Some bits of the interrupt mask are part of the status register which is saved with the process context, and these bits are initialized from the cpu on which the process is created. This means that all the processes should have the same value for these interrupt mask bits, so that the interrupt mask remains the same regardless of what thread is scheduled on the cpu. Submitted by: Sriram Gorti (srgorti at netlogicmicro dot com) Notes: svn path=/head/; revision=217304
* - dump_avail layout should be sequence of [start, end)Oleksandr Tymoshenko2010-12-091-4/+4
| | | | | | | | | pairs, not <start, size>. Spotted by: alc@ Notes: svn path=/head/; revision=216320
* - Populate dump_avail with proper values from phys_availOleksandr Tymoshenko2010-12-091-0/+7
| | | | Notes: svn path=/head/; revision=216318
* On uniprocessor, warn and fixup hardware cpu mask if more than on CPUJayachandran C.2010-10-201-1/+9
| | | | | | | is enabled by the bootloader. Notes: svn path=/head/; revision=214106
* Update message ring handling code for XLR/XLSJayachandran C.2010-10-031-1/+0
| | | | | | | | | | | | | | - Wakeup multiple threads per core using message ring watermark interrupts. - Update message ring handler registration, use the real device station id for registering interrupts. - rge/nlge: update for the new message ring registration code. - rge/nlge: use 2 message ring stations for incoming packets, this will allow more messages to be queued. - nlge: comment fixes, remove unused variable - style and whitespace fixes Notes: svn path=/head/; revision=213377
* Clean up and update sys/mips/rmi/rmi_mips_exts.hJayachandran C.2010-09-091-3/+3
| | | | | | | | | | | | | | - Provide 64 bit implementations for some macros. On n64 and n32, don't split 64 bit values. - No need for 32 bit ops for control registers. - Fix few bugs (write control reg, write_c0_register64). - Re-write EIRR/EIMR/CPUID operations using read_c0_registerXX, no need of inline assembly. - rename control reg access functions to avoid phnx, update callers. - stlye/whitespace fixes. Notes: svn path=/head/; revision=212366
* XLR/XLS hardware interrupts should be programmed level triggered at theJayachandran C.2010-09-061-9/+6
| | | | | | | | PIC. This should fix the interrupt releated issues seen after the interrupt handling re-write for SMP. Notes: svn path=/head/; revision=212248
* Updates for the RMI MIPS platform codeJayachandran C.2010-09-011-0/+3
| | | | | | | | | | | - set cache_coherent_dma flag in cpuinfo for XLR, this will make sure that BUS_DMA_COHERENT flag is handled correctly in busdma_machdep.c - iodi.c, call device_get_name() just once - clear RMI specific EIRR while intializing CPUs - remove debug print in intr_machdep.c Notes: svn path=/head/; revision=212102
* Clean up header files in RMI platform code (sys/mips/rmi), and removeJayachandran C.2010-08-301-3/+2
| | | | | | | | | | | | | | | | | | | unused files. - remove clock.c and clock.h, these are not used after the new timer code was added. - remove duplicated include files, fix header file ordering, remove some unneeded includes. - rename mips/rmi/shared_structs.h which contains the RMI boot loader interface to mips/rmi/rmi_boot_info.h. Remove unused files mips/rmi/shared_structs_func.h and sys/mips/rmi/shared_structs_offsets.h - merge mips/rmi/xlrconfig.h and mips/rmi/rmi_mips_exts.h, and remove duplicated functions. - nlge - minor change to remove unneeded argument. - Add FreeBSD svn keyword for headers Notes: svn path=/head/; revision=211994
* Revamp XLR interrupt handling, the previous scheme does not work well onJayachandran C.2010-08-271-4/+4
| | | | | | | | | | | | | | | | | | | | | | SMP. We used to route all PIC based interrupts to cpu 0, and used the per-CPU interrupt mask to enable/disable interrupts. But the interrupt threads can run on any cpu on SMP, and the interrupt thread will re-enable the interrupts on the CPU it runs on when it is done, and not on cpu0 where the PIC will still send interrupts to. The fix is move the disable/enable for PIC based interrupts to PIC, we will ack on PIC only when the interrupt thread is done, and we do not use the per-CPU interrupt mask. The changes also introduce a way for subsystems to add a function that will be called to clear the interrupt on the subsystem. Currently This is used by the PCI/PCIe for doing additional work during the interrupt handling. Notes: svn path=/head/; revision=211893
* Provide timecounter based on XLR PIC timer.Jayachandran C.2010-08-251-0/+22
| | | | | | | | | | - Use timer 7 in XLR PIC as a 32 counter - provide pic_init_timer(), pic_set_timer(), pic_timer_count32() and pic_timer_count() PIC timer operations. - register this timer as platform_timecounter on rmi platform. Notes: svn path=/head/; revision=211814
* XLR PIC code update.Jayachandran C.2010-08-251-5/+6
| | | | | | | | - Fix a bug in xlr_pic_init (use irq in PIC_IRQ_IS_EDGE_TRIGGERED) - use new macro PIC_INTR_TO_IRQ() and PIC_IRT_x() in xlr_pic_init Notes: svn path=/head/; revision=211812
* XLR PIC code update and style(9) fixes.Jayachandran C.2010-08-251-3/+1
| | | | | | | | | | | - style(9) fixes to mips/rmi platform files - update pic.h to add pic_setup_intr() and use pic_setup_intr() for setting up interrupts which are routed thru PIC. - remove rmi_spin_mutex_safe and haslock, and make sure that the functions are called only after mutexes are available. Notes: svn path=/head/; revision=211811
* RMI XLR platform code clean-up.Jayachandran C.2010-08-251-70/+112
| | | | | | | | | | - move PIC code to xlr_machdep.c - move fast message ring code completely to on_chip.c - move memory initialization to a new function xlr_mem_init() - style fixes Notes: svn path=/head/; revision=211802
* Fix for 64 bit compile, with SMP enabled.Jayachandran C.2010-08-111-2/+3
| | | | Notes: svn path=/head/; revision=211191
* Fixup mips/rmi for the new mips timer code(r210403). This will get XLRJayachandran C.2010-07-271-5/+2
| | | | | | | | | | | booting again. The code is a copy of the mips/mips/tick.c with minor modifications for XLR interrupt handling. Disable mips/rmi/clock.c for now, the PIC based timer code will be added later. Notes: svn path=/head/; revision=210528
* Fix for 64 bit compilation.Jayachandran C.2010-07-151-8/+12
| | | | | | | | RMI bootloader passes argv[] and envp[] as an array of 32 bit pointers. Convert the pointers to correct pointer type before use. Notes: svn path=/head/; revision=210126
* 64 bit compilation support XLR platform code.Jayachandran C.2010-07-081-6/+5
| | | | | | | | | | Mostly changes to make casting between int and pointer and printing 64bit values safe for 32 and 64 bit compile. Approved by: rrs Notes: svn path=/head/; revision=209808
* Changes to boot on a subset of threads on an XLR/XLS core.Jayachandran C.2010-05-211-178/+161
| | | | | | | | | | | | | | - Adds re-partitioning TLB per core for enabled threads. - Adds hardware thread id to cpuid mapping - updates rge driver packet distribution and message ring handling threads to be started based on hardware thread id. - remove unused early debugging code to set control registers. - coding style fixes Approved by: rrs (mentor) Notes: svn path=/head/; revision=208369
* Adds JC's cleanup patches that fix it soRandall Stewart2010-05-181-0/+9
| | | | | | | | | | | we call an platform dependant topo function as well as clean up all the XLR specific ifdefs around smp platform init. Obtained from: JC Notes: svn path=/head/; revision=208249
* This pushes all of JC's patches that I have in place. IRandall Stewart2010-05-161-205/+53
| | | | | | | | | | | | | | am now able to run 32 cores ok.. but I still will hang on buildworld with a NFS problem. I suspect I am missing a patch for the netlogic rge driver. JC check and see if I am missing anything except your core-mask changes Obtained from: JC Notes: svn path=/head/; revision=208165
* Its possible that our RMI box has memory extendingRandall Stewart2010-01-291-3/+16
| | | | | | | | | | above 4Gig. If so when we add the base address with the size we will wrap. So for now we just ignore such memory and only use what we can. When we get 64 bit working then we will be much better ;-> Notes: svn path=/head/; revision=203150
* Changes the msg ring so its a filter not aRandall Stewart2010-01-281-2/+3
| | | | | | | | | | handler. Somehow rrs missed this.. Thanks to JC for catching this ;-) Obtained from: JC (jayachandranc@netlogicmicro.com Notes: svn path=/head/; revision=203112
* Fix up the msg ring driver a bit tighterRandall Stewart2010-01-261-22/+7
| | | | | | | | so that we don't loose an interrupt which we appeared to be doing. Notes: svn path=/head/; revision=203008
* Changes the order of the setting the int happened (insideRandall Stewart2010-01-241-1/+1
| | | | | | | the lock). Notes: svn path=/head/; revision=202905
* This hopefully will fix the network problem I was seeing.Randall Stewart2010-01-221-8/+8
| | | | | | | | | | | | | Basically the msg ring interrupt was being re-enabled inside a spinlock as the thread set it self up for rescheduling. This won't work since inside the re-enable is another spin lock.. which means on return from the reenable the interrupts have been reenabled. Thus you would get a clock int and end up panicing holding a spin lock to long :-o Notes: svn path=/head/; revision=202809
* Rename mips_pcpu_init to mips_pcpu0_init since it applies only to theWarner Losh2010-01-091-1/+1
| | | | | | | BSP. Provide a missing prototype. Notes: svn path=/projects/mips/; revision=201881
* Centralize initialization of pcpu, and set curthread early...Warner Losh2010-01-081-0/+3
| | | | Notes: svn path=/projects/mips/; revision=201845
* Fixes so kdb works.Randall Stewart2009-12-211-1/+4
| | | | Notes: svn path=/projects/mips/; revision=200769
* Ok With this commit we actually get throughRandall Stewart2009-11-061-48/+1
| | | | | | | | | | | | | | | | the mi_startup (or to the last of it).. and hit a panic after : uart0: <16550 or compatible> on iodi0 Trap cause = 2 (TLB miss....) I did have to take the pci bus OUT of the build to get this far, hit a cache error with the PCI code in. Interesting thing is the machine reboots too ;-) Notes: svn path=/projects/mips/; revision=198985
* ok we now get so that the uart init's and we can print. WeRandall Stewart2009-11-051-6/+56
| | | | | | | | | | cannot set baud rate as they did in 6.4, this hoses things and we loose our 38400 default term. We now lock somewhere in tcinit. Notes: svn path=/projects/mips/; revision=198956
* adds rmi specific mips extensions file and makes sureRandall Stewart2009-10-291-1/+1
| | | | | | | the includes point to the new place. Notes: svn path=/projects/mips/; revision=198629
* White space changesRandall Stewart2009-10-291-162/+181
| | | | Notes: svn path=/projects/mips/; revision=198625
* more Updates on the RMI code close to compiling now ;-)Randall Stewart2009-10-291-43/+93
| | | | Notes: svn path=/projects/mips/; revision=198607
* Fix build from r198563 (again). Sigh.Andrew Thompson2009-10-281-1/+1
| | | | Notes: svn path=/projects/mips/; revision=198565
* Fix build from r198563Andrew Thompson2009-10-281-1/+1
| | | | Notes: svn path=/projects/mips/; revision=198564
* Use init_static_kenv() and setenv() to simplify the environment string handling.Andrew Thompson2009-10-281-12/+10
| | | | Notes: svn path=/projects/mips/; revision=198563
* More initial RMI files. Note that these so far do NOTRandall Stewart2009-10-151-0/+650
compile and many of them may disappear. For example the xlr_boot1_console.c is old code that is ifdef'd out. I will clean these sorts of things up as I make progress on the port. So far the only thing I have I think straightened out is the bits around the interupt handling... and hey that may be broke ;-) Notes: svn path=/projects/mips/; revision=198160
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