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* sifive_spi: Add missing case for SPIBUS_MODE_NONEThomas Skibo2021-08-301-0/+5
| | | | | | | | | | Otherwise sckmode is left uninitialised, not zero. This mode is used for the on-board flash on the HiFive Unmatched board. Whilst here, catch unknown modes and return an error rather than silently continuing. Reviewed by: #riscv, jrtc27 MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31562
* fu740_pci_dw: Add SiFive FU740 PCIe controller driverJessica Clarke2021-08-072-0/+466
| | | | | | Reviewed by: mhorne MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31033
* sifive_gpio: Add SiFive GPIO controller driverJessica Clarke2021-08-072-0/+465
| | | | | | | | | | This is present on both the FU540 and FU740, but only needed for the FU740 in order to assert reset and power enable signals for its PCIe controller. Reviewed by: mhorne MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31031
* fu540_spi: Rename to sifive_spiJessica Clarke2021-08-072-115/+115
| | | | | | | | The FU740 also uses the same SPI controller. Reviewed by: kp, philip MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31026
* sifive_prci: Add reset support for the FU540 and FU740Jessica Clarke2021-08-071-0/+57
| | | | | | | | | This is needed for FU740 PCIe support. Whilst we don't need the FU540's resets they are also defined for completeness. Reviewed by: manu MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31024
* sifive_prci: Delay attachment until after clk_fixedJessica Clarke2021-08-071-1/+5
| | | | | | | | | This avoids noisy output from early attempts to attach before clk_fixed has attached to the parent clocks. Reviewed by: kp, mhorne MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31023
* sifive_prci: Add support for the FU740 PRCIJessica Clarke2021-08-071-1/+291
| | | | | | Reviewed by: mhorne MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31022
* fu540_prci: Rename to sifive_prci and use ocd_data for FU540 specificityJessica Clarke2021-08-072-31/+56
| | | | | | | | | | | | | | | | | The FU740 has a very similar controller and will reuse most of the driver. This also drops the dependency on the device-tree include for the binding indices; the header doesn't namespace its contents (and nor does the FU740 one) so using both would require seperate translation units which would be unnecessarily complicated just to avoid defining local copies of the small number of constants. Whilst here, add the missing l to gemgxlclk's name and drop the prci_ prefix from tlclk's name as we don't prefix any of the others and it's entirely unnecessary. Reviewed by: kp, mhorne MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31021
* sifive_uart: Fix input character dropping in ddb and at a mountroot promptJessica Clarke2021-07-211-3/+9
| | | | | | | | | | | | | | | | | | | | These use the raw console interface and poll. Unfortunately, the SiFive UART puts the FIFO empty bit inside the FIFO data register, which means that the act of checking whether a character is available also dequeues any character from the FIFO, requiring the user to press each key twice. However, since we configure the watermark to be 0 and, when the UART has been grabbed for the console, we have interrupts off, we can abuse the interrupt pending register to act as a substitute for the FIFO empty bit. This perhaps suggests that the console interface should move from having rxready and getc to having getc_nonblock and getc (or make getc take a bool), as all the places that call rxready do so to avoid blocking on getc when there is no character available. Reviewed by: kp, philip MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D31025
* riscv: Fix build by using the correct device-tree include pathEmmanuel Vadot2021-01-161-1/+1
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* sifive_uart: quiet GCC -Werror=parenthesesMitchell Horne2021-01-081-1/+1
| | | | | | Add an additional set of braces to clarify intention. The '&' operator has a higher precedence than '|', but the reader may not always remember this. No functional change.
* riscv/sifive: add FE310 Always-on driverNick O'Brien2020-04-022-0/+319
| | | | | | | | | | | | | | | This driver supports SiFive's FE310 Always-on (AON) peripheral's Real-time clock (RTC) and Watchdog timer (WDT). AON has other functionality that this driver could support such as the power management unit (PMU) but that functionality hasn't been implemented. Reviewed by: philip (mentor), kp (mentor) Approved by: philip (mentor) Sponsored by: Axiado Differential Revision: https://reviews.freebsd.org/D24170 Notes: svn path=/head/; revision=359555
* fuspi: silence build warning, plug resource leakPhilip Paeps2020-03-091-3/+1
| | | | | | | | | | | | This silences an "unused label" warning as well as fixes the attach fail path that wasn't releasing resources. Submitted by: Nicholas O'Brien <nickisobrien_gmail.com> Sponsored by: Axiado Differential Revision: https://reviews.freebsd.org/D24004 Notes: svn path=/head/; revision=358801
* prci: register tlclk as a fixed clockMitchell Horne2020-02-011-0/+22
| | | | | | | | | | | | | | | | | | | | The PRCI exports tlclk as a constant fixed divisor clock, defined as 1/2 of the coreclk frequency. In older FU540 device trees (such as the one provided by SiFive), tlclk is represented as its own entity, and is automatically registered as a fixed-divisor-clock. Unfortunately the upstream FU540 device tree (that we have in our tree) represents tlclk as an output of the PRCI block, and we must register it manually. At worst, users of the old device tree will end up with an unreferenced duplicate of tlclk. This fixes device attachment for the SiFive UART on newer device trees, since it references tlclk via the PRCI. Reviewed by: kp Differential Revision: https://reviews.freebsd.org/D23406 Notes: svn path=/head/; revision=357371
* prci: fix up compatMitchell Horne2020-02-011-2/+9
| | | | | | | | | | | | | Add two additional compat strings that can be used to identify the PRCI. With newer device trees the PRCI has two parents, hfclk and rtcclk, so allow the driver to attach when more than one parent is found. Reviewed by: kp Differential Revision: https://reviews.freebsd.org/D23405 Notes: svn path=/head/; revision=357370
* prci: register the DDR and GEMGX PLLsMitchell Horne2020-02-011-15/+45
| | | | | | | | | | | | The PRCI module exports three PLLs. Currently only the coreclk/corepll is registered, so add the logic to register the DDR (memory) and GEMGX (ethernet) clocks as well. These clocks are unused at the moment. Reviewed by: kp Differential Revision: https://reviews.freebsd.org/D23404 Notes: svn path=/head/; revision=357369
* sifive: Fix incorrect tx/rx ctrl definesKristof Provost2020-01-071-2/+2
| | | | | | | | | | Happily these were never used, but they should be correct anyway. Reported by: Nicholas O'Brien <nickisobrien_gmail.com> Sponsored by: Axiado Notes: svn path=/head/; revision=356438
* sifive: uart driverKristof Provost2019-12-312-0/+544
| | | | | | | | | | | Implement support for the UART as found on the SiFive FU540. It should also work on, but has not been tested with, the FU310. Reviewed by: philip Sponsored by: Axiado Notes: svn path=/head/; revision=356222
* fuspi: Fix 'sleepable after non-sleepable' lockPhilip Paeps2019-12-291-9/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With WITNESS enabled we see the following warning: lock order reversal: (sleepable after non-sleepable) 1st 0xffffffd0847c7210 fu540spi0 (fu540spi0) @ /usr/home/kp/axiado/hornet-freebsd/src/sys/riscv/sifive/fu540_spi.c:297 2nd 0xffffffc00372bb30 Clock topology lock (Clock topology lock) @ /usr/home/kp/axiado/hornet-freebsd/src/sys/dev/extres/clk/clk.c:1137 stack backtrace: #0 0xffffffc0002a579e at witness_checkorder+0xb72 #1 0xffffffc0002a5556 at witness_checkorder+0x92a #2 0xffffffc000254c7a at _sx_slock_int+0x66 #3 0xffffffc00025537a at _sx_slock+0x8 #4 0xffffffc000123022 at clk_get_freq+0x38 #5 0xffffffc0005463e4 at __clzdi2+0x2bb8 #6 0xffffffc00014af58 at randomdev_getkey+0x76e #7 0xffffffc0001278b0 at simplebus_add_device+0x7ee #8 0xffffffc00027c9a8 at device_attach+0x2e6 #9 0xffffffc00027c634 at device_probe_and_attach+0x7a #10 0xffffffc00027d76a at bus_generic_attach+0x10 #11 0xffffffc00014aab0 at randomdev_getkey+0x2c6 #12 0xffffffc00027c9a8 at device_attach+0x2e6 #13 0xffffffc00027c634 at device_probe_and_attach+0x7a #14 0xffffffc00027d76a at bus_generic_attach+0x10 #15 0xffffffc000278bd2 at config_intrhook_oneshot+0x52 #16 0xffffffc000278b3e at config_intrhook_establish+0x146 #17 0xffffffc000278cf2 at config_intrhook_disestablish+0xfe The clock topology lock can sleep, which means we cannot attempt to acquire it while holding the non-sleepable mutex. Fix that by retrieving the clock speed once, during attach and not every time during SPI transaction setup. Submitted by: kp Sponsored by: Axiado Notes: svn path=/head/; revision=356166
* riscv/sifive: add FU540 SPI controller driverPhilip Paeps2019-12-202-0/+404
| | | | | | | | | | | Initial working prototype of the Serial Peripheral Interface controller in the SiFive FU540 SoC. Reviewed by: kp Sponsored by: Axiado Notes: svn path=/head/; revision=355921
* riscv/sifive: add SiFive FU540 PRCI driverPhilip Paeps2019-12-203-0/+274
The SiFive FU540 Power Reset Clocking Interrupt block contains a PLL that turns the input crystal (33.3MHz) into a 1-1.5GHz clock. This clock in turn is divided by two to produce the tlclk, which is fed into devices such as the SPI and I2C controllers. Register a new clock device for the PRCI so that those devices can read the correct clock through the clk framework. Submitted by: kp Sponsored by: Axiado Notes: svn path=/head/; revision=355920
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