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* riscv: set kernel_pmap hart mask more preciselyMitchell Horne2020-11-052-1/+10
* Tidy up the #includes. Recent changes, such as the introduction ofAlan Cox2020-11-021-6/+0
* Optimize set_syscall_retval for riscv by predicting the returnEdward Tomasz Napierala2020-10-291-3/+5
* riscv: Minor cleanup in startup codeKristof Provost2020-10-271-2/+1
* riscv: make use of SBI legacy replacement extensionsMitchell Horne2020-10-262-54/+138
* riscv: remove sbi_clear_ipi()Mitchell Horne2020-10-263-10/+1
* riscv: improve exception code namingMitchell Horne2020-10-245-47/+45
* riscv: zero reserved PTE bits for L2 PTEsMitchell Horne2020-10-171-3/+5
* Simplify preload_dump() conditionMitchell Horne2020-10-151-2/+1
* Avoid dump_avail[] redefinition.Konstantin Belousov2020-10-143-1/+4
* random(4) FenestrasX: Push root seed version to arc4random(3)Conrad Meyer2020-10-101-1/+2
* RISC-V LINT kernel configMitchell Horne2020-10-092-0/+100
* Add a routine to dump boot metadataMitchell Horne2020-10-081-0/+9
* Remove yet another useless assignment, adding a KASSERT just in case.Edward Tomasz Napierala2020-10-081-6/+5
* Print symbol index for unsupported relocation typesMitchell Horne2020-10-071-1/+2
* Don't use critical section when calling intr_irq_handler() - that functionEdward Tomasz Napierala2020-10-071-6/+2
* riscv: Remove outdated condition in page_fault_handlerJessica Clarke2020-10-061-2/+1
* riscv: Handle supervisor instruction page faultsJessica Clarke2020-10-061-0/+1
* riscv: De-Arm a few namesJessica Clarke2020-10-062-11/+11
* Drop useless assignment, and add a KASSERT to make sure it really was useless.Edward Tomasz Napierala2020-10-051-1/+3
* Optimize riscv's cpu_fetch_syscall_args(), making it possibleEdward Tomasz Napierala2020-10-031-9/+10
* riscv: handle access faults in user modeKristof Provost2020-10-021-0/+4
* riscv: Add memmmap so we can mmap /dev/memKristof Provost2020-10-012-1/+16
* riscv: Panic on PMP errorsKristof Provost2020-09-301-0/+3
* riscv: Define __PCI_REROUTE_INTERRUPTJessica Clarke2020-09-301-0/+2
* Get rid of sa->narg. It serves no purpose; use sa->callp->sy_narg instead.Edward Tomasz Napierala2020-09-272-3/+1
* Add a vmparam.h constant indicating pmap support for large pages.Mark Johnston2020-09-231-0/+5
* riscv: Trap cleanup - use nitems()Nick O'Brien2020-09-231-3/+3
* RISC-V: build SiFive drivers and DTB in GENERICMitchell Horne2020-09-221-0/+6
* Sparsify the vm_page_dump bitmapD Scott Phillips2020-09-212-1/+13
* Move vm_page_dump bitset array definition to MI codeD Scott Phillips2020-09-213-65/+19
* Add missing assignment forgotten in r365899Michal Meloun2020-09-201-0/+1
* Add NetBSD compatible bus_space_peek_N() and bus_space_poke_N() functions.Michal Meloun2020-09-191-0/+27
* Get rid of sv_errtbl and SV_ABI_ERRNO().Edward Tomasz Napierala2020-09-171-2/+0
* Refine the busdma template interface. Provide tools for filling in fieldsScott Long2020-09-141-32/+1
* Disable WITNESS for spin locks by default.John Baldwin2020-09-111-1/+1
* RISC-V: fix some mismatched format specifiersMitchell Horne2020-09-085-11/+11
* Round TF_SIZE up to the stack alignment (16-bytes).Brooks Davis2020-09-041-1/+1
* Include the psind in data returned by mincore(2).Mark Johnston2020-09-021-1/+1
* Add the MEM_EXTRACT_PADDR ioctl to /dev/mem.Mark Johnston2020-09-022-1/+8
* riscv: very large dma mappings can cause integer overflowKristof Provost2020-09-021-1/+1
* riscv: clean up empty lines in .c and .h filesMateusz Guzik2020-09-018-28/+2
* riscv: Use global mimpid in identify_cpu()Nick O'Brien2020-08-181-3/+1
* RISC-V: copy kernelname from the environmentMitchell Horne2020-08-151-0/+5
* Enable interrupts while handling trapsMitchell Horne2020-08-131-7/+16
* Small fixes in locore.SMitchell Horne2020-08-131-8/+15
* Check that the frame pointer is within the current stack.John Baldwin2020-08-121-5/+8
* Use uintptr_t instead of uint64_t for pointers in stack frames.John Baldwin2020-08-124-18/+18
* Correct padding length for RISC-V PCPU data.John Baldwin2020-08-122-1/+4
* riscv: fix uintfptr_tMateusz Guzik2020-08-051-1/+1
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