From 4f493a25f48e7e045b6d1a852f089f2a7268738e Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Tue, 21 May 2013 11:24:32 +0000 Subject: Fix the hardware watchpoints on SMP amd64. Load the updated %dr registers also on other CPUs, besides the CPU which happens to execute the ddb. The debugging registers are stored in the pcpu area, together with the command which is executed by the IPI stop handler upon resume. Reviewed by: jhb Sponsored by: The FreeBSD Foundation MFC after: 1 week --- sys/amd64/include/pcpu.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'sys/amd64/include/pcpu.h') diff --git a/sys/amd64/include/pcpu.h b/sys/amd64/include/pcpu.h index bb7d33950535..ba4c61870797 100644 --- a/sys/amd64/include/pcpu.h +++ b/sys/amd64/include/pcpu.h @@ -78,9 +78,14 @@ struct system_segment_descriptor *pc_tss; \ u_int pc_cmci_mask /* MCx banks for CMCI */ \ PCPU_XEN_FIELDS; \ - char __pad[293] /* be divisor of PAGE_SIZE \ + uint64_t pc_dbreg[16]; /* ddb debugging regs */ \ + int pc_dbreg_cmd; /* ddb debugging reg cmd */ \ + char __pad[161] /* be divisor of PAGE_SIZE \ after cache alignment */ +#define PC_DBREG_CMD_NONE 0 +#define PC_DBREG_CMD_LOAD 1 + #ifdef _KERNEL #ifdef lint -- cgit v1.2.3