aboutsummaryrefslogtreecommitdiff
path: root/sys/dev/sfxge/sfxge_nvram.c
blob: 7298cf0b2dfc5059945efdd662cda8dd71902f68 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
/*-
 * Copyright (c) 2010-2016 Solarflare Communications, Inc.
 * All rights reserved.
 *
 * This software was developed in part by OKTET Labs Ltd. under contract for
 * Solarflare Communications, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");

#include <sys/types.h>
#include <sys/malloc.h>

#include "common/efx.h"
#include "sfxge.h"

/* These data make no real sense, they are here just to make sfupdate happy.
 * Any code that would rely on it is broken.
 */
static const uint8_t fake_dynamic_cfg_nvram[] = {
	0x7a, 0xda, 0x10, 0xef, 0x0c, 0x00, 0x00, 0x00,
	0x00, 0x05, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
	0x48, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x10,
	0x08, 0x00, 0x00, 0x00, 0x90, 0x04, 0x00, 0x52,
	0x56, 0x01, 0xc3, 0x78, 0x01, 0x00, 0x03, 0x10,
	0x08, 0x00, 0x00, 0x00, 0x90, 0x04, 0x00, 0x52,
	0x56, 0x01, 0xc3, 0x78, 0x57, 0x1a, 0x10, 0xef,
	0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
	0x02, 0x0b, 0x64, 0x7d, 0xee, 0xee, 0xee, 0xee
};

static int
sfxge_nvram_rw(struct sfxge_softc *sc, sfxge_ioc_t *ip, efx_nvram_type_t type,
	       boolean_t write)
{
	efx_nic_t *enp = sc->enp;
	size_t total_size = ip->u.nvram.size;
	size_t chunk_size;
	off_t off;
	int rc = 0;
	uint8_t *buf;

	if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA) {
		if (write)
			return (0);
		rc = copyout(fake_dynamic_cfg_nvram, ip->u.nvram.data,
			     MIN(total_size, sizeof(fake_dynamic_cfg_nvram)));
		return (rc);
	}

	if ((rc = efx_nvram_rw_start(enp, type, &chunk_size)) != 0)
		goto fail1;

	buf = malloc(chunk_size, M_TEMP, M_WAITOK);

	off = 0;
	while (total_size) {
		size_t len = MIN(chunk_size, total_size);

		if (write) {
			rc = copyin(ip->u.nvram.data + off, buf, len);
			if (rc != 0)
				goto fail3;
			rc = efx_nvram_write_chunk(enp, type,
						   ip->u.nvram.offset + off, buf, len);
			if (rc != 0)
				goto fail3;
		} else {
			rc = efx_nvram_read_chunk(enp, type,
						  ip->u.nvram.offset + off, buf, len);
			if (rc != 0)
				goto fail3;
			rc = copyout(buf, ip->u.nvram.data + off, len);
			if (rc != 0)
				goto fail3;
		}

		total_size -= len;
		off += len;
	}

fail3:
	free(buf, M_TEMP);
	efx_nvram_rw_finish(enp, type, NULL);
fail1:
	return (rc);
}

static int
sfxge_nvram_erase(struct sfxge_softc *sc, efx_nvram_type_t type)
{
	efx_nic_t *enp = sc->enp;
	size_t chunk_size;
	int rc = 0;

	if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA)
		return (0);

	if ((rc = efx_nvram_rw_start(enp, type, &chunk_size)) != 0)
		return (rc);

	rc = efx_nvram_erase(enp, type);

	efx_nvram_rw_finish(enp, type, NULL);
	return (rc);
}

int
sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip)
{
	static const efx_nvram_type_t nvram_types[] = {
		[SFXGE_NVRAM_TYPE_BOOTROM]  = EFX_NVRAM_BOOTROM,
		[SFXGE_NVRAM_TYPE_BOOTROM_CFG]  = EFX_NVRAM_BOOTROM_CFG,
		[SFXGE_NVRAM_TYPE_MC]  = EFX_NVRAM_MC_FIRMWARE,
		[SFXGE_NVRAM_TYPE_MC_GOLDEN]  = EFX_NVRAM_MC_GOLDEN,
		[SFXGE_NVRAM_TYPE_PHY]  = EFX_NVRAM_PHY,
		[SFXGE_NVRAM_TYPE_NULL_PHY]  = EFX_NVRAM_NULLPHY,
		[SFXGE_NVRAM_TYPE_FPGA]  = EFX_NVRAM_FPGA,
		[SFXGE_NVRAM_TYPE_FCFW]  = EFX_NVRAM_FCFW,
		[SFXGE_NVRAM_TYPE_CPLD]  = EFX_NVRAM_CPLD,
		[SFXGE_NVRAM_TYPE_FPGA_BACKUP]  = EFX_NVRAM_FPGA_BACKUP,
		[SFXGE_NVRAM_TYPE_DYNAMIC_CFG]  = EFX_NVRAM_DYNAMIC_CFG,
	};

	efx_nic_t *enp = sc->enp;
	efx_nvram_type_t type;
	int rc = 0;

	if (ip->u.nvram.type > SFXGE_NVRAM_TYPE_DYNAMIC_CFG)
		return (EINVAL);
	type = nvram_types[ip->u.nvram.type];
	if (type == EFX_NVRAM_MC_GOLDEN &&
	    (ip->u.nvram.op == SFXGE_NVRAM_OP_WRITE ||
	     ip->u.nvram.op == SFXGE_NVRAM_OP_ERASE ||
	     ip->u.nvram.op == SFXGE_NVRAM_OP_SET_VER))
		return (EOPNOTSUPP);

	switch (ip->u.nvram.op) {
	case SFXGE_NVRAM_OP_SIZE:
	{
		size_t size;

		if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA) {
			ip->u.nvram.size = sizeof(fake_dynamic_cfg_nvram);
		} else {
			if ((rc = efx_nvram_size(enp, type, &size)) != 0)
				return (rc);
			ip->u.nvram.size = size;
		}
		break;
	}
	case SFXGE_NVRAM_OP_READ:
		rc = sfxge_nvram_rw(sc, ip, type, B_FALSE);
		break;
	case SFXGE_NVRAM_OP_WRITE:
		rc = sfxge_nvram_rw(sc, ip, type, B_TRUE);
		break;
	case SFXGE_NVRAM_OP_ERASE:
		rc = sfxge_nvram_erase(sc, type);
		break;
	case SFXGE_NVRAM_OP_GET_VER:
		rc = efx_nvram_get_version(enp, type, &ip->u.nvram.subtype,
					   &ip->u.nvram.version[0]);
		break;
	case SFXGE_NVRAM_OP_SET_VER:
		rc = efx_nvram_set_version(enp, type, &ip->u.nvram.version[0]);
		break;
	default:
		rc = EOPNOTSUPP;
		break;
	}

	return (rc);
}