aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
blob: c9ff2cd0d51440f498654895f3925061b3a8358f (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=cortex-a57 -enable-unsafe-fp-math %s | FileCheck --check-prefixes=UNPROFITABLE,ALL %s
# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=falkor -enable-unsafe-fp-math %s | FileCheck --check-prefixes=PROFITABLE,ALL %s
# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=exynosm1 -enable-unsafe-fp-math %s | FileCheck --check-prefixes=PROFITABLE,ALL %s
# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=thunderx2t99 -enable-unsafe-fp-math %s | FileCheck --check-prefixes=PROFITABLE,ALL %s
#
name:            f1_2s
registers:
  - { id: 0, class: fpr64 }
  - { id: 1, class: fpr64 }
  - { id: 2, class: fpr64 }
  - { id: 3, class: fpr64 }
  - { id: 4, class: fpr64 }
body:             |
  bb.0.entry:
    %2:fpr64 = COPY %d2
    %1:fpr64 = COPY %d1
    %0:fpr64 = COPY %d0
    %3:fpr64 = FMULv2f32 %0, %1
    %4:fpr64 = FSUBv2f32 killed %3, %2
    %d0 = COPY %4
    RET_ReallyLR implicit %d0

...
# UNPROFITABLE-LABEL: name: f1_2s
# UNPROFITABLE: %3:fpr64 = FMULv2f32 %0, %1
# UNPROFITABLE-NEXT: FSUBv2f32 killed %3, %2
#
# PROFITABLE-LABEL: name: f1_2s
# PROFITABLE: %5:fpr64 = FNEGv2f32 %2
# PROFITABLE-NEXT: FMLAv2f32 killed %5, %0, %1
---
name:            f1_4s
registers:
  - { id: 0, class: fpr128 }
  - { id: 1, class: fpr128 }
  - { id: 2, class: fpr128 }
  - { id: 3, class: fpr128 }
  - { id: 4, class: fpr128 }
body:             |
  bb.0.entry:
    %2:fpr128 = COPY %q2
    %1:fpr128 = COPY %q1
    %0:fpr128 = COPY %q0
    %3:fpr128 = FMULv4f32 %0, %1
    %4:fpr128 = FSUBv4f32 killed %3, %2
    %q0 = COPY %4
    RET_ReallyLR implicit %q0

...
# UNPROFITABLE-LABEL: name: f1_4s
# UNPROFITABLE: %3:fpr128 = FMULv4f32 %0, %1
# UNPROFITABLE-NEXT: FSUBv4f32 killed %3, %2
#
# PROFITABLE-LABEL: name: f1_4s
# PROFITABLE: %5:fpr128 = FNEGv4f32 %2
# PROFITABLE-NEXT: FMLAv4f32 killed %5, %0, %1
---
name:            f1_2d
registers:
  - { id: 0, class: fpr128 }
  - { id: 1, class: fpr128 }
  - { id: 2, class: fpr128 }
  - { id: 3, class: fpr128 }
  - { id: 4, class: fpr128 }
body:             |
  bb.0.entry:
    %2:fpr128 = COPY %q2
    %1:fpr128 = COPY %q1
    %0:fpr128 = COPY %q0
    %3:fpr128 = FMULv2f64 %0, %1
    %4:fpr128 = FSUBv2f64 killed %3, %2
    %q0 = COPY %4
    RET_ReallyLR implicit %q0

...
# UNPROFITABLE-LABEL: name: f1_2d
# UNPROFITABLE: %3:fpr128 = FMULv2f64 %0, %1
# UNPROFITABLE-NEXT: FSUBv2f64 killed %3, %2
#
# PROFITABLE-LABEL: name: f1_2d
# PROFITABLE: %5:fpr128 = FNEGv2f64 %2
# PROFITABLE-NEXT: FMLAv2f64 killed %5, %0, %1
---
name:            f1_both_fmul_2s
registers:
  - { id: 0, class: fpr64 }
  - { id: 1, class: fpr64 }
  - { id: 2, class: fpr64 }
  - { id: 3, class: fpr64 }
  - { id: 4, class: fpr64 }
  - { id: 5, class: fpr64 }
  - { id: 6, class: fpr64 }
body:             |
  bb.0.entry:
    %3:fpr64 = COPY %q3
    %2:fpr64 = COPY %q2
    %1:fpr64 = COPY %q1
    %0:fpr64 = COPY %q0
    %4:fpr64 = FMULv2f32 %0, %1
    %5:fpr64 = FMULv2f32 %2, %3
    %6:fpr64 = FSUBv2f32 killed %4, %5
    %q0 = COPY %6
    RET_ReallyLR implicit %q0

...
# ALL-LABEL: name: f1_both_fmul_2s
# ALL: %4:fpr64 = FMULv2f32 %0, %1
# ALL-NEXT: FMLSv2f32 killed %4, %2, %3
---
name:            f1_both_fmul_4s
registers:
  - { id: 0, class: fpr128 }
  - { id: 1, class: fpr128 }
  - { id: 2, class: fpr128 }
  - { id: 3, class: fpr128 }
  - { id: 4, class: fpr128 }
  - { id: 5, class: fpr128 }
  - { id: 6, class: fpr128 }
body:             |
  bb.0.entry:
    %3:fpr128 = COPY %q3
    %2:fpr128 = COPY %q2
    %1:fpr128 = COPY %q1
    %0:fpr128 = COPY %q0
    %4:fpr128 = FMULv4f32 %0, %1
    %5:fpr128 = FMULv4f32 %2, %3
    %6:fpr128 = FSUBv4f32 killed %4, %5
    %q0 = COPY %6
    RET_ReallyLR implicit %q0

...
# ALL-LABEL: name: f1_both_fmul_4s
# ALL: %4:fpr128 = FMULv4f32 %0, %1
# ALL-NEXT: FMLSv4f32 killed %4, %2, %3
---
name:            f1_both_fmul_2d
registers:
  - { id: 0, class: fpr128 }
  - { id: 1, class: fpr128 }
  - { id: 2, class: fpr128 }
  - { id: 3, class: fpr128 }
  - { id: 4, class: fpr128 }
  - { id: 5, class: fpr128 }
  - { id: 6, class: fpr128 }
body:             |
  bb.0.entry:
    %3:fpr128 = COPY %q3
    %2:fpr128 = COPY %q2
    %1:fpr128 = COPY %q1
    %0:fpr128 = COPY %q0
    %4:fpr128 = FMULv2f64 %0, %1
    %5:fpr128 = FMULv2f64 %2, %3
    %6:fpr128 = FSUBv2f64 killed %4, %5
    %q0 = COPY %6
    RET_ReallyLR implicit %q0

...
# ALL-LABEL: name: f1_both_fmul_2d
# ALL: %4:fpr128 = FMULv2f64 %0, %1
# ALL-NEXT: FMLSv2f64 killed %4, %2, %3