test/CodeGen/MIR/X86/named-registers.mir


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# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
# This test ensures that the MIR parser parses X86 registers correctly.

--- |

  define i32 @foo() {
  entry:
    ret i32 0
  }

...
---
# CHECK: name: foo
name:            foo
body: |
  bb.0.entry:
    ; CHECK:      %eax = MOV32r0
    ; CHECK-NEXT: RETQ %eax
    %eax = MOV32r0 implicit-def %eflags
    RETQ %eax
...