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|
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel -run-pass=regbankselect %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=FAST
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel -regbankselect-greedy -run-pass=regbankselect %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=GREEDY
--- |
define void @test_mul_vec512() {
ret void
}
define void @test_add_vec512() {
ret void
}
define void @test_sub_vec512() {
ret void
}
...
---
name: test_mul_vec512
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_mul_vec512
# CHECK: registers:
# CHECK: - { id: 0, class: vecr }
# CHECK: - { id: 1, class: vecr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
%0(<16 x s32>) = IMPLICIT_DEF
%1(<16 x s32>) = G_MUL %0, %0
RET 0
...
---
name: test_add_vec512
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_add_vec512
# CHECK: registers:
# CHECK: - { id: 0, class: vecr }
# CHECK: - { id: 1, class: vecr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
%0(<16 x s32>) = IMPLICIT_DEF
%1(<16 x s32>) = G_ADD %0, %0
RET 0
...
---
name: test_sub_vec512
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_sub_vec512
# CHECK: registers:
# CHECK: - { id: 0, class: vecr }
# CHECK: - { id: 1, class: vecr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
%0(<16 x s32>) = IMPLICIT_DEF
%1(<16 x s32>) = G_SUB %0, %0
RET 0
...
|
