aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/X86/GlobalISel/regbankselect-X32.mir
blob: a115d1fa3255dda8729ca3ee7c4c8e156b09174a (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
# RUN: llc -mtriple=i386-linux-gnu -global-isel                       -run-pass=regbankselect %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=FAST
# RUN: llc -mtriple=i386-linux-gnu -global-isel -regbankselect-greedy -run-pass=regbankselect %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=GREEDY

--- |
  define void @test_uadde_i32() {
    ret void
  }

...
---
name:            test_uadde_i32
# CHECK-LABEL: name:  test_uadde_i32
alignment:       4
legalized:       true
regBankSelected: false
# CHECK:      registers:
# CHECK-NEXT:   - { id: 0, class: gpr }
# CHECK-NEXT:   - { id: 1, class: gpr }
# CHECK-NEXT:   - { id: 2, class: gpr }
# CHECK-NEXT:   - { id: 3, class: gpr }
# CHECK-NEXT:   - { id: 4, class: gpr }
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
  - { id: 3, class: _ }
  - { id: 4, class: _ }
body:             |
  bb.0 (%ir-block.0):
    %0(s32) = IMPLICIT_DEF
    %1(s32) = IMPLICIT_DEF
    %2(s1) = IMPLICIT_DEF
    %3(s32), %4(s1) = G_UADDE %0, %1, %2
    RET 0

...