aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/unsigned-promotion.c
blob: 2c3415201ce7cd07a7862a234aec205cf38b8fc8 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
// Check -fsanitize=signed-integer-overflow and
// -fsanitize=unsigned-integer-overflow with promoted unsigned types
//
// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s \
// RUN:   -fsanitize=signed-integer-overflow | FileCheck %s --check-prefix=CHECKS
// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s \
// RUN:   -fsanitize=unsigned-integer-overflow | FileCheck %s --check-prefix=CHECKU

unsigned short si, sj, sk;
unsigned char ci, cj, ck;

extern void opaqueshort(unsigned short);
extern void opaquechar(unsigned char);

// CHECKS-LABEL:   define void @testshortadd()
// CHECKU-LABEL: define void @testshortadd()
void testshortadd() {
  // CHECKS:        load i16* @sj
  // CHECKS:        load i16* @sk
  // CHECKS:        [[T1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
  // CHECKS-NEXT:   [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
  // CHECKS-NEXT:   [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
  // CHECKS:        call void @__ubsan_handle_add_overflow
  //
  // CHECKU:      [[T1:%.*]] = load i16* @sj
  // CHECKU:      [[T2:%.*]] = zext i16 [[T1]]
  // CHECKU:      [[T3:%.*]] = load i16* @sk
  // CHECKU:      [[T4:%.*]] = zext i16 [[T3]]
  // CHECKU-NOT:  llvm.sadd
  // CHECKU-NOT:  llvm.uadd
  // CHECKU:      [[T5:%.*]] = add nsw i32 [[T2]], [[T4]]

  si = sj + sk;
}

// CHECKS-LABEL:   define void @testshortsub()
// CHECKU-LABEL: define void @testshortsub()
void testshortsub() {

  // CHECKS:        load i16* @sj
  // CHECKS:        load i16* @sk
  // CHECKS:        [[T1:%.*]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
  // CHECKS-NEXT:   [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
  // CHECKS-NEXT:   [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
  // CHECKS:        call void @__ubsan_handle_sub_overflow
  //
  // CHECKU:      [[T1:%.*]] = load i16* @sj
  // CHECKU:      [[T2:%.*]] = zext i16 [[T1]]
  // CHECKU:      [[T3:%.*]] = load i16* @sk
  // CHECKU:      [[T4:%.*]] = zext i16 [[T3]]
  // CHECKU-NOT:  llvm.ssub
  // CHECKU-NOT:  llvm.usub
  // CHECKU:      [[T5:%.*]] = sub nsw i32 [[T2]], [[T4]]

  si = sj - sk;
}

// CHECKS-LABEL:   define void @testshortmul()
// CHECKU-LABEL: define void @testshortmul()
void testshortmul() {

  // CHECKS:        load i16* @sj
  // CHECKS:        load i16* @sk
  // CHECKS:        [[T1:%.*]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
  // CHECKS-NEXT:   [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
  // CHECKS-NEXT:   [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
  // CHECKS:        call void @__ubsan_handle_mul_overflow
  //
  // CHECKU:      [[T1:%.*]] = load i16* @sj
  // CHECKU:      [[T2:%.*]] = zext i16 [[T1]]
  // CHECKU:      [[T3:%.*]] = load i16* @sk
  // CHECKU:      [[T4:%.*]] = zext i16 [[T3]]
  // CHECKU-NOT:  llvm.smul
  // CHECKU-NOT:  llvm.umul
  // CHECKU:      [[T5:%.*]] = mul nsw i32 [[T2]], [[T4]]
  si = sj * sk;
}

// CHECKS-LABEL:   define void @testcharadd()
// CHECKU-LABEL: define void @testcharadd()
void testcharadd() {

  // CHECKS:        load i8* @cj
  // CHECKS:        load i8* @ck
  // CHECKS:        [[T1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
  // CHECKS-NEXT:   [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
  // CHECKS-NEXT:   [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
  // CHECKS:        call void @__ubsan_handle_add_overflow
  //
  // CHECKU:      [[T1:%.*]] = load i8* @cj
  // CHECKU:      [[T2:%.*]] = zext i8 [[T1]]
  // CHECKU:      [[T3:%.*]] = load i8* @ck
  // CHECKU:      [[T4:%.*]] = zext i8 [[T3]]
  // CHECKU-NOT:  llvm.sadd
  // CHECKU-NOT:  llvm.uadd
  // CHECKU:      [[T5:%.*]] = add nsw i32 [[T2]], [[T4]]

  ci = cj + ck;
}

// CHECKS-LABEL:   define void @testcharsub()
// CHECKU-LABEL: define void @testcharsub()
void testcharsub() {

  // CHECKS:        load i8* @cj
  // CHECKS:        load i8* @ck
  // CHECKS:        [[T1:%.*]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
  // CHECKS-NEXT:   [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
  // CHECKS-NEXT:   [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
  // CHECKS:        call void @__ubsan_handle_sub_overflow
  //
  // CHECKU:      [[T1:%.*]] = load i8* @cj
  // CHECKU:      [[T2:%.*]] = zext i8 [[T1]]
  // CHECKU:      [[T3:%.*]] = load i8* @ck
  // CHECKU:      [[T4:%.*]] = zext i8 [[T3]]
  // CHECKU-NOT:  llvm.ssub
  // CHECKU-NOT:  llvm.usub
  // CHECKU:      [[T5:%.*]] = sub nsw i32 [[T2]], [[T4]]

  ci = cj - ck;
}

// CHECKS-LABEL:   define void @testcharmul()
// CHECKU-LABEL: define void @testcharmul()
void testcharmul() {

  // CHECKS:        load i8* @cj
  // CHECKS:        load i8* @ck
  // CHECKS:        [[T1:%.*]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 [[T2:%.*]], i32 [[T3:%.*]])
  // CHECKS-NEXT:   [[T4:%.*]] = extractvalue { i32, i1 } [[T1]], 0
  // CHECKS-NEXT:   [[T5:%.*]] = extractvalue { i32, i1 } [[T1]], 1
  // CHECKS:        call void @__ubsan_handle_mul_overflow
  //
  // CHECKU:      [[T1:%.*]] = load i8* @cj
  // CHECKU:      [[T2:%.*]] = zext i8 [[T1]]
  // CHECKU:      [[T3:%.*]] = load i8* @ck
  // CHECKU:      [[T4:%.*]] = zext i8 [[T3]]
  // CHECKU-NOT:  llvm.smul
  // CHECKU-NOT:  llvm.umul
  // CHECKU:      [[T5:%.*]] = mul nsw i32 [[T2]], [[T4]]

  ci = cj * ck;
}