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| author | Yuri Victorovich <yuri@FreeBSD.org> | 2022-10-30 19:33:10 +0000 |
|---|---|---|
| committer | Yuri Victorovich <yuri@FreeBSD.org> | 2022-10-30 19:42:15 +0000 |
| commit | e12bc699534a472d90c31d9f18c90dfb592c6df9 (patch) | |
| tree | 498a0054196b0ca1d0068de3ef16f3bfa5a4dc0d | |
| parent | b3212456d8a1d78bf7b96488ffc6701452e10256 (diff) | |
| download | ports-e12bc699534a472d90c31d9f18c90dfb592c6df9.tar.gz ports-e12bc699534a472d90c31d9f18c90dfb592c6df9.zip | |
cad/verilator: Update 4.228 -> 5.002
Reported by: portscout
| -rw-r--r-- | cad/verilator/Makefile | 2 | ||||
| -rw-r--r-- | cad/verilator/distinfo | 6 | ||||
| -rw-r--r-- | cad/verilator/pkg-plist | 4 |
3 files changed, 8 insertions, 4 deletions
diff --git a/cad/verilator/Makefile b/cad/verilator/Makefile index e3fd4d34ff36..e9be252e547a 100644 --- a/cad/verilator/Makefile +++ b/cad/verilator/Makefile @@ -1,6 +1,6 @@ PORTNAME= verilator DISTVERSIONPREFIX= v -DISTVERSION= 4.228 +DISTVERSION= 5.002 CATEGORIES= cad MAINTAINER= yuri@FreeBSD.org diff --git a/cad/verilator/distinfo b/cad/verilator/distinfo index 3b94c6ebd699..0858d2784bc0 100644 --- a/cad/verilator/distinfo +++ b/cad/verilator/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1664661808 -SHA256 (verilator-verilator-v4.228_GH0.tar.gz) = be6af6572757013802be5b0ff9c64cbf509e98066737866abaae692fe04edf09 -SIZE (verilator-verilator-v4.228_GH0.tar.gz) = 2623600 +TIMESTAMP = 1667156636 +SHA256 (verilator-verilator-v5.002_GH0.tar.gz) = 72d68469fc1262e6288d099062b960a2f65e9425bdb546cba141a2507decd951 +SIZE (verilator-verilator-v5.002_GH0.tar.gz) = 2780753 diff --git a/cad/verilator/pkg-plist b/cad/verilator/pkg-plist index e320c5290d4c..05e6e597a3df 100644 --- a/cad/verilator/pkg-plist +++ b/cad/verilator/pkg-plist @@ -20,6 +20,8 @@ man/man1/verilator_coverage.1.gz %%DATADIR%%/examples/cmake_tracing_c/Makefile %%DATADIR%%/examples/cmake_tracing_sc/CMakeLists.txt %%DATADIR%%/examples/cmake_tracing_sc/Makefile +%%DATADIR%%/examples/make_hello_binary/Makefile +%%DATADIR%%/examples/make_hello_binary/top.v %%DATADIR%%/examples/make_hello_c/Makefile %%DATADIR%%/examples/make_hello_c/sim_main.cpp %%DATADIR%%/examples/make_hello_c/top.v @@ -84,6 +86,8 @@ man/man1/verilator_coverage.1.gz %%DATADIR%%/include/verilated_syms.h %%DATADIR%%/include/verilated_threads.cpp %%DATADIR%%/include/verilated_threads.h +%%DATADIR%%/include/verilated_timing.cpp +%%DATADIR%%/include/verilated_timing.h %%DATADIR%%/include/verilated_trace.h %%DATADIR%%/include/verilated_trace_defs.h %%DATADIR%%/include/verilated_trace_imp.h |