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| author | Mitchell Horne <mhorne@FreeBSD.org> | 2021-03-04 17:52:45 +0000 |
|---|---|---|
| committer | Mitchell Horne <mhorne@FreeBSD.org> | 2021-03-08 23:04:25 +0000 |
| commit | 03572a87a84cde47f672480d3c5485713b7c39fb (patch) | |
| tree | 725f7b9179e741b074429e73ab41d5baa7678266 | |
| parent | 02a8fe639a43de7717bc55a8da9851d20f33b2bc (diff) | |
| download | src-03572a87a84cde47f672480d3c5485713b7c39fb.tar.gz src-03572a87a84cde47f672480d3c5485713b7c39fb.zip | |
riscv: fix errors in some atomic type aliases
This appears to be a copy-and-paste error that has simply been
overlooked. The tree contains only two calls to any of the affected
variants, but recent additions to the test suite started exercising the
call to atomic_clear_rel_int() in ng_leave_write(), reliably causing
panics.
Apparently, the issue was inherited from the arm64 atomic header. That
instance was addressed in c90baf6817a0, but the fix did not make its way
to RISC-V.
Note that the particular test case ng_macfilter_test:main still appears
to fail on this platform, but this change reduces the panic to a
timeout.
PR: 253237
Reported by: Jenkins, arichardson
Reviewed by: kp, arichardson
Approved by: re (gjb)
(cherry picked from commit 0d3b3beeb253e09b2b6b3805065594aecc7e2c2f)
(cherry picked from commit cc24f5bc6f6eb56a959bd23ebb051d3bf6ebf670)
| -rw-r--r-- | sys/riscv/include/atomic.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/riscv/include/atomic.h b/sys/riscv/include/atomic.h index d08047593861..d743fce6f1ff 100644 --- a/sys/riscv/include/atomic.h +++ b/sys/riscv/include/atomic.h @@ -288,7 +288,7 @@ atomic_store_rel_32(volatile uint32_t *p, uint32_t val) #define atomic_subtract_acq_int atomic_subtract_acq_32 #define atomic_add_rel_int atomic_add_rel_32 -#define atomic_clear_rel_int atomic_add_rel_32 +#define atomic_clear_rel_int atomic_clear_rel_32 #define atomic_cmpset_rel_int atomic_cmpset_rel_32 #define atomic_fcmpset_rel_int atomic_fcmpset_rel_32 #define atomic_set_rel_int atomic_set_rel_32 @@ -490,7 +490,7 @@ atomic_store_rel_64(volatile uint64_t *p, uint64_t val) } #define atomic_add_acq_long atomic_add_acq_64 -#define atomic_clear_acq_long atomic_add_acq_64 +#define atomic_clear_acq_long atomic_clear_acq_64 #define atomic_cmpset_acq_long atomic_cmpset_acq_64 #define atomic_fcmpset_acq_long atomic_fcmpset_acq_64 #define atomic_load_acq_long atomic_load_acq_64 @@ -498,7 +498,7 @@ atomic_store_rel_64(volatile uint64_t *p, uint64_t val) #define atomic_subtract_acq_long atomic_subtract_acq_64 #define atomic_add_acq_ptr atomic_add_acq_64 -#define atomic_clear_acq_ptr atomic_add_acq_64 +#define atomic_clear_acq_ptr atomic_clear_acq_64 #define atomic_cmpset_acq_ptr atomic_cmpset_acq_64 #define atomic_fcmpset_acq_ptr atomic_fcmpset_acq_64 #define atomic_load_acq_ptr atomic_load_acq_64 |