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author | Andrew Turner <andrew@FreeBSD.org> | 2021-09-15 09:13:41 +0000 |
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committer | Andrew Turner <andrew@FreeBSD.org> | 2021-09-15 09:13:41 +0000 |
commit | 1896a0094317c80d46beff5ad42b68215513c996 (patch) | |
tree | 3c9903150acfae5f7774e970e820ad568c41a06e | |
parent | 454216468583481746845a1c8a45a8c18898ee72 (diff) | |
download | src-1896a0094317c80d46beff5ad42b68215513c996.tar.gz src-1896a0094317c80d46beff5ad42b68215513c996.zip |
Use a 64 bit read to access GICR_TYPER
The GICv3 ITS only needs to implement 32 bit access to the GICR_TYPER
when the CPU implements AArch32. As this may not always be the case
use a 64 bit read when checking if the ITS is enabled on the CPU.
PR: 258217
Reported by: Olivier Delande <olivier.delande@provenrun.com>
Sponsored by: The FreeBSD Foundation
-rw-r--r-- | sys/arm64/arm64/gicv3_its.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/arm64/arm64/gicv3_its.c b/sys/arm64/arm64/gicv3_its.c index af587247626b..1a0e7a79e76b 100644 --- a/sys/arm64/arm64/gicv3_its.c +++ b/sys/arm64/arm64/gicv3_its.c @@ -710,7 +710,7 @@ its_init_cpu(device_t dev, struct gicv3_its_softc *sc) return (0); /* Check if the ITS is enabled on this CPU */ - if ((gic_r_read_4(gicv3, GICR_TYPER) & GICR_TYPER_PLPIS) == 0) + if ((gic_r_read_8(gicv3, GICR_TYPER) & GICR_TYPER_PLPIS) == 0) return (ENXIO); rpcpu = gicv3_get_redist(dev); |