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| author | Mateusz Piotrowski <0mp@FreeBSD.org> | 2021-04-18 07:45:18 +0000 |
|---|---|---|
| committer | Mateusz Piotrowski <0mp@FreeBSD.org> | 2021-04-18 08:20:10 +0000 |
| commit | 40277af7f23405c276edf02c3ddc8e770a06e3f6 (patch) | |
| tree | fb8b1c2227d58c7281c829f5fa1750642b81c114 | |
| parent | 09da6ffa55a31aa2c257ffd0b45c5208ac55f916 (diff) | |
| download | src-40277af7f23405c276edf02c3ddc8e770a06e3f6.tar.gz src-40277af7f23405c276edf02c3ddc8e770a06e3f6.zip | |
spigen.4: Fix typos
MFC after: 3 days
| -rw-r--r-- | share/man/man4/spigen.4 | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/share/man/man4/spigen.4 b/share/man/man4/spigen.4 index e586b0baa82a..8a8cc556be81 100644 --- a/share/man/man4/spigen.4 +++ b/share/man/man4/spigen.4 @@ -57,7 +57,7 @@ device is associated with a single chip-select line on the bus, and all I/O performed through that instance is done with that chip-select line asserted. .Pp -SPI data transfers are inherently bi-directional; there are not separate +SPI data transfers are inherently bi-directional; there are no separate read and write operations. When commands and data are sent to a device, data also comes back from the device, although in some cases the data may not be useful (or even @@ -117,7 +117,7 @@ Set the maximum clock speed (bus frequency in Hertz) to be used when communicating with this slave device. The setting remains in effect for subsequent transfers; it is not necessary to reset this before each transfer. -The actual bus frequency may be lower due to hardware limitiations +The actual bus frequency may be lower due to hardware limitations of the SPI bus controller device. .It Dv SPIGENIOC_GET_SPI_MODE Pq Vt uint32_t Get the SPI mode (clock polarity and phase) to be used |