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authorXin LI <delphij@FreeBSD.org>2024-04-14 07:45:17 +0000
committerXin LI <delphij@FreeBSD.org>2024-04-14 07:52:08 +0000
commit51c69c8682e8ab0e5d82ab3d6f2d16419d40bad4 (patch)
tree2220bf0bb08a52c8cf9cea3af4542f33911db815
parentbbc6e6c5ec8c7938b98a36899fa083aa7ce4724e (diff)
downloadsrc-51c69c8682e8ab0e5d82ab3d6f2d16419d40bad4.tar.gz
src-51c69c8682e8ab0e5d82ab3d6f2d16419d40bad4.zip
amdsmn(4), amdtemp(4): add support for AMD Family 19h Models 10h-1Fh.
Tested on AMD Threadripper 7960X. PR: kern/278311 Tested by: jbo MFC after: 1 week
-rw-r--r--sys/dev/amdsmn/amdsmn.c7
-rw-r--r--sys/dev/amdtemp/amdtemp.c14
2 files changed, 20 insertions, 1 deletions
diff --git a/sys/dev/amdsmn/amdsmn.c b/sys/dev/amdsmn/amdsmn.c
index a676bbb6b0f2..ddb5be4c2c3c 100644
--- a/sys/dev/amdsmn/amdsmn.c
+++ b/sys/dev/amdsmn/amdsmn.c
@@ -58,6 +58,7 @@
#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */
#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
+#define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4
#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
struct pciid;
@@ -104,6 +105,12 @@ static const struct pciid {
},
{
.amdsmn_vendorid = CPU_VENDOR_AMD,
+ .amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M10H_ROOT,
+ .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+ .amdsmn_data_reg = F17H_SMN_DATA_REG,
+ },
+ {
+ .amdsmn_vendorid = CPU_VENDOR_AMD,
.amdsmn_deviceid = PCI_DEVICE_ID_AMD_19H_M60H_ROOT,
.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
.amdsmn_data_reg = F17H_SMN_DATA_REG,
diff --git a/sys/dev/amdtemp/amdtemp.c b/sys/dev/amdtemp/amdtemp.c
index 865804bdc96e..56772432773e 100644
--- a/sys/dev/amdtemp/amdtemp.c
+++ b/sys/dev/amdtemp/amdtemp.c
@@ -69,7 +69,11 @@ typedef enum {
CCD6,
CCD7,
CCD8,
- CCD_MAX = CCD8,
+ CCD9,
+ CCD10,
+ CCD11,
+ CCD12,
+ CCD_MAX = CCD12,
NUM_CCDS = CCD_MAX - CCD_BASE + 1,
} amdsensor_t;
@@ -109,6 +113,7 @@ struct amdtemp_softc {
#define DEVICEID_AMD_HOSTB17H_M10H_ROOT 0x15d0
#define DEVICEID_AMD_HOSTB17H_M30H_ROOT 0x1480 /* Also M70H, F19H M00H/M20H */
#define DEVICEID_AMD_HOSTB17H_M60H_ROOT 0x1630
+#define DEVICEID_AMD_HOSTB19H_M10H_ROOT 0x14a4
#define DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8
static const struct amdtemp_product {
@@ -134,6 +139,7 @@ static const struct amdtemp_product {
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M10H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M30H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB17H_M60H_ROOT, false },
+ { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M10H_ROOT, false },
{ VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false },
};
@@ -180,6 +186,7 @@ static const struct amdtemp_product {
#define AMDTEMP_17H_CCD_TMP_BASE 0x59954
#define AMDTEMP_17H_CCD_TMP_VALID (1u << 11)
+#define AMDTEMP_ZEN4_10H_CCD_TMP_BASE 0x59b00
#define AMDTEMP_ZEN4_CCD_TMP_BASE 0x59b08
/*
@@ -860,6 +867,11 @@ amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model)
maxreg = 8;
_Static_assert((int)NUM_CCDS >= 8, "");
break;
+ case 0x10 ... 0x1f:
+ sc->sc_temp_base = AMDTEMP_ZEN4_10H_CCD_TMP_BASE;
+ maxreg = 12;
+ _Static_assert((int)NUM_CCDS >= 12, "");
+ break;
case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
sc->sc_temp_base = AMDTEMP_ZEN4_CCD_TMP_BASE;
maxreg = 8;