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authorJohn Baldwin <jhb@FreeBSD.org>2022-08-29 22:35:15 +0000
committerJohn Baldwin <jhb@FreeBSD.org>2022-08-29 22:36:57 +0000
commit7afe342dcb38b624488009bb6bdfa5337e628ffc (patch)
tree475b552245b4e3ee06d63c407944790fa0b4ef31
parent177f04d57fbdb1c18ed845e19cc9b902c8b65312 (diff)
downloadsrc-7afe342dcb38b624488009bb6bdfa5337e628ffc.tar.gz
src-7afe342dcb38b624488009bb6bdfa5337e628ffc.zip
bhyve e1000: Sanitize transmit ring indices.
When preparing to transmit pending packets, ensure that the head (TDH) and tail (TDT) indices are in bounds. Note that validating values when they are written is not sufficient along as the transmit length (TDLEN) could be changed turning a value that was valid when written into an out of bounds value. While here, add further restrictions to the head register (TDH). The manual states that writing to this value while transmit is enabled can cause unexpected behavior and that it should only be written after a reset. As such, ignore attempts to write while transmit is active, and also ignore writes of non-zero values. Later e1000 chipsets have this register as read-only. Also ignore any attempts to transmit packets if the transmit ring's size is zero. PR: 264567 Reported by: Robert Morris <rtm@lcs.mit.edu> Reviewed by: emaste MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D36269
-rw-r--r--usr.sbin/bhyve/pci_e82545.c18
1 files changed, 13 insertions, 5 deletions
diff --git a/usr.sbin/bhyve/pci_e82545.c b/usr.sbin/bhyve/pci_e82545.c
index d3f61bf57b0d..dcded0b8b1ae 100644
--- a/usr.sbin/bhyve/pci_e82545.c
+++ b/usr.sbin/bhyve/pci_e82545.c
@@ -1466,9 +1466,12 @@ e82545_tx_run(struct e82545_softc *sc)
uint16_t head, rhead, tail, size;
int lim, tdwb, sent;
- head = sc->esc_TDH;
- tail = sc->esc_TDT;
size = sc->esc_TDLEN / 16;
+ if (size == 0)
+ return;
+
+ head = sc->esc_TDH % size;
+ tail = sc->esc_TDT % size;
DPRINTF("tx_run: head %x, rhead %x, tail %x",
sc->esc_TDH, sc->esc_TDHr, sc->esc_TDT);
@@ -1734,12 +1737,17 @@ e82545_write_register(struct e82545_softc *sc, uint32_t offset, uint32_t value)
e82545_tx_update_tdba(sc);
break;
case E1000_TDH(0):
- //assert(!sc->esc_tx_enabled);
- /* XXX should only ever be zero ? Range check ? */
+ if (sc->esc_tx_enabled) {
+ WPRINTF("ignoring write to TDH while transmit enabled");
+ break;
+ }
+ if (value != 0) {
+ WPRINTF("ignoring non-zero value written to TDH");
+ break;
+ }
sc->esc_TDHr = sc->esc_TDH = value;
break;
case E1000_TDT(0):
- /* XXX range check ? */
sc->esc_TDT = value;
if (sc->esc_tx_enabled)
e82545_tx_start(sc);