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| author | Cyprien Laplace <cyprien@cypou.net> | 2020-11-26 01:17:04 +0000 |
|---|---|---|
| committer | Ed Maste <emaste@FreeBSD.org> | 2021-03-14 16:25:25 +0000 |
| commit | 9ac43bb7470b94ca249d091017bab29363a7ed65 (patch) | |
| tree | ba9e6661a261739a56c1bce2e97e2239197c6c24 | |
| parent | 13c22f7495305f5b92874128b088ab47d9512c20 (diff) | |
| download | src-9ac43bb7470b94ca249d091017bab29363a7ed65.tar.gz src-9ac43bb7470b94ca249d091017bab29363a7ed65.zip | |
gic_v3: Use 64-bit writes to GICD_IROUTERn
While 32-bit accesses to GICD_IROUTERn are allowed,
this is a 64-bit register.
Pull Request: https://github.com/freebsd/freebsd-src/pull/451
(cherry picked from commit 46ca0b903cad8955574a2c61bed41c2b92aa2273)
(cherry picked from commit 40f283b038015b5b750267a26402098418fd1fb3)
Approved by: re (gjb)
| -rw-r--r-- | sys/arm64/arm64/gic_v3.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/arm64/arm64/gic_v3.c b/sys/arm64/arm64/gic_v3.c index f230eb6bbd06..8630a27102e3 100644 --- a/sys/arm64/arm64/gic_v3.c +++ b/sys/arm64/arm64/gic_v3.c @@ -844,7 +844,7 @@ gic_v3_bind_intr(device_t dev, struct intr_irqsrc *isrc) if (CPU_EMPTY(&isrc->isrc_cpu)) { gic_irq_cpu = intr_irq_next_cpu(gic_irq_cpu, &all_cpus); CPU_SETOF(gic_irq_cpu, &isrc->isrc_cpu); - gic_d_write(sc, 4, GICD_IROUTER(gi->gi_irq), + gic_d_write(sc, 8, GICD_IROUTER(gi->gi_irq), CPU_AFFINITY(gic_irq_cpu)); } else { /* @@ -852,7 +852,7 @@ gic_v3_bind_intr(device_t dev, struct intr_irqsrc *isrc) * the first CPU found. */ cpu = CPU_FFS(&isrc->isrc_cpu) - 1; - gic_d_write(sc, 4, GICD_IROUTER(gi->gi_irq), CPU_AFFINITY(cpu)); + gic_d_write(sc, 8, GICD_IROUTER(gi->gi_irq), CPU_AFFINITY(cpu)); } return (0); @@ -1114,7 +1114,7 @@ gic_v3_dist_init(struct gic_v3_softc *sc) */ aff = CPU_AFFINITY(0); for (i = GIC_FIRST_SPI; i < sc->gic_nirqs; i++) - gic_d_write(sc, 4, GICD_IROUTER(i), aff); + gic_d_write(sc, 8, GICD_IROUTER(i), aff); return (0); } |