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author | Mark Johnston <markj@FreeBSD.org> | 2023-06-02 15:57:38 +0000 |
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committer | Mark Johnston <markj@FreeBSD.org> | 2023-06-02 16:15:01 +0000 |
commit | 9ad8dc721e57bdccd55532a01bde251502966a95 (patch) | |
tree | ba5f14eccd7ce8d741605c0997f7c09cfc704ea8 | |
parent | 7811cca8722dbf91df4144be462ec220c690f294 (diff) | |
download | src-9ad8dc721e57bdccd55532a01bde251502966a95.tar.gz src-9ad8dc721e57bdccd55532a01bde251502966a95.zip |
ossl: Expose more CPUID bits in OPENSSL_ia32cap_P
This is needed to let OpenSSL 3.1 routines detect VAES and VPCLMULQDQ
extensions. The intent is to import ASM routines which implement
AES-GCM using VEX-prefixed AES-NI instructions.
No functional change intended.
Sponsored by: Stormshield
Sponsored by: Klara, Inc.
MFC after: 3 months
Differential Revision: https://reviews.freebsd.org/D39782
-rw-r--r-- | sys/crypto/openssl/ossl_x86.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/crypto/openssl/ossl_x86.c b/sys/crypto/openssl/ossl_x86.c index ff7cb29d30bc..75598d821506 100644 --- a/sys/crypto/openssl/ossl_x86.c +++ b/sys/crypto/openssl/ossl_x86.c @@ -47,7 +47,7 @@ * [0] = cpu_feature but with a few custom bits * [1] = cpu_feature2 but with AMD XOP in bit 11 * [2] = cpu_stdext_feature - * [3] = 0 + * [3] = cpu_stdext_feature2 */ unsigned int OPENSSL_ia32cap_P[4]; #define AESNI_CAPABLE (OPENSSL_ia32cap_P[1]&(1<<(57-32))) @@ -117,6 +117,7 @@ ossl_cpuid(struct ossl_softc *sc) OPENSSL_ia32cap_P[1] &= ~(CPUID2_AVX | AMDID2_XOP | CPUID2_FMA); OPENSSL_ia32cap_P[2] &= ~CPUID_STDEXT_AVX2; } + OPENSSL_ia32cap_P[3] = cpu_stdext_feature2; if (!AESNI_CAPABLE) { sc->has_aes = false; |