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author | Hans Petter Selasky <hselasky@FreeBSD.org> | 2021-01-26 16:01:34 +0000 |
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committer | Hans Petter Selasky <hselasky@FreeBSD.org> | 2021-01-28 13:51:58 +0000 |
commit | b8051298b0a345ae0bdfcd2ddf89bca1b96c6c2a (patch) | |
tree | 0af8d6623675980b56f3cef1b5ff75e7d4659be7 | |
parent | 4e76e4c301c72698e111580e278872a8323fba50 (diff) | |
download | src-b8051298b0a345ae0bdfcd2ddf89bca1b96c6c2a.tar.gz src-b8051298b0a345ae0bdfcd2ddf89bca1b96c6c2a.zip |
Fix missing value in uar_page field for ratelimit in mlx5en(4).
This is a regression issue after the new UAR API was introduced
by f8f5b459d21e .
MFC after: 1 week
Sponsored by: Mellanox Technologies // NVIDIA Networking
-rw-r--r-- | sys/dev/mlx5/mlx5_en/mlx5_en_rl.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c b/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c index 95fb59726e24..33b93b1b5ced 100644 --- a/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c +++ b/sys/dev/mlx5/mlx5_en/mlx5_en_rl.c @@ -66,6 +66,7 @@ mlx5e_rl_build_cq_param(struct mlx5e_rl_priv_data *rl, MLX5_SET(cqc, cqc, log_cq_size, log_sq_size); MLX5_SET(cqc, cqc, cq_period, rl->param.tx_coalesce_usecs); MLX5_SET(cqc, cqc, cq_max_count, rl->param.tx_coalesce_pkts); + MLX5_SET(cqc, cqc, uar_page, rl->priv->mdev->priv.uar->index); switch (rl->param.tx_coalesce_mode) { case 0: |