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authorMateusz Piotrowski <0mp@FreeBSD.org>2021-04-18 07:45:18 +0000
committerMateusz Piotrowski <0mp@FreeBSD.org>2021-04-21 07:58:37 +0000
commitbd2cb05d24907e37029f252086aaef70d91c92ff (patch)
tree09aa8ba87b659a9af8a200b10415dfff61d5057a
parent5d42c19f1fe2f0745869a6b7b269a747f203362c (diff)
downloadsrc-bd2cb05d24907e37029f252086aaef70d91c92ff.tar.gz
src-bd2cb05d24907e37029f252086aaef70d91c92ff.zip
spigen.4: Fix typos
MFC after: 3 days (cherry picked from commit 40277af7f23405c276edf02c3ddc8e770a06e3f6)
-rw-r--r--share/man/man4/spigen.46
1 files changed, 3 insertions, 3 deletions
diff --git a/share/man/man4/spigen.4 b/share/man/man4/spigen.4
index f79bb85dcfaf..061c192ab572 100644
--- a/share/man/man4/spigen.4
+++ b/share/man/man4/spigen.4
@@ -57,8 +57,8 @@ device is associated with a single chip-select
line on the bus, and all I/O performed through that instance is done
with that chip-select line asserted.
.Pp
-SPI data transfers are inherently bi-directional; there are not separate
-read and write operations.
+SPI data transfers are inherently bi-directional; there are no separate
+read and write operations.
When commands and data are sent to a device, data also comes back from
the device, although in some cases the data may not be useful (or even
documented or predictable for some devices).
@@ -117,7 +117,7 @@ Set the maximum clock speed (bus frequency in Hertz) to be used
when communicating with this slave device.
The setting remains in effect for subsequent transfers; it
is not necessary to reset this before each transfer.
-The actual bus frequency may be lower due to hardware limitiations
+The actual bus frequency may be lower due to hardware limitations
of the SPI bus controller device.
.It Dv SPIGENIOC_GET_SPI_MODE Pq Vt uint32_t
Get the SPI mode (clock polarity and phase) to be used