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| author | John Baldwin <jhb@FreeBSD.org> | 2023-10-13 19:26:58 +0000 |
|---|---|---|
| committer | John Baldwin <jhb@FreeBSD.org> | 2023-10-13 19:26:58 +0000 |
| commit | edd2a9b887864d07ac5af480b4b8f35cb76443f6 (patch) | |
| tree | 715c59d3e7bf017cbc3ff7bd6190c9c3744e61dc | |
| parent | f0852344e7abf4d74508185e67a1b98d6cdbd026 (diff) | |
| download | src-edd2a9b887864d07ac5af480b4b8f35cb76443f6.tar.gz src-edd2a9b887864d07ac5af480b4b8f35cb76443f6.zip | |
bhyve ahci: Replace WPRINTF with EPRINTLN
Reviewed by: markj
Differential Revision: https://reviews.freebsd.org/D42181
| -rw-r--r-- | usr.sbin/bhyve/pci_ahci.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/usr.sbin/bhyve/pci_ahci.c b/usr.sbin/bhyve/pci_ahci.c index 5ffb65269608..b69c099225db 100644 --- a/usr.sbin/bhyve/pci_ahci.c +++ b/usr.sbin/bhyve/pci_ahci.c @@ -118,7 +118,6 @@ static FILE *dbg; #else #define DPRINTF(format, arg...) #endif -#define WPRINTF(format, arg...) printf(format, ##arg) #define AHCI_PORT_IDENT 20 + 1 @@ -343,7 +342,7 @@ ahci_write_fis(struct ahci_port *p, enum sata_fis_type ft, uint8_t *fis) irq = (fis[1] & (1 << 6)) ? AHCI_P_IX_PS : 0; break; default: - WPRINTF("unsupported fis type %d", ft); + EPRINTLN("unsupported fis type %d", ft); return; } if (fis[2] & ATA_S_ERROR) { @@ -1802,7 +1801,7 @@ ahci_handle_cmd(struct ahci_port *p, int slot, uint8_t *cfis) handle_packet_cmd(p, slot, cfis); break; default: - WPRINTF("Unsupported cmd:%02x", cfis[2]); + EPRINTLN("Unsupported cmd:%02x", cfis[2]); ahci_write_fis_d2h(p, slot, cfis, (ATA_E_ABORT << 8) | ATA_S_READY | ATA_S_ERROR); break; @@ -1847,7 +1846,7 @@ ahci_handle_slot(struct ahci_port *p, int slot) #endif if (cfis[0] != FIS_TYPE_REGH2D) { - WPRINTF("Not a H2D FIS:%02x", cfis[0]); + EPRINTLN("Not a H2D FIS:%02x", cfis[0]); return; } @@ -2134,7 +2133,7 @@ pci_ahci_port_write(struct pci_ahci_softc *sc, uint64_t offset, uint64_t value) case AHCI_P_TFD: case AHCI_P_SIG: case AHCI_P_SSTS: - WPRINTF("pci_ahci_port: read only registers 0x%"PRIx64"", offset); + EPRINTLN("pci_ahci_port: read only registers 0x%"PRIx64"", offset); break; case AHCI_P_SCTL: p->sctl = value; @@ -2209,7 +2208,7 @@ pci_ahci_write(struct pci_devinst *pi, int baridx, uint64_t offset, int size, else if (offset < (uint64_t)AHCI_OFFSET + sc->ports * AHCI_STEP) pci_ahci_port_write(sc, offset, value); else - WPRINTF("pci_ahci: unknown i/o write offset 0x%"PRIx64"", offset); + EPRINTLN("pci_ahci: unknown i/o write offset 0x%"PRIx64"", offset); pthread_mutex_unlock(&sc->mtx); } @@ -2307,7 +2306,7 @@ pci_ahci_read(struct pci_devinst *pi, int baridx, uint64_t regoff, int size) value = pci_ahci_port_read(sc, offset); else { value = 0; - WPRINTF("pci_ahci: unknown i/o read offset 0x%"PRIx64"", + EPRINTLN("pci_ahci: unknown i/o read offset 0x%"PRIx64"", regoff); } value >>= 8 * (regoff & 0x3); |