1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
|
//===-- LoongArchDisassembler.cpp - Disassembler for LoongArch ------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the LoongArchDisassembler class.
//
//===----------------------------------------------------------------------===//
#include "MCTargetDesc/LoongArchBaseInfo.h"
#include "MCTargetDesc/LoongArchMCTargetDesc.h"
#include "TargetInfo/LoongArchTargetInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Endian.h"
using namespace llvm;
#define DEBUG_TYPE "loongarch-disassembler"
typedef MCDisassembler::DecodeStatus DecodeStatus;
namespace {
class LoongArchDisassembler : public MCDisassembler {
public:
LoongArchDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
: MCDisassembler(STI, Ctx) {}
DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
ArrayRef<uint8_t> Bytes, uint64_t Address,
raw_ostream &CStream) const override;
};
} // end anonymous namespace
static MCDisassembler *createLoongArchDisassembler(const Target &T,
const MCSubtargetInfo &STI,
MCContext &Ctx) {
return new LoongArchDisassembler(STI, Ctx);
}
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLoongArchDisassembler() {
// Register the disassembler for each target.
TargetRegistry::RegisterMCDisassembler(getTheLoongArch32Target(),
createLoongArchDisassembler);
TargetRegistry::RegisterMCDisassembler(getTheLoongArch64Target(),
createLoongArchDisassembler);
}
static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo,
uint64_t Address,
const MCDisassembler *Decoder) {
if (RegNo >= 32)
return MCDisassembler::Fail;
Inst.addOperand(MCOperand::createReg(LoongArch::R0 + RegNo));
return MCDisassembler::Success;
}
static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo,
uint64_t Address,
const MCDisassembler *Decoder) {
if (RegNo >= 32)
return MCDisassembler::Fail;
Inst.addOperand(MCOperand::createReg(LoongArch::F0 + RegNo));
return MCDisassembler::Success;
}
static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo,
uint64_t Address,
const MCDisassembler *Decoder) {
if (RegNo >= 32)
return MCDisassembler::Fail;
Inst.addOperand(MCOperand::createReg(LoongArch::F0_64 + RegNo));
return MCDisassembler::Success;
}
static DecodeStatus DecodeCFRRegisterClass(MCInst &Inst, uint64_t RegNo,
uint64_t Address,
const MCDisassembler *Decoder) {
if (RegNo >= 8)
return MCDisassembler::Fail;
Inst.addOperand(MCOperand::createReg(LoongArch::FCC0 + RegNo));
return MCDisassembler::Success;
}
static DecodeStatus DecodeFCSRRegisterClass(MCInst &Inst, uint64_t RegNo,
uint64_t Address,
const MCDisassembler *Decoder) {
if (RegNo >= 4)
return MCDisassembler::Fail;
Inst.addOperand(MCOperand::createReg(LoongArch::FCSR0 + RegNo));
return MCDisassembler::Success;
}
template <unsigned N, int P = 0>
static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm,
int64_t Address,
const MCDisassembler *Decoder) {
assert(isUInt<N>(Imm) && "Invalid immediate");
Inst.addOperand(MCOperand::createImm(Imm + P));
return MCDisassembler::Success;
}
template <unsigned N, unsigned S = 0>
static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm,
int64_t Address,
const MCDisassembler *Decoder) {
assert(isUInt<N>(Imm) && "Invalid immediate");
// Sign-extend the number in the bottom <N> bits of Imm, then shift left <S>
// bits.
Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm) << S));
return MCDisassembler::Success;
}
#include "LoongArchGenDisassemblerTables.inc"
DecodeStatus LoongArchDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
ArrayRef<uint8_t> Bytes,
uint64_t Address,
raw_ostream &CS) const {
uint32_t Insn;
DecodeStatus Result;
// We want to read exactly 4 bytes of data because all LoongArch instructions
// are fixed 32 bits.
if (Bytes.size() < 4) {
Size = 0;
return MCDisassembler::Fail;
}
Insn = support::endian::read32le(Bytes.data());
// Calling the auto-generated decoder function.
Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI);
Size = 4;
return Result;
}
|
