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author | Jimmy Olgeni <olgeni@FreeBSD.org> | 2014-06-09 11:21:52 +0000 |
---|---|---|
committer | Jimmy Olgeni <olgeni@FreeBSD.org> | 2014-06-09 11:21:52 +0000 |
commit | 37e782dfbc764c70ed1489c5c828d3c9ce5e4d65 (patch) | |
tree | 8d9caebfb388e25f19cd57fc86557a441d7cddff /cad | |
parent | bba40fef06a119bd90dc8b67e951957939f42e6e (diff) | |
download | ports-37e782dfbc764c70ed1489c5c828d3c9ce5e4d65.tar.gz ports-37e782dfbc764c70ed1489c5c828d3c9ce5e4d65.zip |
Remove indefinite articles and trailing periods from COMMENT, plus
minor COMMENT typos and surrounding whitespace fixes. Categories A-C.
CR: D196
Approved by: portmgr (bapt)
Notes
Notes:
svn path=/head/; revision=357139
Diffstat (limited to 'cad')
-rw-r--r-- | cad/calculix/Makefile | 2 | ||||
-rw-r--r-- | cad/cascade/Makefile | 2 | ||||
-rw-r--r-- | cad/cider/Makefile | 2 | ||||
-rw-r--r-- | cad/fidocadj/Makefile | 2 | ||||
-rw-r--r-- | cad/gmsh-occ/Makefile | 2 | ||||
-rw-r--r-- | cad/gmsh/Makefile | 2 | ||||
-rw-r--r-- | cad/gplcver/Makefile | 2 | ||||
-rw-r--r-- | cad/iverilog/Makefile | 2 | ||||
-rw-r--r-- | cad/jspice3/Makefile | 2 | ||||
-rw-r--r-- | cad/klayout/Makefile | 2 | ||||
-rw-r--r-- | cad/linux-eagle5/Makefile | 2 | ||||
-rw-r--r-- | cad/scotch/Makefile | 2 | ||||
-rw-r--r-- | cad/spice/Makefile | 2 | ||||
-rw-r--r-- | cad/systemc/Makefile | 2 | ||||
-rw-r--r-- | cad/transcalc/Makefile | 2 |
15 files changed, 15 insertions, 15 deletions
diff --git a/cad/calculix/Makefile b/cad/calculix/Makefile index 4facb493c948..308054eb9997 100644 --- a/cad/calculix/Makefile +++ b/cad/calculix/Makefile @@ -17,7 +17,7 @@ EXTRACT_ONLY+= ${DIST_EXAMPLES} .endif MAINTAINER= maho@FreeBSD.org -COMMENT= A Three-Dimensional Structural Finite Element Program +COMMENT= Three-Dimensional Structural Finite Element Program LICENSE= GPLv2 diff --git a/cad/cascade/Makefile b/cad/cascade/Makefile index 25b420812e07..a695a1d9abf4 100644 --- a/cad/cascade/Makefile +++ b/cad/cascade/Makefile @@ -8,7 +8,7 @@ MASTER_SITES= SF MASTER_SITE_SUBDIR= rfcascade/${PORTNAME}/${PORTNAME}-${PORTVERSION} MAINTAINER= hrs@FreeBSD.org -COMMENT= A simple tool to analyze noise and distortion of a RF system +COMMENT= Simple tool to analyze noise and distortion of a RF system GNU_CONFIGURE= yes PORTDOCS= ex1.gif index.html diff --git a/cad/cider/Makefile b/cad/cider/Makefile index aef15c9492ca..d814983f606c 100644 --- a/cad/cider/Makefile +++ b/cad/cider/Makefile @@ -10,7 +10,7 @@ MASTER_SITE_SUBDIR= mita DISTNAME= cider1b1 MAINTAINER= amakawa@jp.FreeBSD.org -COMMENT= A mixed-level circuit and device simulator (includes SPICE3) +COMMENT= Mixed-level circuit and device simulator (includes SPICE3) CONFLICTS= spice-[0-9]* WRKSRC= ${WRKDIR}/sim diff --git a/cad/fidocadj/Makefile b/cad/fidocadj/Makefile index 1837739197de..34e77a0ef5ac 100644 --- a/cad/fidocadj/Makefile +++ b/cad/fidocadj/Makefile @@ -11,7 +11,7 @@ DISTFILES= ${PORTNAME}.jar:src EXTRACT_ONLY= MAINTAINER= nivit@FreeBSD.org -COMMENT= An easy to use graphical editor for electronics +COMMENT= Easy to use graphical editor for electronics LICENSE= GPLv3 diff --git a/cad/gmsh-occ/Makefile b/cad/gmsh-occ/Makefile index 1981815d9618..cae3f446eae6 100644 --- a/cad/gmsh-occ/Makefile +++ b/cad/gmsh-occ/Makefile @@ -7,7 +7,7 @@ CATEGORIES= cad PKGNAMESUFFIX= -occ MAINTAINER= thierry@FreeBSD.org -COMMENT= An automatic 3D finite element mesh generator with OpenCascade support +COMMENT= Automatic 3D finite element mesh generator with OpenCascade support MASTERDIR= ${.CURDIR}/../../cad/gmsh diff --git a/cad/gmsh/Makefile b/cad/gmsh/Makefile index a5b28cc26b71..67e9ac170a0e 100644 --- a/cad/gmsh/Makefile +++ b/cad/gmsh/Makefile @@ -14,7 +14,7 @@ DIST_SUBDIR= gmsh EXTRACT_ONLY= ${DISTNAME}${EXTRACT_SUFX} MAINTAINER= stephen@FreeBSD.org -COMMENT= An automatic 3D finite element mesh generator +COMMENT= Automatic 3D finite element mesh generator LICENSE= GPLv2 diff --git a/cad/gplcver/Makefile b/cad/gplcver/Makefile index 25537ee337a6..6c25425fe7d9 100644 --- a/cad/gplcver/Makefile +++ b/cad/gplcver/Makefile @@ -8,7 +8,7 @@ MASTER_SITES= SF/${PORTNAME}/${PORTNAME}/${PORTVERSION:R}${PORTVERSION:E}/ DISTNAME= ${PORTNAME}-${PORTVERSION:R}${PORTVERSION:E}.src MAINTAINER= ports@FreeBSD.org -COMMENT= A Verilog HDL simulator +COMMENT= Verilog HDL simulator USES= tar:bzip2 gmake diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile index 3df1153c2968..82094e496e1a 100644 --- a/cad/iverilog/Makefile +++ b/cad/iverilog/Makefile @@ -9,7 +9,7 @@ MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v${PORTVERSION:C,\.[0-9]$,,}/ \ DISTNAME= verilog-${PORTVERSION} MAINTAINER= zeising@FreeBSD.org -COMMENT= A Verilog simulation and synthesis tool +COMMENT= Verilog simulation and synthesis tool LICENSE= GPLv2 diff --git a/cad/jspice3/Makefile b/cad/jspice3/Makefile index fb87b9b2bcc7..9c88e576564a 100644 --- a/cad/jspice3/Makefile +++ b/cad/jspice3/Makefile @@ -10,7 +10,7 @@ MASTER_SITES= http://www.wrcad.com/ftp/pub/ \ DISTNAME= ${PORTNAME}-2.5-011109 MAINTAINER= ports@FreeBSD.org -COMMENT= An adaptation of the Berkeley Spice3f4 with superconductivity +COMMENT= Adaptation of the Berkeley Spice3f4 with superconductivity CONFLICTS= spice-[0-9]* diff --git a/cad/klayout/Makefile b/cad/klayout/Makefile index 10c8514f99a0..1e21a4f4e82a 100644 --- a/cad/klayout/Makefile +++ b/cad/klayout/Makefile @@ -7,7 +7,7 @@ CATEGORIES= cad MASTER_SITES= http://178.77.72.242/downloads/ MAINTAINER= hrs@FreeBSD.org -COMMENT= A Qt-based GDS2 Viewer +COMMENT= Qt-based GDS2 Viewer LICENSE= GPLv2 diff --git a/cad/linux-eagle5/Makefile b/cad/linux-eagle5/Makefile index 5c5a737685f6..2d28309c3cb8 100644 --- a/cad/linux-eagle5/Makefile +++ b/cad/linux-eagle5/Makefile @@ -11,7 +11,7 @@ DISTNAME= eagle-lin-${EAGLEVERSION} EXTRACT_SUFX= .run MAINTAINER= riggs@FreeBSD.org -COMMENT= An easy to use, yet powerful tool for designing printed circuit boards +COMMENT= Easy to use, yet powerful tool for designing printed circuit boards LICENSE= Eagle LICENSE_NAME= Eagle End User License Agreement diff --git a/cad/scotch/Makefile b/cad/scotch/Makefile index 0c42c0253b91..cb6f1ade0ebe 100644 --- a/cad/scotch/Makefile +++ b/cad/scotch/Makefile @@ -9,7 +9,7 @@ MASTER_SITES= https://gforge.inria.fr/frs/download.php/28978/ DISTNAME= ${PORTNAME}_${DISTVERSION} MAINTAINER= thierry@FreeBSD.org -COMMENT= A package for graph and mesh partitioning and sparse matrix ordering +COMMENT= Package for graph and mesh partitioning and sparse matrix ordering LICENSE= CeCILL_C LICENSE_NAME= CeCILL-C diff --git a/cad/spice/Makefile b/cad/spice/Makefile index 2709ad7548b7..8c07f5832487 100644 --- a/cad/spice/Makefile +++ b/cad/spice/Makefile @@ -13,7 +13,7 @@ DIST_SUBDIR= spice EXTRACT_ONLY= spice3f5${EXTRACT_SUFX} MAINTAINER= hrs@FreeBSD.org -COMMENT= A general-purpose circuit simulation program +COMMENT= General-purpose circuit simulation program LICENSE= BSD diff --git a/cad/systemc/Makefile b/cad/systemc/Makefile index 2dcc8ac7d60f..8f3b4a94176a 100644 --- a/cad/systemc/Makefile +++ b/cad/systemc/Makefile @@ -7,7 +7,7 @@ CATEGORIES= cad devel EXTRACT_SUFX= .tgz MAINTAINER= ports@FreeBSD.org -COMMENT= A modeling platform for system-level C++ models +COMMENT= Modeling platform for system-level C++ models RESTRICTED= You have to register at http://www.systemc.org/kmembership_info/individual_signup first diff --git a/cad/transcalc/Makefile b/cad/transcalc/Makefile index c75c4bc905f8..ec22b8f31cff 100644 --- a/cad/transcalc/Makefile +++ b/cad/transcalc/Makefile @@ -8,7 +8,7 @@ CATEGORIES= cad MASTER_SITES= http://transcalc.sourceforge.net/ MAINTAINER= ports@FreeBSD.org -COMMENT= A analysis and synthesis tool for RF and microwave transmission lines +COMMENT= Analysis and synthesis tool for RF and microwave transmission lines USES= pkgconfig USE_GNOME= gtk20 |