Import the FreeBSD/arm libc bits.

Obtained from:	NetBSD

53 files changed, 6228 insertions, 0 deletions

diff --git a/lib/libc/Makefile b/lib/libc/Makefile
index ceea67a5bb8f..24072d0d6fe3 100644
--- a/lib/libc/Makefile
+++ b/lib/libc/Makefile
@@ -57,6 +57,9 @@ NOASM=
 .include "${.CURDIR}/rpc/Makefile.inc"
 .include "${.CURDIR}/uuid/Makefile.inc"
 .include "${.CURDIR}/xdr/Makefile.inc"
+.if ${MACHINE_ARCH} == "arm"
+.include "${.CURDIR}/softfloat/Makefile.inc"
+.endif
 .if !defined(NO_YP_LIBC)
 CFLAGS+= -DYP
 .include "${.CURDIR}/yp/Makefile.inc"
diff --git a/lib/libc/arm/SYS.h b/lib/libc/arm/SYS.h
new file mode 100644
index 000000000000..c8bf2fe9d636
--- /dev/null
+++ b/lib/libc/arm/SYS.h
@@ -0,0 +1,90 @@
+/*	$NetBSD: SYS.h,v 1.8 2003/08/07 16:42:02 agc Exp $	*/
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * William Jolitz.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)SYS.h	5.5 (Berkeley) 5/7/91
+ * $FreeBSD$
+ */
+
+#include <machine/asm.h>
+#include <sys/syscall.h>
+#include <machine/swi.h>
+
+#ifdef __STDC__
+#define SYSTRAP(x)	swi 0 | SYS_ ## x
+#else
+#define SYSTRAP(x)	swi 0 | SYS_/**/x
+#endif
+
+#ifdef __ELF__
+#define	CERROR		_C_LABEL(cerror)
+#define	CURBRK		_C_LABEL(curbrk)
+#else
+#define	CERROR		_ASM_LABEL(cerror)
+#define	CURBRK		_ASM_LABEL(curbrk)
+#endif
+
+#define _SYSCALL_NOERROR(x)						\
+	ENTRY(__CONCAT(__sys_, x));					\
+	.weak _C_LABEL(x);						\
+	.set _C_LABEL(x), _C_LABEL(__CONCAT(__sys_,x));			\
+	.weak _C_LABEL(__CONCAT(_,x));					\
+	.set _C_LABEL(__CONCAT(_,x)),_C_LABEL(__CONCAT(__sys_,x));	\
+	SYSTRAP(x)
+
+#define _SYSCALL(x)							\
+	_SYSCALL_NOERROR(x);						\
+	bcs PIC_SYM(CERROR, PLT)
+
+#define SYSCALL_NOERROR(x)						\
+	_SYSCALL_NOERROR(x)
+
+#define SYSCALL(x)							\
+	_SYSCALL(x)
+
+
+#define PSEUDO_NOERROR(x)						\
+	_SYSCALL_NOERROR(x);						\
+	mov r15, r14
+
+#define PSEUDO(x)							\
+	_SYSCALL(x);							\
+	mov r15, r14
+
+
+#define RSYSCALL_NOERROR(x)						\
+	PSEUDO_NOERROR(x)
+
+#define RSYSCALL(x)							\
+	PSEUDO(x)
+
+	.globl  CERROR
diff --git a/lib/libc/arm/_fpmath.h b/lib/libc/arm/_fpmath.h
new file mode 100644
index 000000000000..e5347946fd71
--- /dev/null
+++ b/lib/libc/arm/_fpmath.h
@@ -0,0 +1,48 @@
+/*-
+ * Copyright (c) 2002, 2003 David Schultz <dschultz@uclink.Berkeley.EDU>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+union IEEEl2bits {
+	long double	e;
+	struct {
+		unsigned int	manl	:32;
+		unsigned int	manh	:32;
+		unsigned int	exp	:15;
+		unsigned int	sign	:1;
+		unsigned int	junk	:16;
+	} bits;
+};
+
+#define	mask_nbit_l(u)	((u).bits.manh &= 0x7fffffff)
+
+#define	LDBL_MANH_SIZE	32
+#define	LDBL_MANL_SIZE	32
+
+#define	LDBL_TO_ARRAY32(u, a) do {			\
+	(a)[0] = (uint32_t)(u).bits.manl;		\
+	(a)[1] = (uint32_t)(u).bits.manh;		\
+} while(0)
diff --git a/lib/libc/arm/arith.h b/lib/libc/arm/arith.h
new file mode 100644
index 000000000000..86121bf9a80c
--- /dev/null
+++ b/lib/libc/arm/arith.h
@@ -0,0 +1,16 @@
+/*
+ * MD header for contrib/gdtoa
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * NOTE: The definitions in this file must be correct or strtod(3) and
+ * floating point formats in printf(3) will break!  The file can be
+ * generated by running contrib/gdtoa/arithchk.c on the target
+ * architecture.  See contrib/gdtoa/gdtoaimp.h for details.
+ */
+
+#define IEEE_8087
+#define Arith_Kind_ASL 1
+#define Sudden_Underflow
diff --git a/lib/libc/arm/gen/Makefile.inc b/lib/libc/arm/gen/Makefile.inc
new file mode 100644
index 000000000000..d34fcf734832
--- /dev/null
+++ b/lib/libc/arm/gen/Makefile.inc
@@ -0,0 +1,6 @@
+#	@(#)Makefile.inc	8.1 (Berkeley) 6/4/93
+# $FreeBSD$
+
+SRCS+=	_ctx_start.S _setjmp.S alloca.S fabs.c frexp.c \
+	infinity.c isinf.c ldexp.c makecontext.c modf.c \
+	setjmp.S signalcontext.c sigsetjmp.S divsi3.S
diff --git a/lib/libc/arm/gen/_ctx_start.S b/lib/libc/arm/gen/_ctx_start.S
new file mode 100644
index 000000000000..8187d74e8382
--- /dev/null
+++ b/lib/libc/arm/gen/_ctx_start.S
@@ -0,0 +1,8 @@
+#include <machine/asm.h>
+
+.ident	"$FreeBSD$"
+ENTRY(_ctx_start)
+	mov	pc, r0
+	mov	r0, r1
+	bl	_C_LABEL(ctx_done)
+	bl	_C_LABEL(abort)
diff --git a/lib/libc/arm/gen/_setjmp.S b/lib/libc/arm/gen/_setjmp.S
new file mode 100644
index 000000000000..b48f1e4e2140
--- /dev/null
+++ b/lib/libc/arm/gen/_setjmp.S
@@ -0,0 +1,105 @@
+/*	$NetBSD: _setjmp.S,v 1.5 2003/04/05 23:08:51 bjh21 Exp $	*/
+
+/*
+ * Copyright (c) 1997 Mark Brinicombe
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#define SOFTFLOAT /* XXX */
+/*
+ * C library -- _setjmp, _longjmp
+ *
+ *	_longjmp(a,v)
+ * will generate a "return(v)" from the last call to
+ *	_setjmp(a)
+ * by restoring registers from the stack.
+ * The previous signal state is NOT restored.
+ *
+ * Note: r0 is the return value
+ *       r1-r3 are scratch registers in functions
+ */
+
+ENTRY(_setjmp)
+	ldr	r1, .L_setjmp_magic
+	str	r1, [r0], #4
+#ifdef SOFTFLOAT
+	add	r0, r0, #52
+#else
+	/* Store fp registers */
+	sfm	f4, 4, [r0], #48
+	/* Store fpsr */
+	rfs	r1
+	str	r1, [r0], #0x0004
+#endif	/* SOFTFLOAT */
+	/* Store integer registers */
+        stmia	r0, {r4-r14}
+
+        mov	r0, #0x00000000
+        mov	r15, r14
+
+.L_setjmp_magic:
+	.word	_JB_MAGIC__SETJMP
+
+ENTRY(_longjmp)
+	ldr	r2, .L_setjmp_magic
+	ldr	r3, [r0], #4
+	teq	r2, r3
+	bne	botch
+
+#ifdef SOFTFLOAT
+	add	r0, r0, #52
+#else
+	/* Restore fp registers */
+	lfm	f4, 4, [r0], #48
+	/* Restore fpsr */
+	ldr	r4, [r0], #0x0004
+	wfs	r4
+#endif	/* SOFTFLOAT */
+       	/* Restore integer registers */
+        ldmia	r0, {r4-r14}
+
+	/* Validate sp and r14 */
+	teq	sp, #0
+	teqne	r14, #0
+	beq	botch
+
+	/* Set return value */
+	mov	r0, r1
+	teq	r0, #0x00000000
+	moveq	r0, #0x00000001
+	mov	r15, r14
+
+	/* validation failed, die die die. */
+botch:
+	bl	PIC_SYM(_C_LABEL(longjmperror), PLT)
+	bl	PIC_SYM(_C_LABEL(abort), PLT)
+	b	. - 8		/* Cannot get here */
diff --git a/lib/libc/arm/gen/alloca.S b/lib/libc/arm/gen/alloca.S
new file mode 100644
index 000000000000..4694d3c87525
--- /dev/null
+++ b/lib/libc/arm/gen/alloca.S
@@ -0,0 +1,45 @@
+/*	$NetBSD: alloca.S,v 1.3 2003/04/05 23:08:51 bjh21 Exp $	*/
+
+/*
+ * Copyright (c) 1995 Mark Brinicombe
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* like alloc, but automatic automatic free in return */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+ENTRY(alloca)
+	add	r0, r0, #0x00000007	/* round up to next 8 byte alignment */
+	bic	r0, r0, #0x00000007
+	sub	sp, sp, r0		/* Adjust the stack pointer */
+	mov	r0, sp			/* r0 = base of new space */
+	mov	r15, r14		/* return */
diff --git a/lib/libc/arm/gen/divsi3.S b/lib/libc/arm/gen/divsi3.S
new file mode 100644
index 000000000000..baab96be29e9
--- /dev/null
+++ b/lib/libc/arm/gen/divsi3.S
@@ -0,0 +1,387 @@
+/*	$NetBSD: divsi3.S,v 1.4 2003/04/05 23:27:15 bjh21 Exp $	*/
+
+/*
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+/* 
+ * stack is aligned as there's a possibility of branching to L_overflow
+ * which makes a C call
+ */
+
+ENTRY(__umodsi3)
+	stmfd	sp!, {lr}
+	sub	sp, sp, #4	/* align stack */
+	bl	.L_udivide
+	add	sp, sp, #4	/* unalign stack */
+	mov	r0, r1
+	ldmfd	sp!, {pc}
+
+ENTRY(__modsi3)
+	stmfd	sp!, {lr}
+	sub	sp, sp, #4	/* align stack */
+	bl	.L_divide
+	add	sp, sp, #4	/* unalign stack */
+	mov	r0, r1
+	ldmfd	sp!, {pc}
+
+.L_overflow:
+#if !defined(_KERNEL) && !defined(_STANDALONE)
+	mov	r0, #8			/* SIGFPE */
+	bl	PIC_SYM(_C_LABEL(raise), PLT)	/* raise it */
+	mov	r0, #0
+#else
+	/* XXX should cause a fatal error */
+	mvn	r0, #0
+#endif
+	mov	pc, lr
+
+ENTRY(__udivsi3)
+.L_udivide:				/* r0 = r0 / r1; r1 = r0 % r1 */
+	eor     r0, r1, r0 
+	eor     r1, r0, r1 
+	eor     r0, r1, r0 
+					/* r0 = r1 / r0; r1 = r1 % r0 */
+	cmp	r0, #1
+	bcc	.L_overflow
+	beq	.L_divide_l0
+	mov	ip, #0
+	movs	r1, r1
+	bpl	.L_divide_l1
+	orr	ip, ip, #0x20000000	/* ip bit 0x20000000 = -ve r1 */
+	movs	r1, r1, lsr #1
+	orrcs	ip, ip, #0x10000000	/* ip bit 0x10000000 = bit 0 of r1 */
+	b	.L_divide_l1
+
+.L_divide_l0:				/* r0 == 1 */
+	mov	r0, r1
+	mov	r1, #0
+	mov	pc, lr
+
+ENTRY(__divsi3)
+.L_divide:				/* r0 = r0 / r1; r1 = r0 % r1 */
+	eor     r0, r1, r0 
+	eor     r1, r0, r1 
+	eor     r0, r1, r0 
+					/* r0 = r1 / r0; r1 = r1 % r0 */
+	cmp	r0, #1
+	bcc	.L_overflow
+	beq	.L_divide_l0
+	ands	ip, r0, #0x80000000
+	rsbmi	r0, r0, #0
+	ands	r2, r1, #0x80000000
+	eor	ip, ip, r2
+	rsbmi	r1, r1, #0
+	orr	ip, r2, ip, lsr #1	/* ip bit 0x40000000 = -ve division */
+					/* ip bit 0x80000000 = -ve remainder */
+
+.L_divide_l1:
+	mov	r2, #1
+	mov	r3, #0
+
+	/*
+	 * If the highest bit of the dividend is set, we have to be
+	 * careful when shifting the divisor. Test this. 
+	 */
+	movs	r1,r1
+	bpl	.L_old_code
+
+	/*
+	 * At this point, the highest bit of r1 is known to be set.
+	 * We abuse this below in the tst instructions.
+	 */
+	tst	r1, r0 /*, lsl #0 */
+	bmi	.L_divide_b1
+	tst	r1, r0, lsl #1
+	bmi	.L_divide_b2
+	tst	r1, r0, lsl #2
+	bmi	.L_divide_b3
+	tst	r1, r0, lsl #3
+	bmi	.L_divide_b4
+	tst	r1, r0, lsl #4
+	bmi	.L_divide_b5
+	tst	r1, r0, lsl #5
+	bmi	.L_divide_b6
+	tst	r1, r0, lsl #6
+	bmi	.L_divide_b7
+	tst	r1, r0, lsl #7
+	bmi	.L_divide_b8
+	tst	r1, r0, lsl #8
+	bmi	.L_divide_b9
+	tst	r1, r0, lsl #9
+	bmi	.L_divide_b10
+	tst	r1, r0, lsl #10
+	bmi	.L_divide_b11
+	tst	r1, r0, lsl #11
+	bmi	.L_divide_b12
+	tst	r1, r0, lsl #12
+	bmi	.L_divide_b13
+	tst	r1, r0, lsl #13
+	bmi	.L_divide_b14
+	tst	r1, r0, lsl #14
+	bmi	.L_divide_b15
+	tst	r1, r0, lsl #15
+	bmi	.L_divide_b16
+	tst	r1, r0, lsl #16
+	bmi	.L_divide_b17
+	tst	r1, r0, lsl #17
+	bmi	.L_divide_b18
+	tst	r1, r0, lsl #18
+	bmi	.L_divide_b19
+	tst	r1, r0, lsl #19
+	bmi	.L_divide_b20
+	tst	r1, r0, lsl #20
+	bmi	.L_divide_b21
+	tst	r1, r0, lsl #21
+	bmi	.L_divide_b22
+	tst	r1, r0, lsl #22
+	bmi	.L_divide_b23
+	tst	r1, r0, lsl #23
+	bmi	.L_divide_b24
+	tst	r1, r0, lsl #24
+	bmi	.L_divide_b25
+	tst	r1, r0, lsl #25
+	bmi	.L_divide_b26
+	tst	r1, r0, lsl #26
+	bmi	.L_divide_b27
+	tst	r1, r0, lsl #27
+	bmi	.L_divide_b28
+	tst	r1, r0, lsl #28
+	bmi	.L_divide_b29
+	tst	r1, r0, lsl #29
+	bmi	.L_divide_b30
+	tst	r1, r0, lsl #30
+	bmi	.L_divide_b31
+/*
+ * instead of:
+ *	tst	r1, r0, lsl #31
+ *	bmi	.L_divide_b32
+ */
+	b	.L_divide_b32
+
+.L_old_code:
+	cmp	r1, r0
+	bcc	.L_divide_b0
+	cmp	r1, r0, lsl #1
+	bcc	.L_divide_b1
+	cmp	r1, r0, lsl #2
+	bcc	.L_divide_b2
+	cmp	r1, r0, lsl #3
+	bcc	.L_divide_b3
+	cmp	r1, r0, lsl #4
+	bcc	.L_divide_b4
+	cmp	r1, r0, lsl #5
+	bcc	.L_divide_b5
+	cmp	r1, r0, lsl #6
+	bcc	.L_divide_b6
+	cmp	r1, r0, lsl #7
+	bcc	.L_divide_b7
+	cmp	r1, r0, lsl #8
+	bcc	.L_divide_b8
+	cmp	r1, r0, lsl #9
+	bcc	.L_divide_b9
+	cmp	r1, r0, lsl #10
+	bcc	.L_divide_b10
+	cmp	r1, r0, lsl #11
+	bcc	.L_divide_b11
+	cmp	r1, r0, lsl #12
+	bcc	.L_divide_b12
+	cmp	r1, r0, lsl #13
+	bcc	.L_divide_b13
+	cmp	r1, r0, lsl #14
+	bcc	.L_divide_b14
+	cmp	r1, r0, lsl #15
+	bcc	.L_divide_b15
+	cmp	r1, r0, lsl #16
+	bcc	.L_divide_b16
+	cmp	r1, r0, lsl #17
+	bcc	.L_divide_b17
+	cmp	r1, r0, lsl #18
+	bcc	.L_divide_b18
+	cmp	r1, r0, lsl #19
+	bcc	.L_divide_b19
+	cmp	r1, r0, lsl #20
+	bcc	.L_divide_b20
+	cmp	r1, r0, lsl #21
+	bcc	.L_divide_b21
+	cmp	r1, r0, lsl #22
+	bcc	.L_divide_b22
+	cmp	r1, r0, lsl #23
+	bcc	.L_divide_b23
+	cmp	r1, r0, lsl #24
+	bcc	.L_divide_b24
+	cmp	r1, r0, lsl #25
+	bcc	.L_divide_b25
+	cmp	r1, r0, lsl #26
+	bcc	.L_divide_b26
+	cmp	r1, r0, lsl #27
+	bcc	.L_divide_b27
+	cmp	r1, r0, lsl #28
+	bcc	.L_divide_b28
+	cmp	r1, r0, lsl #29
+	bcc	.L_divide_b29
+	cmp	r1, r0, lsl #30
+	bcc	.L_divide_b30
+.L_divide_b32:
+	cmp	r1, r0, lsl #31
+	subhs	r1, r1,r0, lsl #31
+	addhs	r3, r3,r2, lsl #31
+.L_divide_b31:
+	cmp	r1, r0, lsl #30
+	subhs	r1, r1,r0, lsl #30
+	addhs	r3, r3,r2, lsl #30
+.L_divide_b30:
+	cmp	r1, r0, lsl #29
+	subhs	r1, r1,r0, lsl #29
+	addhs	r3, r3,r2, lsl #29
+.L_divide_b29:
+	cmp	r1, r0, lsl #28
+	subhs	r1, r1,r0, lsl #28
+	addhs	r3, r3,r2, lsl #28
+.L_divide_b28:
+	cmp	r1, r0, lsl #27
+	subhs	r1, r1,r0, lsl #27
+	addhs	r3, r3,r2, lsl #27
+.L_divide_b27:
+	cmp	r1, r0, lsl #26
+	subhs	r1, r1,r0, lsl #26
+	addhs	r3, r3,r2, lsl #26
+.L_divide_b26:
+	cmp	r1, r0, lsl #25
+	subhs	r1, r1,r0, lsl #25
+	addhs	r3, r3,r2, lsl #25
+.L_divide_b25:
+	cmp	r1, r0, lsl #24
+	subhs	r1, r1,r0, lsl #24
+	addhs	r3, r3,r2, lsl #24
+.L_divide_b24:
+	cmp	r1, r0, lsl #23
+	subhs	r1, r1,r0, lsl #23
+	addhs	r3, r3,r2, lsl #23
+.L_divide_b23:
+	cmp	r1, r0, lsl #22
+	subhs	r1, r1,r0, lsl #22
+	addhs	r3, r3,r2, lsl #22
+.L_divide_b22:
+	cmp	r1, r0, lsl #21
+	subhs	r1, r1,r0, lsl #21
+	addhs	r3, r3,r2, lsl #21
+.L_divide_b21:
+	cmp	r1, r0, lsl #20
+	subhs	r1, r1,r0, lsl #20
+	addhs	r3, r3,r2, lsl #20
+.L_divide_b20:
+	cmp	r1, r0, lsl #19
+	subhs	r1, r1,r0, lsl #19
+	addhs	r3, r3,r2, lsl #19
+.L_divide_b19:
+	cmp	r1, r0, lsl #18
+	subhs	r1, r1,r0, lsl #18
+	addhs	r3, r3,r2, lsl #18
+.L_divide_b18:
+	cmp	r1, r0, lsl #17
+	subhs	r1, r1,r0, lsl #17
+	addhs	r3, r3,r2, lsl #17
+.L_divide_b17:
+	cmp	r1, r0, lsl #16
+	subhs	r1, r1,r0, lsl #16
+	addhs	r3, r3,r2, lsl #16
+.L_divide_b16:
+	cmp	r1, r0, lsl #15
+	subhs	r1, r1,r0, lsl #15
+	addhs	r3, r3,r2, lsl #15
+.L_divide_b15:
+	cmp	r1, r0, lsl #14
+	subhs	r1, r1,r0, lsl #14
+	addhs	r3, r3,r2, lsl #14
+.L_divide_b14:
+	cmp	r1, r0, lsl #13
+	subhs	r1, r1,r0, lsl #13
+	addhs	r3, r3,r2, lsl #13
+.L_divide_b13:
+	cmp	r1, r0, lsl #12
+	subhs	r1, r1,r0, lsl #12
+	addhs	r3, r3,r2, lsl #12
+.L_divide_b12:
+	cmp	r1, r0, lsl #11
+	subhs	r1, r1,r0, lsl #11
+	addhs	r3, r3,r2, lsl #11
+.L_divide_b11:
+	cmp	r1, r0, lsl #10
+	subhs	r1, r1,r0, lsl #10
+	addhs	r3, r3,r2, lsl #10
+.L_divide_b10:
+	cmp	r1, r0, lsl #9
+	subhs	r1, r1,r0, lsl #9
+	addhs	r3, r3,r2, lsl #9
+.L_divide_b9:
+	cmp	r1, r0, lsl #8
+	subhs	r1, r1,r0, lsl #8
+	addhs	r3, r3,r2, lsl #8
+.L_divide_b8:
+	cmp	r1, r0, lsl #7
+	subhs	r1, r1,r0, lsl #7
+	addhs	r3, r3,r2, lsl #7
+.L_divide_b7:
+	cmp	r1, r0, lsl #6
+	subhs	r1, r1,r0, lsl #6
+	addhs	r3, r3,r2, lsl #6
+.L_divide_b6:
+	cmp	r1, r0, lsl #5
+	subhs	r1, r1,r0, lsl #5
+	addhs	r3, r3,r2, lsl #5
+.L_divide_b5:
+	cmp	r1, r0, lsl #4
+	subhs	r1, r1,r0, lsl #4
+	addhs	r3, r3,r2, lsl #4
+.L_divide_b4:
+	cmp	r1, r0, lsl #3
+	subhs	r1, r1,r0, lsl #3
+	addhs	r3, r3,r2, lsl #3
+.L_divide_b3:
+	cmp	r1, r0, lsl #2
+	subhs	r1, r1,r0, lsl #2
+	addhs	r3, r3,r2, lsl #2
+.L_divide_b2:
+	cmp	r1, r0, lsl #1
+	subhs	r1, r1,r0, lsl #1
+	addhs	r3, r3,r2, lsl #1
+.L_divide_b1:
+	cmp	r1, r0
+	subhs	r1, r1, r0
+	addhs	r3, r3, r2
+.L_divide_b0:
+
+	tst	ip, #0x20000000
+	bne	.L_udivide_l1
+	mov	r0, r3
+	cmp	ip, #0
+	rsbmi	r1, r1, #0
+	movs	ip, ip, lsl #1
+	bicmi	r0, r0, #0x80000000	/* Fix incase we divided 0x80000000 */
+	rsbmi	r0, r0, #0
+	mov	pc, lr
+
+.L_udivide_l1:
+	tst	ip, #0x10000000
+	mov	r1, r1, lsl #1
+	orrne	r1, r1, #1
+	mov	r3, r3, lsl #1
+	cmp	r1, r0
+	subhs	r1, r1, r0
+	addhs	r3, r3, r2
+	mov	r0, r3
+	mov	pc, lr
diff --git a/lib/libc/arm/gen/fabs.c b/lib/libc/arm/gen/fabs.c
new file mode 100644
index 000000000000..8bb15025aead
--- /dev/null
+++ b/lib/libc/arm/gen/fabs.c
@@ -0,0 +1,46 @@
+/*	$NetBSD: fabs.c,v 1.2 2002/05/26 11:48:01 wiz Exp $	*/
+
+/*
+ * Copyright (c) 1996 Mark Brinicombe
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * fabs(x) returns the absolute value of x.
+ */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+double
+fabs(double x)
+{
+	if (x < 0)
+		x = -x;
+	return(x);
+}
diff --git a/lib/libc/arm/gen/frexp.c b/lib/libc/arm/gen/frexp.c
new file mode 100644
index 000000000000..37f6a57a5d38
--- /dev/null
+++ b/lib/libc/arm/gen/frexp.c
@@ -0,0 +1,67 @@
+/*-
+ * Copyright (c) 1991, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)frexp.c	8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#include <math.h>
+
+double
+frexp(value, eptr)
+	double value;
+	int *eptr;
+{
+	union {
+                double v;
+                struct {
+			u_int u_mant2 : 32;
+			u_int u_mant1 : 20;
+			u_int   u_exp : 11;
+                        u_int  u_sign :  1;
+                } s;
+        } u;
+
+	if (value) {
+		u.v = value;
+		*eptr = u.s.u_exp - 1022;
+		u.s.u_exp = 1022;
+		return(u.v);
+	} else {
+		*eptr = 0;
+		return((double)0);
+	}
+}
diff --git a/lib/libc/arm/gen/infinity.c b/lib/libc/arm/gen/infinity.c
new file mode 100644
index 000000000000..60faf42a7ea3
--- /dev/null
+++ b/lib/libc/arm/gen/infinity.c
@@ -0,0 +1,26 @@
+/*
+ * infinity.c
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <math.h>
+
+/* bytes for +Infinity on a 387 */
+const union __infinity_un __infinity = { 
+#if BYTE_ORDER == BIG_ENDIAN
+	{ 0x7f, 0xf0, 0, 0, 0, 0, 0, 0 }
+#else
+	{ 0, 0, 0, 0, 0, 0, 0xf0, 0x7f }
+#endif
+};
+
+/* bytes for NaN */
+const union __nan_un __nan = {
+#if BYTE_ORDER == BIG_ENDIAN
+	{0xff, 0xc0, 0, 0}
+#else
+	{ 0, 0, 0xc0, 0xff }
+#endif
+};
diff --git a/lib/libc/arm/gen/isinf.c b/lib/libc/arm/gen/isinf.c
new file mode 100644
index 000000000000..d894b4f7fa79
--- /dev/null
+++ b/lib/libc/arm/gen/isinf.c
@@ -0,0 +1,70 @@
+/*-
+ * Copyright (c) 1991, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* For binary compat; to be removed in FreeBSD 6.0. */
+
+#if defined(LIBC_SCCS) && !defined(lint)
+static char sccsid[] = "@(#)isinf.c	8.1 (Berkeley) 6/4/93";
+#endif /* LIBC_SCCS and not lint */
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+
+int
+isnan(d)
+	double d;
+{
+	register struct IEEEdp {
+		u_int manl : 32;
+		u_int manh : 20;
+		u_int  exp : 11;
+		u_int sign :  1;
+	} *p = (struct IEEEdp *)&d;
+
+	return(p->exp == 2047 && (p->manh || p->manl));
+}
+
+int
+isinf(d)
+	double d;
+{
+	register struct IEEEdp {
+		u_int manl : 32;
+		u_int manh : 20;
+		u_int  exp : 11;
+		u_int sign :  1;
+	} *p = (struct IEEEdp *)&d;
+
+	return(p->exp == 2047 && !p->manh && !p->manl);
+}
diff --git a/lib/libc/arm/gen/ldexp.c b/lib/libc/arm/gen/ldexp.c
new file mode 100644
index 000000000000..9aed74d9336c
--- /dev/null
+++ b/lib/libc/arm/gen/ldexp.c
@@ -0,0 +1,155 @@
+/*-
+ * Copyright (c) 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Charles M. Hannum.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#if 0
+#if defined(LIBC_SCCS) && !defined(lint)
+__RCSID("$NetBSD: ldexp.c,v 1.8 1999/08/30 18:28:26 mycroft Exp $");
+#endif /* LIBC_SCCS and not lint */
+#endif
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#include <errno.h>
+#include <math.h>
+#include <machine/ieee.h>
+
+/*
+ * Multiply the given value by 2^exp.
+ */
+double
+ldexp(val, exp)
+	double val;
+	int exp;
+{
+	int oldexp, newexp;
+	union {
+		double v;
+		struct ieee_double s;
+	} u, mul;
+
+	u.v = val;
+	oldexp = u.s.dbl_exp;
+
+	/*
+	 * If input is zero, Inf or NaN, just return it.
+	 */
+	if (u.v == 0.0 || oldexp == DBL_EXP_INFNAN)
+		return (val);
+
+	if (oldexp == 0) {
+		/*
+		 * u.v is denormal.  We must adjust it so that the exponent
+		 * arithmetic below will work.
+		 */
+		if (exp <= DBL_EXP_BIAS) {
+			/*
+			 * Optimization: if the scaling can be done in a single
+			 * multiply, or underflows, just do it now.
+			 */
+			if (exp <= -DBL_FRACBITS) {
+				errno = ERANGE;
+				return (0.0);
+			}
+			mul.v = 0.0;
+			mul.s.dbl_exp = exp + DBL_EXP_BIAS;
+			u.v *= mul.v;
+			if (u.v == 0.0) {
+				errno = ERANGE;
+				return (0.0);
+			}
+			return (u.v);
+		} else {
+			/*
+			 * We know that exp is very large, and therefore the
+			 * result cannot be denormal (though it may be Inf).
+			 * Shift u.v by just enough to make it normal.
+			 */
+			mul.v = 0.0;
+			mul.s.dbl_exp = DBL_FRACBITS + DBL_EXP_BIAS;
+			u.v *= mul.v;
+			exp -= DBL_FRACBITS;
+			oldexp = u.s.dbl_exp;
+		}
+	}
+
+	/*
+	 * u.v is now normalized and oldexp has been adjusted if necessary.
+	 * Calculate the new exponent and check for underflow and overflow.
+	 */
+	newexp = oldexp + exp;
+
+	if (newexp <= 0) {
+		/*
+		 * The output number is either denormal or underflows (see
+		 * comments in machine/ieee.h).
+		 */
+		if (newexp <= -DBL_FRACBITS) {
+			errno = ERANGE;
+			return (0.0);
+		}
+		/*
+		 * Denormalize the result.  We do this with a multiply.  If exp
+		 * is very large, it won't fit in a double, so we have to
+		 * adjust the exponent first.  This is safe because we know
+		 * that u.v is normal at this point.
+		 */
+		if (exp <= -DBL_EXP_BIAS) {
+			u.s.dbl_exp = 1;
+			exp += oldexp - 1;
+		}
+		mul.v = 0.0;
+		mul.s.dbl_exp = exp + DBL_EXP_BIAS;
+		u.v *= mul.v;
+		return (u.v);
+	} else if (newexp >= DBL_EXP_INFNAN) {
+		/*
+		 * The result overflowed; return +/-Inf.
+		 */
+		u.s.dbl_exp = DBL_EXP_INFNAN;
+		u.s.dbl_frach = 0;
+		u.s.dbl_fracl = 0;
+		errno = ERANGE;
+		return (u.v);
+	} else {
+		/*
+		 * The result is normal; just replace the old exponent with the
+		 * new one.
+		 */
+		u.s.dbl_exp = newexp;
+		return (u.v);
+	}
+}
diff --git a/lib/libc/arm/gen/makecontext.c b/lib/libc/arm/gen/makecontext.c
new file mode 100644
index 000000000000..18aadf100fc9
--- /dev/null
+++ b/lib/libc/arm/gen/makecontext.c
@@ -0,0 +1,94 @@
+/*	$NetBSD: makecontext.c,v 1.2 2003/01/18 11:06:24 thorpej Exp $	*/
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Klaus Klein.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <stdlib.h>
+#include <stddef.h>
+#include <inttypes.h>
+#include <ucontext.h>
+
+#include <stdarg.h>
+
+extern void _ctx_start(ucontext_t *, int argc, ...);
+
+void
+ctx_done(ucontext_t *ucp)
+{       
+	        
+	if (ucp->uc_link == NULL)
+		exit(0);
+	else {  
+		setcontext((const ucontext_t *)ucp->uc_link);
+		abort();
+	}                                                      
+}   
+
+__weak_reference(__makecontext, makecontext);
+
+void
+__makecontext(ucontext_t *ucp, void (*func)(void), int argc, ...)
+{
+	__greg_t *gr = ucp->uc_mcontext.__gregs;
+	int i;
+	unsigned int *sp;
+	va_list ap;
+
+	/* Compute and align stack pointer. */
+	sp = (unsigned int *)
+	    (((uintptr_t)ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size) & ~7);
+	/* Allocate necessary stack space for arguments exceeding r0-3. */
+	if (argc > 4)
+		sp -= argc - 4;
+	gr[_REG_SP] = (__greg_t)sp;
+	/* Wipe out frame pointer. */
+	gr[_REG_FP] = 0;
+	/* Arrange for return via the trampoline code. */
+	gr[_REG_LR] = (__greg_t)_ctx_start;
+	gr[_REG_PC] = (__greg_t)func;
+
+	va_start(ap, argc);
+	/* Pass up to four arguments in r0-3. */
+	for (i = 0; i < argc && i < 4; i++)
+		gr[_REG_R0 + i] = va_arg(ap, int);
+	/* Pass any additional arguments on the stack. */
+	for (argc -= i; argc > 0; argc--)
+		*sp++ = va_arg(ap, int);
+	va_end(ap);
+}
diff --git a/lib/libc/arm/gen/modf.c b/lib/libc/arm/gen/modf.c
new file mode 100644
index 000000000000..347090cf1fe7
--- /dev/null
+++ b/lib/libc/arm/gen/modf.c
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 1994, 1995 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ * 
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ * 
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
+ * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ * 
+ * Carnegie Mellon requests users of this software to return to
+ *
+ *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
+ *  School of Computer Science
+ *  Carnegie Mellon University
+ *  Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ *
+ *	$NetBSD: modf.c,v 1.1 1995/02/10 17:50:25 cgd Exp $
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#include <errno.h>
+#include <math.h>
+#include <machine/ieee.h>
+
+/*
+ * double modf(double val, double *iptr)
+ * returns: f and i such that |f| < 1.0, (f + i) = val, and
+ *	sign(f) == sign(i) == sign(val).
+ *
+ * Beware signedness when doing subtraction, and also operand size!
+ */
+double
+modf(val, iptr)
+	double val, *iptr;
+{
+	union doub {
+		double v;
+		struct ieee_double s;
+	} u, v;
+	u_int64_t frac;
+
+	/*
+	 * If input is Inf or NaN, return it and leave i alone.
+	 */
+	u.v = val;
+	if (u.s.dbl_exp == DBL_EXP_INFNAN)
+		return (u.v);
+
+	/*
+	 * If input can't have a fractional part, return
+	 * (appropriately signed) zero, and make i be the input.
+	 */
+	if ((int)u.s.dbl_exp - DBL_EXP_BIAS > DBL_FRACBITS - 1) {
+		*iptr = u.v;
+		v.v = 0.0;
+		v.s.dbl_sign = u.s.dbl_sign;
+		return (v.v);
+	}
+
+	/*
+	 * If |input| < 1.0, return it, and set i to the appropriately
+	 * signed zero.
+	 */
+	if (u.s.dbl_exp < DBL_EXP_BIAS) {
+		v.v = 0.0;
+		v.s.dbl_sign = u.s.dbl_sign;
+		*iptr = v.v;
+		return (u.v);
+	}
+
+	/*
+	 * There can be a fractional part of the input.
+	 * If you look at the math involved for a few seconds, it's
+	 * plain to see that the integral part is the input, with the
+	 * low (DBL_FRACBITS - (exponent - DBL_EXP_BIAS)) bits zeroed,
+	 * the the fractional part is the part with the rest of the
+	 * bits zeroed.  Just zeroing the high bits to get the
+	 * fractional part would yield a fraction in need of
+	 * normalization.  Therefore, we take the easy way out, and
+	 * just use subtraction to get the fractional part.
+	 */
+	v.v = u.v;
+	/* Zero the low bits of the fraction, the sleazy way. */
+	frac = ((u_int64_t)v.s.dbl_frach << 32) + v.s.dbl_fracl;
+	frac >>= DBL_FRACBITS - (u.s.dbl_exp - DBL_EXP_BIAS);
+	frac <<= DBL_FRACBITS - (u.s.dbl_exp - DBL_EXP_BIAS);
+	v.s.dbl_fracl = frac & 0xffffffff;
+	v.s.dbl_frach = frac >> 32;
+	*iptr = v.v;
+
+	u.v -= v.v;
+	u.s.dbl_sign = v.s.dbl_sign;
+	return (u.v);
+}
diff --git a/lib/libc/arm/gen/setjmp.S b/lib/libc/arm/gen/setjmp.S
new file mode 100644
index 000000000000..be12412a5b5b
--- /dev/null
+++ b/lib/libc/arm/gen/setjmp.S
@@ -0,0 +1,132 @@
+/*	$NetBSD: setjmp.S,v 1.5 2003/04/05 23:08:51 bjh21 Exp $	*/
+
+/*
+ * Copyright (c) 1997 Mark Brinicombe
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+/*
+ * C library -- setjmp, longjmp
+ *
+ *	longjmp(a,v)
+ * will generate a "return(v)" from the last call to
+ *	setjmp(a)
+ * by restoring registers from the stack.
+ * The previous signal state is restored.
+ */
+
+#define SOFTFLOAT /* XXX */
+ENTRY(setjmp)
+	/* Block all signals and retrieve the old signal mask */
+	stmfd	sp!, {r0, r14}
+	mov	r0, #0x00000000
+
+	bl	PIC_SYM(_C_LABEL(sigblock), PLT)
+	mov	r1, r0
+
+	ldmfd	sp!, {r0, r14}
+
+	/* Store signal mask */
+	str	r1, [r0, #(25 * 4)]
+
+	ldr	r1, .Lsetjmp_magic
+	str	r1, [r0], #4
+
+#ifdef SOFTFLOAT
+	add	r0, r0, #52
+#else
+	/* Store fp registers */
+	sfm	f4, 4, [r0], #48
+	/* Store fpsr */
+	rfs	r1
+	str	r1, [r0], #0x0004
+#endif	/*SOFTFLOAT*/
+	/* Store integer registers */
+        stmia	r0, {r4-r14}
+        mov	r0, #0x00000000
+        mov	r15, r14
+
+.Lsetjmp_magic:
+	.word	_JB_MAGIC_SETJMP
+
+
+.weak _C_LABEL(longjmp)
+.set _C_LABEL(longjmp), _C_LABEL(__longjmp)
+ENTRY(__longjmp)
+	ldr	r2, .Lsetjmp_magic
+	ldr	r3, [r0]
+	teq	r2, r3
+	bne	botch
+
+	/* Fetch signal mask */
+	ldr	r2, [r0, #(25 * 4)]
+
+	/* Set signal mask */
+	stmfd	sp!, {r0, r1, r14}
+	sub	sp, sp, #4	/* align the stack */
+
+	mov	r0, r2
+	bl	PIC_SYM(_C_LABEL(sigsetmask), PLT)
+
+	add	sp, sp, #4	/* unalign the stack */
+	ldmfd	sp!, {r0, r1, r14} 
+
+	add	r0, r0, #4
+#ifdef SOFTFLOAT
+	add	r0, r0, #52
+#else
+	/* Restore fp registers */
+	lfm	f4, 4, [r0], #48
+	/* Restore FPSR */
+	ldr	r4, [r0], #0x0004
+	wfs	r4
+#endif	/* SOFTFLOAT */
+	/* Restore integer registers */
+        ldmia	r0, {r4-r14}
+
+	/* Validate sp and r14 */
+	teq	sp, #0
+	teqne	r14, #0
+	beq	botch
+
+	/* Set return value */
+
+	mov	r0, r1
+	teq	r0, #0x00000000
+	moveq	r0, #0x00000001
+	mov	r15, r14
+
+	/* validation failed, die die die. */
+botch:
+	bl	PIC_SYM(_C_LABEL(longjmperror), PLT)
+	bl	PIC_SYM(_C_LABEL(abort), PLT)
+	b	. - 8		/* Cannot get here */
diff --git a/lib/libc/arm/gen/signalcontext.c b/lib/libc/arm/gen/signalcontext.c
new file mode 100644
index 000000000000..35108fd7e2c9
--- /dev/null
+++ b/lib/libc/arm/gen/signalcontext.c
@@ -0,0 +1,78 @@
+/*-
+ * Copyright (c) 2004 Olivier Houchard
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/signal.h>
+#include <sys/ucontext.h>
+
+#include <machine/frame.h>
+#include <machine/sigframe.h>
+
+#include <errno.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <strings.h>
+#include <signal.h>
+
+__weak_reference(__signalcontext, signalcontext);
+
+extern void _ctx_start(void);
+
+int
+__signalcontext(ucontext_t *ucp, int sig, __sighandler_t *func)
+{
+	struct sigframe *sfp;
+	__greg_t *gr = ucp->uc_mcontext.__gregs;
+	unsigned int *sp;
+	mcontext_t *mc;
+
+	mc = &ucp->uc_mcontext;
+	sp = (unsigned int *)
+	    (((uintptr_t)ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size) & ~7);
+
+	sfp = (struct sigframe *)sp - 1;
+	
+	bzero(sfp, sizeof(*sfp));
+	bcopy(ucp, &sfp->sf_uc, sizeof(*ucp));
+	sfp->sf_si.si_signo = sig;
+
+	gr[_REG_SP] = (__greg_t)sp;
+	/* Wipe out frame pointer. */
+	gr[_REG_FP] = 0;
+	/* Arrange for return via the trampoline code. */
+	gr[_REG_LR] = (__greg_t)_ctx_start;
+	gr[_REG_PC] = (__greg_t)func;
+	gr[_REG_R0] = (__greg_t)ucp;
+
+	ucp->uc_link = &sfp->sf_uc;
+	sigdelset(&ucp->uc_sigmask, sig);
+
+	return (0);
+}
diff --git a/lib/libc/arm/gen/sigsetjmp.S b/lib/libc/arm/gen/sigsetjmp.S
new file mode 100644
index 000000000000..ec14562ef43d
--- /dev/null
+++ b/lib/libc/arm/gen/sigsetjmp.S
@@ -0,0 +1,61 @@
+/*	$NetBSD: sigsetjmp.S,v 1.3 2002/08/17 19:54:30 thorpej Exp $	*/
+
+/*
+ * Copyright (c) 1997 Mark Brinicombe
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * C library -- sigsetjmp, siglongjmp
+ *
+ *	longjmp(a,v)
+ * will generate a "return(v)" from the last call to
+ *	setjmp(a, m)
+ * by restoring registers from the stack.
+ * The previous signal state is restored.
+ */
+
+ENTRY(sigsetjmp)
+	teq	r1, #0
+	beq	PIC_SYM(_C_LABEL(_setjmp), PLT)
+	b	PIC_SYM(_C_LABEL(setjmp), PLT)
+
+.L_setjmp_magic:
+	.word	_JB_MAGIC__SETJMP
+
+ENTRY(siglongjmp)
+	ldr	r2, .L_setjmp_magic
+	ldr	r3, [r0]
+	teq	r2, r3
+	beq	PIC_SYM(_C_LABEL(_longjmp), PLT)
+	b	PIC_SYM(_C_LABEL(longjmp), PLT)
diff --git a/lib/libc/arm/net/Makefile.inc b/lib/libc/arm/net/Makefile.inc
new file mode 100644
index 000000000000..69c34cb0d85a
--- /dev/null
+++ b/lib/libc/arm/net/Makefile.inc
@@ -0,0 +1,4 @@
+#	@(#)Makefile.inc	8.1 (Berkeley) 6/4/93
+# $FreeBSD$
+
+SRCS+=	ntohl.S ntohs.S htonl.S htons.S
diff --git a/lib/libc/arm/net/htonl.S b/lib/libc/arm/net/htonl.S
new file mode 100644
index 000000000000..152511e9006e
--- /dev/null
+++ b/lib/libc/arm/net/htonl.S
@@ -0,0 +1,48 @@
+/*	$NetBSD: byte_swap_4.S,v 1.2 2003/04/05 23:08:51 bjh21 Exp $	*/
+
+/*-
+ * Copyright (c) 1997 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Neil A. Carson
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+_ENTRY(_C_LABEL(htonl))
+_PROF_PROLOGUE
+	eor		r1, r0, r0, ror #16
+	bic		r1, r1, #0x00FF0000
+	mov		r0, r0, ror #8
+	eor		r0, r0, r1, lsr #8
+	mov		pc, lr
diff --git a/lib/libc/arm/net/htons.S b/lib/libc/arm/net/htons.S
new file mode 100644
index 000000000000..c031c1d22038
--- /dev/null
+++ b/lib/libc/arm/net/htons.S
@@ -0,0 +1,47 @@
+/*	$NetBSD: byte_swap_2.S,v 1.3 2003/04/05 23:08:51 bjh21 Exp $	*/
+
+/*-
+ * Copyright (c) 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Charles M. Hannum.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+_ENTRY(_C_LABEL(htons))
+_PROF_PROLOGUE
+	and		r1, r0, #0xff
+	mov		r0, r0, lsr #8
+	orr		r0, r0, r1, lsl #8
+	mov		pc, lr  
diff --git a/lib/libc/arm/net/ntohl.S b/lib/libc/arm/net/ntohl.S
new file mode 100644
index 000000000000..5b5e0a98a97e
--- /dev/null
+++ b/lib/libc/arm/net/ntohl.S
@@ -0,0 +1,48 @@
+/*	$NetBSD: byte_swap_4.S,v 1.2 2003/04/05 23:08:51 bjh21 Exp $	*/
+
+/*-
+ * Copyright (c) 1997 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Neil A. Carson
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+_ENTRY(_C_LABEL(ntohl))
+_PROF_PROLOGUE
+	eor		r1, r0, r0, ror #16
+	bic		r1, r1, #0x00FF0000
+	mov		r0, r0, ror #8
+	eor		r0, r0, r1, lsr #8
+	mov		pc, lr
diff --git a/lib/libc/arm/net/ntohs.S b/lib/libc/arm/net/ntohs.S
new file mode 100644
index 000000000000..8c44db6059b6
--- /dev/null
+++ b/lib/libc/arm/net/ntohs.S
@@ -0,0 +1,47 @@
+/*	$NetBSD: byte_swap_2.S,v 1.3 2003/04/05 23:08:51 bjh21 Exp $	*/
+
+/*-
+ * Copyright (c) 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Charles M. Hannum.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+_ENTRY(_C_LABEL(ntohs))
+_PROF_PROLOGUE
+	and		r1, r0, #0xff
+	mov		r0, r0, lsr #8
+	orr		r0, r0, r1, lsl #8
+	mov		pc, lr  
diff --git a/lib/libc/arm/softfloat/arm-gcc.h b/lib/libc/arm/softfloat/arm-gcc.h
new file mode 100644
index 000000000000..1204108250f7
--- /dev/null
+++ b/lib/libc/arm/softfloat/arm-gcc.h
@@ -0,0 +1,101 @@
+/* $NetBSD: arm-gcc.h,v 1.2 2001/02/21 18:09:25 bjh21 Exp $ */
+/* $FreeBSD$ */
+
+/*
+-------------------------------------------------------------------------------
+One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined.
+-------------------------------------------------------------------------------
+*/
+#ifdef __ARMEB__
+#define BIGENDIAN
+#else
+#define LITTLEENDIAN
+#endif
+
+/*
+-------------------------------------------------------------------------------
+The macro `BITS64' can be defined to indicate that 64-bit integer types are
+supported by the compiler.
+-------------------------------------------------------------------------------
+*/
+#define BITS64
+
+/*
+-------------------------------------------------------------------------------
+Each of the following `typedef's defines the most convenient type that holds
+integers of at least as many bits as specified.  For example, `uint8' should
+be the most convenient type that can hold unsigned integers of as many as
+8 bits.  The `flag' type must be able to hold either a 0 or 1.  For most
+implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed
+to the same as `int'.
+-------------------------------------------------------------------------------
+*/
+typedef int flag;
+typedef int uint8;
+typedef int int8;
+typedef int uint16;
+typedef int int16;
+typedef unsigned int uint32;
+typedef signed int int32;
+#ifdef BITS64
+typedef unsigned long long int uint64;
+typedef signed long long int int64;
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Each of the following `typedef's defines a type that holds integers
+of _exactly_ the number of bits specified.  For instance, for most
+implementation of C, `bits16' and `sbits16' should be `typedef'ed to
+`unsigned short int' and `signed short int' (or `short int'), respectively.
+-------------------------------------------------------------------------------
+*/
+typedef unsigned char bits8;
+typedef signed char sbits8;
+typedef unsigned short int bits16;
+typedef signed short int sbits16;
+typedef unsigned int bits32;
+typedef signed int sbits32;
+#ifdef BITS64
+typedef unsigned long long int bits64;
+typedef signed long long int sbits64;
+#endif
+
+#ifdef BITS64
+/*
+-------------------------------------------------------------------------------
+The `LIT64' macro takes as its argument a textual integer literal and
+if necessary ``marks'' the literal as having a 64-bit integer type.
+For example, the GNU C Compiler (`gcc') requires that 64-bit literals be
+appended with the letters `LL' standing for `long long', which is `gcc's
+name for the 64-bit integer type.  Some compilers may allow `LIT64' to be
+defined as the identity macro:  `#define LIT64( a ) a'.
+-------------------------------------------------------------------------------
+*/
+#define LIT64( a ) a##LL
+#endif
+
+/*
+-------------------------------------------------------------------------------
+The macro `INLINE' can be used before functions that should be inlined.  If
+a compiler does not support explicit inlining, this macro should be defined
+to be `static'.
+-------------------------------------------------------------------------------
+*/
+#define INLINE static __inline
+
+/*
+-------------------------------------------------------------------------------
+The ARM FPA is odd in that it stores doubles high-order word first, no matter
+what the endianness of the CPU.  VFP is sane.
+-------------------------------------------------------------------------------
+*/
+#if defined(SOFTFLOAT_FOR_GCC)
+#if defined(__VFP_FP__) || defined(__ARMEB__)
+#define FLOAT64_DEMANGLE(a)	(a)
+#define FLOAT64_MANGLE(a)	(a)
+#else
+#define FLOAT64_DEMANGLE(a)	(((a) << 32) | ((a) >> 32))
+#define FLOAT64_MANGLE(a)	FLOAT64_DEMANGLE(a)
+#endif
+#endif
diff --git a/lib/libc/arm/softfloat/milieu.h b/lib/libc/arm/softfloat/milieu.h
new file mode 100644
index 000000000000..54775c768b91
--- /dev/null
+++ b/lib/libc/arm/softfloat/milieu.h
@@ -0,0 +1,49 @@
+/* $NetBSD: milieu.h,v 1.1 2000/12/29 20:13:54 bjh21 Exp $ */
+/* $FreeBSD$ */
+
+/*
+===============================================================================
+
+This C header file is part of the SoftFloat IEC/IEEE Floating-point
+Arithmetic Package, Release 2a.
+
+Written by John R. Hauser.  This work was made possible in part by the
+International Computer Science Institute, located at Suite 600, 1947 Center
+Street, Berkeley, California 94704.  Funding was partially provided by the
+National Science Foundation under grant MIP-9311980.  The original version
+of this code was written as part of a project to build a fixed-point vector
+processor in collaboration with the University of California at Berkeley,
+overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
+arithmetic/SoftFloat.html'.
+
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
+TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
+
+Derivative works are acceptable, even for commercial purposes, so long as
+(1) they include prominent notice that the work is derivative, and (2) they
+include prominent notice akin to these four paragraphs for those parts of
+this code that are retained.
+
+===============================================================================
+*/
+
+/*
+-------------------------------------------------------------------------------
+Include common integer types and flags.
+-------------------------------------------------------------------------------
+*/
+#include "arm-gcc.h"
+
+/*
+-------------------------------------------------------------------------------
+Symbolic Boolean literals.
+-------------------------------------------------------------------------------
+*/
+enum {
+    FALSE = 0,
+    TRUE  = 1
+};
diff --git a/lib/libc/arm/softfloat/softfloat.h b/lib/libc/arm/softfloat/softfloat.h
new file mode 100644
index 000000000000..3019d90398e9
--- /dev/null
+++ b/lib/libc/arm/softfloat/softfloat.h
@@ -0,0 +1,313 @@
+/*	$NetBSD: softfloat.h,v 1.6 2002/05/12 13:12:46 bjh21 Exp $	*/
+/* $FreeBSD$ */
+
+/* This is a derivative work. */
+
+/*
+===============================================================================
+
+This C header file is part of the SoftFloat IEC/IEEE Floating-point
+Arithmetic Package, Release 2a.
+
+Written by John R. Hauser.  This work was made possible in part by the
+International Computer Science Institute, located at Suite 600, 1947 Center
+Street, Berkeley, California 94704.  Funding was partially provided by the
+National Science Foundation under grant MIP-9311980.  The original version
+of this code was written as part of a project to build a fixed-point vector
+processor in collaboration with the University of California at Berkeley,
+overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
+arithmetic/SoftFloat.html'.
+
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort
+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
+TIMES RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO
+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
+
+Derivative works are acceptable, even for commercial purposes, so long as
+(1) they include prominent notice that the work is derivative, and (2) they
+include prominent notice akin to these four paragraphs for those parts of
+this code that are retained.
+
+===============================================================================
+*/
+
+/*
+-------------------------------------------------------------------------------
+The macro `FLOATX80' must be defined to enable the extended double-precision
+floating-point format `floatx80'.  If this macro is not defined, the
+`floatx80' type will not be defined, and none of the functions that either
+input or output the `floatx80' type will be defined.  The same applies to
+the `FLOAT128' macro and the quadruple-precision format `float128'.
+-------------------------------------------------------------------------------
+*/
+/* #define FLOATX80 */
+/* #define FLOAT128 */
+
+#include <machine/ieeefp.h>
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE floating-point types.
+-------------------------------------------------------------------------------
+*/
+typedef unsigned int float32;
+typedef unsigned long long float64;
+#ifdef FLOATX80
+typedef struct {
+    unsigned short high;
+    unsigned long long low;
+} floatx80;
+#endif
+#ifdef FLOAT128
+typedef struct {
+    unsigned long long high, low;
+} float128;
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE floating-point underflow tininess-detection mode.
+-------------------------------------------------------------------------------
+*/
+extern int float_detect_tininess;
+enum {
+    float_tininess_after_rounding  = 0,
+    float_tininess_before_rounding = 1
+};
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE floating-point rounding mode.
+-------------------------------------------------------------------------------
+*/
+extern fp_rnd_t float_rounding_mode;
+enum {
+    float_round_nearest_even = FP_RN,
+    float_round_to_zero      = FP_RZ,
+    float_round_down         = FP_RM,
+    float_round_up           = FP_RP
+};
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE floating-point exception flags.
+-------------------------------------------------------------------------------
+*/
+extern fp_except float_exception_flags;
+extern fp_except float_exception_mask;
+enum {
+    float_flag_inexact   = FP_X_IMP,
+    float_flag_underflow = FP_X_UFL,
+    float_flag_overflow  = FP_X_OFL,
+    float_flag_divbyzero = FP_X_DZ,
+    float_flag_invalid   = FP_X_INV
+};
+
+/*
+-------------------------------------------------------------------------------
+Routine to raise any or all of the software IEC/IEEE floating-point
+exception flags.
+-------------------------------------------------------------------------------
+*/
+void float_raise( fp_except );
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE integer-to-floating-point conversion routines.
+-------------------------------------------------------------------------------
+*/
+float32 int32_to_float32( int );
+float64 int32_to_float64( int );
+#ifdef FLOATX80
+floatx80 int32_to_floatx80( int );
+#endif
+#ifdef FLOAT128
+float128 int32_to_float128( int );
+#endif
+#ifndef SOFTFLOAT_FOR_GCC /* __floatdi?f is in libgcc2.c */
+float32 int64_to_float32( long long );
+float64 int64_to_float64( long long );
+#ifdef FLOATX80
+floatx80 int64_to_floatx80( long long );
+#endif
+#ifdef FLOAT128
+float128 int64_to_float128( long long );
+#endif
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE single-precision conversion routines.
+-------------------------------------------------------------------------------
+*/
+int float32_to_int32( float32 );
+int float32_to_int32_round_to_zero( float32 );
+#if defined(SOFTFLOAT_FOR_GCC) && defined(SOFTFLOAT_NEED_FIXUNS)
+unsigned int float32_to_uint32_round_to_zero( float32 );
+#endif
+#ifndef SOFTFLOAT_FOR_GCC /* __fix?fdi provided by libgcc2.c */
+long long float32_to_int64( float32 );
+long long float32_to_int64_round_to_zero( float32 );
+#endif
+float64 float32_to_float64( float32 );
+#ifdef FLOATX80
+floatx80 float32_to_floatx80( float32 );
+#endif
+#ifdef FLOAT128
+float128 float32_to_float128( float32 );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE single-precision operations.
+-------------------------------------------------------------------------------
+*/
+float32 float32_round_to_int( float32 );
+float32 float32_add( float32, float32 );
+float32 float32_sub( float32, float32 );
+float32 float32_mul( float32, float32 );
+float32 float32_div( float32, float32 );
+float32 float32_rem( float32, float32 );
+float32 float32_sqrt( float32 );
+int float32_eq( float32, float32 );
+int float32_le( float32, float32 );
+int float32_lt( float32, float32 );
+int float32_eq_signaling( float32, float32 );
+int float32_le_quiet( float32, float32 );
+int float32_lt_quiet( float32, float32 );
+#ifndef SOFTFLOAT_FOR_GCC
+int float32_is_signaling_nan( float32 );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE double-precision conversion routines.
+-------------------------------------------------------------------------------
+*/
+int float64_to_int32( float64 );
+int float64_to_int32_round_to_zero( float64 );
+#if defined(SOFTFLOAT_FOR_GCC) && defined(SOFTFLOAT_NEED_FIXUNS)
+unsigned int float64_to_uint32_round_to_zero( float64 );
+#endif
+#ifndef SOFTFLOAT_FOR_GCC /* __fix?fdi provided by libgcc2.c */
+long long float64_to_int64( float64 );
+long long float64_to_int64_round_to_zero( float64 );
+#endif
+float32 float64_to_float32( float64 );
+#ifdef FLOATX80
+floatx80 float64_to_floatx80( float64 );
+#endif
+#ifdef FLOAT128
+float128 float64_to_float128( float64 );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE double-precision operations.
+-------------------------------------------------------------------------------
+*/
+float64 float64_round_to_int( float64 );
+float64 float64_add( float64, float64 );
+float64 float64_sub( float64, float64 );
+float64 float64_mul( float64, float64 );
+float64 float64_div( float64, float64 );
+float64 float64_rem( float64, float64 );
+float64 float64_sqrt( float64 );
+int float64_eq( float64, float64 );
+int float64_le( float64, float64 );
+int float64_lt( float64, float64 );
+int float64_eq_signaling( float64, float64 );
+int float64_le_quiet( float64, float64 );
+int float64_lt_quiet( float64, float64 );
+#ifndef SOFTFLOAT_FOR_GCC
+int float64_is_signaling_nan( float64 );
+#endif
+
+#ifdef FLOATX80
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE extended double-precision conversion routines.
+-------------------------------------------------------------------------------
+*/
+int floatx80_to_int32( floatx80 );
+int floatx80_to_int32_round_to_zero( floatx80 );
+long long floatx80_to_int64( floatx80 );
+long long floatx80_to_int64_round_to_zero( floatx80 );
+float32 floatx80_to_float32( floatx80 );
+float64 floatx80_to_float64( floatx80 );
+#ifdef FLOAT128
+float128 floatx80_to_float128( floatx80 );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE extended double-precision rounding precision.  Valid
+values are 32, 64, and 80.
+-------------------------------------------------------------------------------
+*/
+extern int floatx80_rounding_precision;
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE extended double-precision operations.
+-------------------------------------------------------------------------------
+*/
+floatx80 floatx80_round_to_int( floatx80 );
+floatx80 floatx80_add( floatx80, floatx80 );
+floatx80 floatx80_sub( floatx80, floatx80 );
+floatx80 floatx80_mul( floatx80, floatx80 );
+floatx80 floatx80_div( floatx80, floatx80 );
+floatx80 floatx80_rem( floatx80, floatx80 );
+floatx80 floatx80_sqrt( floatx80 );
+int floatx80_eq( floatx80, floatx80 );
+int floatx80_le( floatx80, floatx80 );
+int floatx80_lt( floatx80, floatx80 );
+int floatx80_eq_signaling( floatx80, floatx80 );
+int floatx80_le_quiet( floatx80, floatx80 );
+int floatx80_lt_quiet( floatx80, floatx80 );
+int floatx80_is_signaling_nan( floatx80 );
+
+#endif
+
+#ifdef FLOAT128
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE quadruple-precision conversion routines.
+-------------------------------------------------------------------------------
+*/
+int float128_to_int32( float128 );
+int float128_to_int32_round_to_zero( float128 );
+long long float128_to_int64( float128 );
+long long float128_to_int64_round_to_zero( float128 );
+float32 float128_to_float32( float128 );
+float64 float128_to_float64( float128 );
+#ifdef FLOATX80
+floatx80 float128_to_floatx80( float128 );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE quadruple-precision operations.
+-------------------------------------------------------------------------------
+*/
+float128 float128_round_to_int( float128 );
+float128 float128_add( float128, float128 );
+float128 float128_sub( float128, float128 );
+float128 float128_mul( float128, float128 );
+float128 float128_div( float128, float128 );
+float128 float128_rem( float128, float128 );
+float128 float128_sqrt( float128 );
+int float128_eq( float128, float128 );
+int float128_le( float128, float128 );
+int float128_lt( float128, float128 );
+int float128_eq_signaling( float128, float128 );
+int float128_le_quiet( float128, float128 );
+int float128_lt_quiet( float128, float128 );
+int float128_is_signaling_nan( float128 );
+
+#endif
+
diff --git a/lib/libc/arm/stdlib/Makefile.inc b/lib/libc/arm/stdlib/Makefile.inc
new file mode 100644
index 000000000000..1814a0a9c9dc
--- /dev/null
+++ b/lib/libc/arm/stdlib/Makefile.inc
@@ -0,0 +1,4 @@
+#	@(#)Makefile.inc	8.1 (Berkeley) 6/4/93
+# $FreeBSD$
+
+MDSRCS+=abs.c div.c labs.c ldiv.c
diff --git a/lib/libc/arm/stdlib/gdtoa.mk b/lib/libc/arm/stdlib/gdtoa.mk
new file mode 100644
index 000000000000..50f2f0d0b3b1
--- /dev/null
+++ b/lib/libc/arm/stdlib/gdtoa.mk
@@ -0,0 +1,5 @@
+# $FreeBSD$
+
+# Long double is 80 bits
+GDTOASRCS+=strtopx.c
+MDSRCS+=machdep_ldisx.c
diff --git a/lib/libc/arm/string/Makefile.inc b/lib/libc/arm/string/Makefile.inc
new file mode 100644
index 000000000000..7b73e58f4db2
--- /dev/null
+++ b/lib/libc/arm/string/Makefile.inc
@@ -0,0 +1,7 @@
+#	@(#)Makefile.inc	8.1 (Berkeley) 6/4/93
+# $FreeBSD$
+
+MDSRCS+=bcmp.c bcopy.S bzero.S ffs.S index.c memchr.c memcmp.S memcpy.S \
+	memmove.S memset.S rindex.c strcat.c strchr.c strcmp.S strcpy.c \
+	strlen.c strncmp.S strrchr.c swab.c wcschr.c wcscmp.c wcslen.c \
+	wmemchr.c
diff --git a/lib/libc/arm/string/bcopy.S b/lib/libc/arm/string/bcopy.S
new file mode 100644
index 000000000000..f2583fc7ffc8
--- /dev/null
+++ b/lib/libc/arm/string/bcopy.S
@@ -0,0 +1,6 @@
+/*	$NetBSD: bcopy.S,v 1.3 2003/10/14 07:51:45 scw Exp $	*/
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#define _BCOPY
+#include "memmove.S"
diff --git a/lib/libc/arm/string/bzero.S b/lib/libc/arm/string/bzero.S
new file mode 100644
index 000000000000..008c48504dfc
--- /dev/null
+++ b/lib/libc/arm/string/bzero.S
@@ -0,0 +1,44 @@
+/*	$NetBSD: bzero.S,v 1.3 2003/10/14 07:51:45 scw Exp $	*/
+
+/*-
+ * Copyright (c) 1997 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Neil A. Carson and Mark Brinicombe
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+
+__FBSDID("$FreeBSD$");
+
+#define _BZERO
+#include "memset.S"
diff --git a/lib/libc/arm/string/ffs.S b/lib/libc/arm/string/ffs.S
new file mode 100644
index 000000000000..8955130fb4ba
--- /dev/null
+++ b/lib/libc/arm/string/ffs.S
@@ -0,0 +1,76 @@
+/*	$NetBSD: ffs.S,v 1.5 2003/04/05 23:08:52 bjh21 Exp $	*/
+/*
+ * Copyright (c) 2001 Christopher Gilbert
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+
+__FBSDID("$FreeBSD$");
+
+/*
+ * ffs - find first set bit, this algorithm isolates the first set
+ * bit, then multiplies the number by 0x0450fbaf which leaves the top
+ * 6 bits as an index into the table.  This algorithm should be a win
+ * over the checking each bit in turn as per the C compiled version.
+ *
+ * under ARMv5 there's an instruction called CLZ (count leading Zero's) that
+ * could be used
+ *
+ * This is the ffs algorithm devised by d.seal and posted to comp.sys.arm on
+ * 16 Feb 1994.
+ */
+
+ENTRY(ffs)
+	/* Standard trick to isolate bottom bit in r0 or 0 if r0 = 0 on entry */
+ 	rsb     r1, r0, #0
+ 	ands    r0, r0, r1
+	/*
+	 * now r0 has at most one set bit, call this X
+	 * if X = 0, all further instructions are skipped
+	 */
+	adrne   r2, .L_ffs_table
+	orrne   r0, r0, r0, lsl #4  /* r0 = X * 0x11 */ 
+	orrne   r0, r0, r0, lsl #6  /* r0 = X * 0x451 */
+	rsbne   r0, r0, r0, lsl #16 /* r0 = X * 0x0450fbaf */
+              
+	/* now lookup in table indexed on top 6 bits of r0 */
+	ldrneb  r0, [ r2, r0, lsr #26 ]
+
+        mov   pc, lr
+.text;
+.type .L_ffs_table, _ASM_TYPE_OBJECT;
+.L_ffs_table:
+/*               0   1   2   3   4   5   6   7           */
+	.byte	 0,  1,  2, 13,  3,  7,  0, 14  /*  0- 7 */
+	.byte	 4,  0,  8,  0,  0,  0,  0, 15  /*  8-15 */
+	.byte	11,  5,  0,  0,  9,  0,  0, 26  /* 16-23 */
+	.byte	 0,  0,  0,  0,  0, 22, 28, 16  /* 24-31 */
+	.byte	32, 12,  6,  0,  0,  0,  0,  0	/* 32-39 */
+	.byte	10,  0,  0, 25,  0,  0, 21, 27  /* 40-47 */
+	.byte	31,  0,  0,  0,  0, 24,  0, 20  /* 48-55 */
+	.byte   30,  0, 23, 19, 29, 18, 17,  0  /* 56-63 */
diff --git a/lib/libc/arm/string/memcmp.S b/lib/libc/arm/string/memcmp.S
new file mode 100644
index 000000000000..e52e4f064d69
--- /dev/null
+++ b/lib/libc/arm/string/memcmp.S
@@ -0,0 +1,180 @@
+/*      $NetBSD: memcmp.S,v 1.3 2003/10/14 07:51:45 scw Exp $ */
+
+/*
+ * Copyright 2003 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Steve C. Woodford for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed for the NetBSD Project by
+ *      Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *    or promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 2002 ARM Ltd
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+
+__FBSDID("$FreeBSD$");
+
+ENTRY(memcmp)
+	mov	ip, r0
+#if defined(_KERNEL) && !defined(_STANDALONE)
+	cmp	r2, #0x06
+	beq	.Lmemcmp_6bytes
+#endif
+	mov	r0, #0x00
+
+	/* Are both addresses aligned the same way? */
+	cmp	r2, #0x00
+	eornes	r3, ip, r1
+	moveq	pc, lr			/* len == 0, or same addresses! */
+	tst	r3, #0x03
+	subne	r2, r2, #0x01
+	bne	.Lmemcmp_bytewise2	/* Badly aligned. Do it the slow way */
+
+	/* Word-align the addresses, if necessary */
+	and	r3, r1, #0x03
+	rsbs	r3, r3, #0x03
+	add	r3, r3, r3, lsl #1
+	addne	pc, pc, r3, lsl #3
+	nop
+
+	/* Compare up to 3 bytes */
+	ldrb	r0, [ip], #0x01
+	ldrb	r3, [r1], #0x01
+	subs	r0, r0, r3
+	movne	pc, lr
+	subs	r2, r2, #0x01
+	moveq	pc, lr
+
+	/* Compare up to 2 bytes */
+	ldrb	r0, [ip], #0x01
+	ldrb	r3, [r1], #0x01
+	subs	r0, r0, r3
+	movne	pc, lr
+	subs	r2, r2, #0x01
+	moveq	pc, lr
+
+	/* Compare 1 byte */
+	ldrb	r0, [ip], #0x01
+	ldrb	r3, [r1], #0x01
+	subs	r0, r0, r3
+	movne	pc, lr
+	subs	r2, r2, #0x01
+	moveq	pc, lr
+
+	/* Compare 4 bytes at a time, if possible */
+	subs	r2, r2, #0x04
+	bcc	.Lmemcmp_bytewise
+.Lmemcmp_word_aligned:
+	ldr	r0, [ip], #0x04
+	ldr	r3, [r1], #0x04
+	subs	r2, r2, #0x04
+	cmpcs	r0, r3
+	beq	.Lmemcmp_word_aligned
+	sub	r0, r0, r3
+
+	/* Correct for extra subtraction, and check if done */
+	adds	r2, r2, #0x04
+	cmpeq	r0, #0x00		/* If done, did all bytes match? */
+	moveq	pc, lr			/* Yup. Just return */
+
+	/* Re-do the final word byte-wise */
+	sub	ip, ip, #0x04
+	sub	r1, r1, #0x04
+
+.Lmemcmp_bytewise:
+	add	r2, r2, #0x03
+.Lmemcmp_bytewise2:
+	ldrb	r0, [ip], #0x01
+	ldrb	r3, [r1], #0x01
+	subs	r2, r2, #0x01
+	cmpcs	r0, r3
+	beq	.Lmemcmp_bytewise2
+	sub	r0, r0, r3
+	mov	pc, lr
+
+#if defined(_KERNEL) && !defined(_STANDALONE)
+	/*
+	 * 6 byte compares are very common, thanks to the network stack.
+	 * This code is hand-scheduled to reduce the number of stalls for
+	 * load results. Everything else being equal, this will be ~32%
+	 * faster than a byte-wise memcmp.
+	 */
+	.align	5
+.Lmemcmp_6bytes:
+	ldrb	r3, [r1, #0x00]		/* r3 = b2#0 */
+	ldrb	r0, [ip, #0x00]		/* r0 = b1#0 */
+	ldrb	r2, [r1, #0x01]		/* r2 = b2#1 */
+	subs	r0, r0, r3		/* r0 = b1#0 - b2#0 */
+	ldreqb	r3, [ip, #0x01]		/* r3 = b1#1 */
+	movne	pc, lr			/* Return if mismatch on #0 */
+	subs	r0, r3, r2		/* r0 = b1#1 - b2#1 */
+	ldreqb	r3, [r1, #0x02]		/* r3 = b2#2 */
+	ldreqb	r0, [ip, #0x02]		/* r0 = b1#2 */
+	movne	pc, lr			/* Return if mismatch on #1 */
+	ldrb	r2, [r1, #0x03]		/* r2 = b2#3 */
+	subs	r0, r0, r3		/* r0 = b1#2 - b2#2 */
+	ldreqb	r3, [ip, #0x03]		/* r3 = b1#3 */
+	movne	pc, lr			/* Return if mismatch on #2 */
+	subs	r0, r3, r2		/* r0 = b1#3 - b2#3 */
+	ldreqb	r3, [r1, #0x04]		/* r3 = b2#4 */
+	ldreqb	r0, [ip, #0x04]		/* r0 = b1#4 */
+	movne	pc, lr			/* Return if mismatch on #3 */
+	ldrb	r2, [r1, #0x05]		/* r2 = b2#5 */
+	subs	r0, r0, r3		/* r0 = b1#4 - b2#4 */
+	ldreqb	r3, [ip, #0x05]		/* r3 = b1#5 */
+	movne	pc, lr			/* Return if mismatch on #4 */
+	sub	r0, r3, r2		/* r0 = b1#5 - b2#5 */
+	mov	pc, lr
+#endif
diff --git a/lib/libc/arm/string/memcpy.S b/lib/libc/arm/string/memcpy.S
new file mode 100644
index 000000000000..1d17b93e5623
--- /dev/null
+++ b/lib/libc/arm/string/memcpy.S
@@ -0,0 +1,9 @@
+/*	$NetBSD: memcpy.S,v 1.4 2003/10/14 07:51:45 scw Exp $	*/
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#if !defined(__XSCALE__) || defined(_STANDALONE)
+#include "memcpy_arm.S"
+#else
+#include "memcpy_xscale.S"
+#endif
diff --git a/lib/libc/arm/string/memcpy_arm.S b/lib/libc/arm/string/memcpy_arm.S
new file mode 100644
index 000000000000..005c8c29c3c4
--- /dev/null
+++ b/lib/libc/arm/string/memcpy_arm.S
@@ -0,0 +1,339 @@
+/*	$NetBSD: memcpy_arm.S,v 1.1 2003/10/14 07:51:45 scw Exp $	*/
+
+/*-
+ * Copyright (c) 1997 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Neil A. Carson and Mark Brinicombe
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+/*
+ * This is one fun bit of code ...
+ * Some easy listening music is suggested while trying to understand this
+ * code e.g. Iron Maiden
+ *
+ * For anyone attempting to understand it :
+ *
+ * The core code is implemented here with simple stubs for memcpy().
+ *
+ * All local labels are prefixed with Lmemcpy_
+ * Following the prefix a label starting f is used in the forward copy code
+ * while a label using b is used in the backwards copy code
+ * The source and destination addresses determine whether a forward or
+ * backward copy is performed.
+ * Separate bits of code are used to deal with the following situations
+ * for both the forward and backwards copy.
+ * unaligned source address
+ * unaligned destination address
+ * Separate copy routines are used to produce an optimised result for each
+ * of these cases.
+ * The copy code will use LDM/STM instructions to copy up to 32 bytes at
+ * a time where possible.
+ *
+ * Note: r12 (aka ip) can be trashed during the function along with
+ * r0-r3 although r0-r2 have defined uses i.e. src, dest, len through out.
+ * Additional registers are preserved prior to use i.e. r4, r5 & lr
+ *
+ * Apologies for the state of the comments ;-)
+ */
+/* LINTSTUB: Func: void *memcpy(void *dst, const void *src, size_t len) */
+ENTRY(memcpy)
+	/* save leaf functions having to store this away */
+	stmdb	sp!, {r0, lr}		/* memcpy() returns dest addr */
+
+	subs	r2, r2, #4
+	blt	.Lmemcpy_l4		/* less than 4 bytes */
+	ands	r12, r0, #3
+	bne	.Lmemcpy_destul		/* oh unaligned destination addr */
+	ands	r12, r1, #3
+	bne	.Lmemcpy_srcul		/* oh unaligned source addr */
+
+.Lmemcpy_t8:
+	/* We have aligned source and destination */
+	subs	r2, r2, #8
+	blt	.Lmemcpy_l12		/* less than 12 bytes (4 from above) */
+	subs	r2, r2, #0x14         
+	blt	.Lmemcpy_l32		/* less than 32 bytes (12 from above) */
+	stmdb	sp!, {r4}		/* borrow r4 */
+
+	/* blat 32 bytes at a time */
+	/* XXX for really big copies perhaps we should use more registers */
+.Lmemcpy_loop32:	
+	ldmia	r1!, {r3, r4, r12, lr}
+	stmia	r0!, {r3, r4, r12, lr}
+	ldmia	r1!, {r3, r4, r12, lr}
+	stmia	r0!, {r3, r4, r12, lr}
+	subs	r2, r2, #0x20         
+	bge	.Lmemcpy_loop32
+
+	cmn	r2, #0x10
+	ldmgeia	r1!, {r3, r4, r12, lr}	/* blat a remaining 16 bytes */
+	stmgeia	r0!, {r3, r4, r12, lr}
+	subge	r2, r2, #0x10         
+	ldmia	sp!, {r4}		/* return r4 */
+
+.Lmemcpy_l32:
+	adds	r2, r2, #0x14         
+
+	/* blat 12 bytes at a time */
+.Lmemcpy_loop12:
+	ldmgeia	r1!, {r3, r12, lr}
+	stmgeia	r0!, {r3, r12, lr}
+	subges	r2, r2, #0x0c         
+	bge	.Lmemcpy_loop12
+
+.Lmemcpy_l12:
+	adds	r2, r2, #8
+	blt	.Lmemcpy_l4
+
+	subs	r2, r2, #4
+	ldrlt	r3, [r1], #4
+	strlt	r3, [r0], #4
+	ldmgeia	r1!, {r3, r12}
+	stmgeia	r0!, {r3, r12}
+	subge	r2, r2, #4
+
+.Lmemcpy_l4:
+	/* less than 4 bytes to go */
+	adds	r2, r2, #4
+#ifdef __APCS_26_
+	ldmeqia sp!, {r0, pc}^		/* done */
+#else
+	ldmeqia	sp!, {r0, pc}		/* done */
+#endif
+	/* copy the crud byte at a time */
+	cmp	r2, #2
+	ldrb	r3, [r1], #1
+	strb	r3, [r0], #1
+	ldrgeb	r3, [r1], #1
+	strgeb	r3, [r0], #1
+	ldrgtb	r3, [r1], #1
+	strgtb	r3, [r0], #1
+	ldmia	sp!, {r0, pc}
+
+	/* erg - unaligned destination */
+.Lmemcpy_destul:
+	rsb	r12, r12, #4
+	cmp	r12, #2
+
+	/* align destination with byte copies */
+	ldrb	r3, [r1], #1
+	strb	r3, [r0], #1
+	ldrgeb	r3, [r1], #1
+	strgeb	r3, [r0], #1
+	ldrgtb	r3, [r1], #1
+	strgtb	r3, [r0], #1
+	subs	r2, r2, r12
+	blt	.Lmemcpy_l4		/* less the 4 bytes */
+
+	ands	r12, r1, #3
+	beq	.Lmemcpy_t8		/* we have an aligned source */
+
+	/* erg - unaligned source */
+	/* This is where it gets nasty ... */
+.Lmemcpy_srcul:
+	bic	r1, r1, #3
+	ldr	lr, [r1], #4
+	cmp	r12, #2
+	bgt	.Lmemcpy_srcul3
+	beq	.Lmemcpy_srcul2
+	cmp	r2, #0x0c            
+	blt	.Lmemcpy_srcul1loop4
+	sub	r2, r2, #0x0c         
+	stmdb	sp!, {r4, r5}
+
+.Lmemcpy_srcul1loop16:
+#ifdef __ARMEB__
+	mov	r3, lr, lsl #8
+#else
+	mov	r3, lr, lsr #8
+#endif
+	ldmia	r1!, {r4, r5, r12, lr}
+#ifdef __ARMEB__
+	orr	r3, r3, r4, lsr #24
+	mov	r4, r4, lsl #8
+	orr	r4, r4, r5, lsr #24
+	mov	r5, r5, lsl #8
+	orr	r5, r5, r12, lsr #24
+	mov	r12, r12, lsl #8
+	orr	r12, r12, lr, lsr #24
+#else
+	orr	r3, r3, r4, lsl #24
+	mov	r4, r4, lsr #8
+	orr	r4, r4, r5, lsl #24
+	mov	r5, r5, lsr #8
+	orr	r5, r5, r12, lsl #24
+	mov	r12, r12, lsr #8
+	orr	r12, r12, lr, lsl #24
+#endif
+	stmia	r0!, {r3-r5, r12}
+	subs	r2, r2, #0x10         
+	bge	.Lmemcpy_srcul1loop16
+	ldmia	sp!, {r4, r5}
+	adds	r2, r2, #0x0c         
+	blt	.Lmemcpy_srcul1l4
+
+.Lmemcpy_srcul1loop4:
+#ifdef __ARMEB__
+	mov	r12, lr, lsl #8
+#else
+	mov	r12, lr, lsr #8
+#endif
+	ldr	lr, [r1], #4
+#ifdef __ARMEB__
+	orr	r12, r12, lr, lsr #24
+#else
+	orr	r12, r12, lr, lsl #24
+#endif
+	str	r12, [r0], #4
+	subs	r2, r2, #4
+	bge	.Lmemcpy_srcul1loop4
+
+.Lmemcpy_srcul1l4:
+	sub	r1, r1, #3
+	b	.Lmemcpy_l4
+
+.Lmemcpy_srcul2:
+	cmp	r2, #0x0c            
+	blt	.Lmemcpy_srcul2loop4
+	sub	r2, r2, #0x0c         
+	stmdb	sp!, {r4, r5}
+
+.Lmemcpy_srcul2loop16:
+#ifdef __ARMEB__
+	mov	r3, lr, lsl #16
+#else
+	mov	r3, lr, lsr #16
+#endif
+	ldmia	r1!, {r4, r5, r12, lr}
+#ifdef __ARMEB__
+	orr	r3, r3, r4, lsr #16
+	mov	r4, r4, lsl #16
+	orr	r4, r4, r5, lsr #16
+	mov	r5, r5, lsl #16
+	orr	r5, r5, r12, lsr #16
+	mov	r12, r12, lsl #16
+	orr	r12, r12, lr, lsr #16
+#else
+	orr	r3, r3, r4, lsl #16
+	mov	r4, r4, lsr #16
+	orr	r4, r4, r5, lsl #16
+	mov	r5, r5, lsr #16
+	orr	r5, r5, r12, lsl #16
+	mov	r12, r12, lsr #16
+	orr	r12, r12, lr, lsl #16
+#endif
+	stmia	r0!, {r3-r5, r12}
+	subs	r2, r2, #0x10         
+	bge	.Lmemcpy_srcul2loop16
+	ldmia	sp!, {r4, r5}
+	adds	r2, r2, #0x0c         
+	blt	.Lmemcpy_srcul2l4
+
+.Lmemcpy_srcul2loop4:
+#ifdef __ARMEB__
+	mov	r12, lr, lsl #16
+#else
+	mov	r12, lr, lsr #16
+#endif
+	ldr	lr, [r1], #4
+#ifdef __ARMEB__
+	orr	r12, r12, lr, lsr #16
+#else
+	orr	r12, r12, lr, lsl #16
+#endif
+	str	r12, [r0], #4
+	subs	r2, r2, #4
+	bge	.Lmemcpy_srcul2loop4
+
+.Lmemcpy_srcul2l4:
+	sub	r1, r1, #2
+	b	.Lmemcpy_l4
+
+.Lmemcpy_srcul3:
+	cmp	r2, #0x0c            
+	blt	.Lmemcpy_srcul3loop4
+	sub	r2, r2, #0x0c         
+	stmdb	sp!, {r4, r5}
+
+.Lmemcpy_srcul3loop16:
+#ifdef __ARMEB__
+	mov	r3, lr, lsl #24
+#else
+	mov	r3, lr, lsr #24
+#endif
+	ldmia	r1!, {r4, r5, r12, lr}
+#ifdef __ARMEB__
+	orr	r3, r3, r4, lsr #8
+	mov	r4, r4, lsl #24
+	orr	r4, r4, r5, lsr #8
+	mov	r5, r5, lsl #24
+	orr	r5, r5, r12, lsr #8
+	mov	r12, r12, lsl #24
+	orr	r12, r12, lr, lsr #8
+#else
+	orr	r3, r3, r4, lsl #8
+	mov	r4, r4, lsr #24
+	orr	r4, r4, r5, lsl #8
+	mov	r5, r5, lsr #24
+	orr	r5, r5, r12, lsl #8
+	mov	r12, r12, lsr #24
+	orr	r12, r12, lr, lsl #8
+#endif
+	stmia	r0!, {r3-r5, r12}
+	subs	r2, r2, #0x10         
+	bge	.Lmemcpy_srcul3loop16
+	ldmia	sp!, {r4, r5}
+	adds	r2, r2, #0x0c         
+	blt	.Lmemcpy_srcul3l4
+
+.Lmemcpy_srcul3loop4:
+#ifdef __ARMEB__
+	mov	r12, lr, lsl #24
+#else
+	mov	r12, lr, lsr #24
+#endif
+	ldr	lr, [r1], #4
+#ifdef __ARMEB__
+	orr	r12, r12, lr, lsr #8
+#else
+	orr	r12, r12, lr, lsl #8
+#endif
+	str	r12, [r0], #4
+	subs	r2, r2, #4
+	bge	.Lmemcpy_srcul3loop4
+
+.Lmemcpy_srcul3l4:
+	sub	r1, r1, #1
+	b	.Lmemcpy_l4
diff --git a/lib/libc/arm/string/memcpy_xscale.S b/lib/libc/arm/string/memcpy_xscale.S
new file mode 100644
index 000000000000..8e7a878e433d
--- /dev/null
+++ b/lib/libc/arm/string/memcpy_xscale.S
@@ -0,0 +1,1783 @@
+/*	$NetBSD: memcpy_xscale.S,v 1.1 2003/10/14 07:51:45 scw Exp $	*/
+
+/*
+ * Copyright 2003 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Steve C. Woodford for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed for the NetBSD Project by
+ *      Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *    or promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+/* LINTSTUB: Func: void *memcpy(void *dst, const void *src, size_t len) */
+ENTRY(memcpy)
+	pld	[r1]
+	cmp	r2, #0x0c
+	ble	.Lmemcpy_short		/* <= 12 bytes */
+	mov	r3, r0			/* We must not clobber r0 */
+
+	/* Word-align the destination buffer */
+	ands	ip, r3, #0x03		/* Already word aligned? */
+	beq	.Lmemcpy_wordaligned	/* Yup */
+	cmp	ip, #0x02
+	ldrb	ip, [r1], #0x01
+	sub	r2, r2, #0x01
+	strb	ip, [r3], #0x01
+	ldrleb	ip, [r1], #0x01
+	suble	r2, r2, #0x01
+	strleb	ip, [r3], #0x01
+	ldrltb	ip, [r1], #0x01
+	sublt	r2, r2, #0x01
+	strltb	ip, [r3], #0x01
+
+	/* Destination buffer is now word aligned */
+.Lmemcpy_wordaligned:
+	ands	ip, r1, #0x03		/* Is src also word-aligned? */
+	bne	.Lmemcpy_bad_align	/* Nope. Things just got bad */
+
+	/* Quad-align the destination buffer */
+	tst	r3, #0x07		/* Already quad aligned? */
+	ldrne	ip, [r1], #0x04
+	stmfd	sp!, {r4-r9}		/* Free up some registers */
+	subne	r2, r2, #0x04
+	strne	ip, [r3], #0x04
+
+	/* Destination buffer quad aligned, source is at least word aligned */
+	subs	r2, r2, #0x80
+	blt	.Lmemcpy_w_lessthan128
+
+	/* Copy 128 bytes at a time */
+.Lmemcpy_w_loop128:
+	ldr	r4, [r1], #0x04		/* LD:00-03 */
+	ldr	r5, [r1], #0x04		/* LD:04-07 */
+	pld	[r1, #0x18]		/* Prefetch 0x20 */
+	ldr	r6, [r1], #0x04		/* LD:08-0b */
+	ldr	r7, [r1], #0x04		/* LD:0c-0f */
+	ldr	r8, [r1], #0x04		/* LD:10-13 */
+	ldr	r9, [r1], #0x04		/* LD:14-17 */
+	strd	r4, [r3], #0x08		/* ST:00-07 */
+	ldr	r4, [r1], #0x04		/* LD:18-1b */
+	ldr	r5, [r1], #0x04		/* LD:1c-1f */
+	strd	r6, [r3], #0x08		/* ST:08-0f */
+	ldr	r6, [r1], #0x04		/* LD:20-23 */
+	ldr	r7, [r1], #0x04		/* LD:24-27 */
+	pld	[r1, #0x18]		/* Prefetch 0x40 */
+	strd	r8, [r3], #0x08		/* ST:10-17 */
+	ldr	r8, [r1], #0x04		/* LD:28-2b */
+	ldr	r9, [r1], #0x04		/* LD:2c-2f */
+	strd	r4, [r3], #0x08		/* ST:18-1f */
+	ldr	r4, [r1], #0x04		/* LD:30-33 */
+	ldr	r5, [r1], #0x04		/* LD:34-37 */
+	strd	r6, [r3], #0x08		/* ST:20-27 */
+	ldr	r6, [r1], #0x04		/* LD:38-3b */
+	ldr	r7, [r1], #0x04		/* LD:3c-3f */
+	strd	r8, [r3], #0x08		/* ST:28-2f */
+	ldr	r8, [r1], #0x04		/* LD:40-43 */
+	ldr	r9, [r1], #0x04		/* LD:44-47 */
+	pld	[r1, #0x18]		/* Prefetch 0x60 */
+	strd	r4, [r3], #0x08		/* ST:30-37 */
+	ldr	r4, [r1], #0x04		/* LD:48-4b */
+	ldr	r5, [r1], #0x04		/* LD:4c-4f */
+	strd	r6, [r3], #0x08		/* ST:38-3f */
+	ldr	r6, [r1], #0x04		/* LD:50-53 */
+	ldr	r7, [r1], #0x04		/* LD:54-57 */
+	strd	r8, [r3], #0x08		/* ST:40-47 */
+	ldr	r8, [r1], #0x04		/* LD:58-5b */
+	ldr	r9, [r1], #0x04		/* LD:5c-5f */
+	strd	r4, [r3], #0x08		/* ST:48-4f */
+	ldr	r4, [r1], #0x04		/* LD:60-63 */
+	ldr	r5, [r1], #0x04		/* LD:64-67 */
+	pld	[r1, #0x18]		/* Prefetch 0x80 */
+	strd	r6, [r3], #0x08		/* ST:50-57 */
+	ldr	r6, [r1], #0x04		/* LD:68-6b */
+	ldr	r7, [r1], #0x04		/* LD:6c-6f */
+	strd	r8, [r3], #0x08		/* ST:58-5f */
+	ldr	r8, [r1], #0x04		/* LD:70-73 */
+	ldr	r9, [r1], #0x04		/* LD:74-77 */
+	strd	r4, [r3], #0x08		/* ST:60-67 */
+	ldr	r4, [r1], #0x04		/* LD:78-7b */
+	ldr	r5, [r1], #0x04		/* LD:7c-7f */
+	strd	r6, [r3], #0x08		/* ST:68-6f */
+	strd	r8, [r3], #0x08		/* ST:70-77 */
+	subs	r2, r2, #0x80
+	strd	r4, [r3], #0x08		/* ST:78-7f */
+	bge	.Lmemcpy_w_loop128
+
+.Lmemcpy_w_lessthan128:
+	adds	r2, r2, #0x80		/* Adjust for extra sub */
+	ldmeqfd	sp!, {r4-r9}
+	moveq	pc, lr			/* Return now if done */
+	subs	r2, r2, #0x20
+	blt	.Lmemcpy_w_lessthan32
+
+	/* Copy 32 bytes at a time */
+.Lmemcpy_w_loop32:
+	ldr	r4, [r1], #0x04
+	ldr	r5, [r1], #0x04
+	pld	[r1, #0x18]
+	ldr	r6, [r1], #0x04
+	ldr	r7, [r1], #0x04
+	ldr	r8, [r1], #0x04
+	ldr	r9, [r1], #0x04
+	strd	r4, [r3], #0x08
+	ldr	r4, [r1], #0x04
+	ldr	r5, [r1], #0x04
+	strd	r6, [r3], #0x08
+	strd	r8, [r3], #0x08
+	subs	r2, r2, #0x20
+	strd	r4, [r3], #0x08
+	bge	.Lmemcpy_w_loop32
+
+.Lmemcpy_w_lessthan32:
+	adds	r2, r2, #0x20		/* Adjust for extra sub */
+	ldmeqfd	sp!, {r4-r9}
+	moveq	pc, lr			/* Return now if done */
+
+	and	r4, r2, #0x18
+	rsbs	r4, r4, #0x18
+	addne	pc, pc, r4, lsl #1
+	nop
+
+	/* At least 24 bytes remaining */
+	ldr	r4, [r1], #0x04
+	ldr	r5, [r1], #0x04
+	sub	r2, r2, #0x08
+	strd	r4, [r3], #0x08
+
+	/* At least 16 bytes remaining */
+	ldr	r4, [r1], #0x04
+	ldr	r5, [r1], #0x04
+	sub	r2, r2, #0x08
+	strd	r4, [r3], #0x08
+
+	/* At least 8 bytes remaining */
+	ldr	r4, [r1], #0x04
+	ldr	r5, [r1], #0x04
+	subs	r2, r2, #0x08
+	strd	r4, [r3], #0x08
+
+	/* Less than 8 bytes remaining */
+	ldmfd	sp!, {r4-r9}
+	moveq	pc, lr			/* Return now if done */
+	subs	r2, r2, #0x04
+	ldrge	ip, [r1], #0x04
+	strge	ip, [r3], #0x04
+	moveq	pc, lr			/* Return now if done */
+	addlt	r2, r2, #0x04
+	ldrb	ip, [r1], #0x01
+	cmp	r2, #0x02
+	ldrgeb	r2, [r1], #0x01
+	strb	ip, [r3], #0x01
+	ldrgtb	ip, [r1]
+	strgeb	r2, [r3], #0x01
+	strgtb	ip, [r3]
+	mov	pc, lr
+
+
+/*
+ * At this point, it has not been possible to word align both buffers.
+ * The destination buffer is word aligned, but the source buffer is not.
+ */
+.Lmemcpy_bad_align:
+	stmfd	sp!, {r4-r7}
+	bic	r1, r1, #0x03
+	cmp	ip, #2
+	ldr	ip, [r1], #0x04
+	bgt	.Lmemcpy_bad3
+	beq	.Lmemcpy_bad2
+	b	.Lmemcpy_bad1
+
+.Lmemcpy_bad1_loop16:
+#ifdef __ARMEB__
+	mov	r4, ip, lsl #8
+#else
+	mov	r4, ip, lsr #8
+#endif
+	ldr	r5, [r1], #0x04
+	pld	[r1, #0x018]
+	ldr	r6, [r1], #0x04
+	ldr	r7, [r1], #0x04
+	ldr	ip, [r1], #0x04
+#ifdef __ARMEB__
+	orr	r4, r4, r5, lsr #24
+	mov	r5, r5, lsl #8
+	orr	r5, r5, r6, lsr #24
+	mov	r6, r6, lsl #8
+	orr	r6, r6, r7, lsr #24
+	mov	r7, r7, lsl #8
+	orr	r7, r7, ip, lsr #24
+#else
+	orr	r4, r4, r5, lsl #24
+	mov	r5, r5, lsr #8
+	orr	r5, r5, r6, lsl #24
+	mov	r6, r6, lsr #8
+	orr	r6, r6, r7, lsl #24
+	mov	r7, r7, lsr #8
+	orr	r7, r7, ip, lsl #24
+#endif
+	str	r4, [r3], #0x04
+	str	r5, [r3], #0x04
+	str	r6, [r3], #0x04
+	str	r7, [r3], #0x04
+.Lmemcpy_bad1:
+	subs	r2, r2, #0x10         
+	bge	.Lmemcpy_bad1_loop16
+
+	adds	r2, r2, #0x10         
+	ldmeqfd	sp!, {r4-r7}
+	moveq	pc, lr			/* Return now if done */
+	subs	r2, r2, #0x04
+	sublt	r1, r1, #0x03
+	blt	.Lmemcpy_bad_done
+
+.Lmemcpy_bad1_loop4:
+#ifdef __ARMEB__
+	mov	r4, ip, lsl #8
+#else
+	mov	r4, ip, lsr #8
+#endif
+	ldr	ip, [r1], #0x04
+	subs	r2, r2, #0x04
+#ifdef __ARMEB__
+	orr	r4, r4, ip, lsr #24
+#else
+	orr	r4, r4, ip, lsl #24
+#endif
+	str	r4, [r3], #0x04
+	bge	.Lmemcpy_bad1_loop4
+	sub	r1, r1, #0x03
+	b	.Lmemcpy_bad_done
+
+.Lmemcpy_bad2_loop16:
+#ifdef __ARMEB__
+	mov	r4, ip, lsl #16
+#else
+	mov	r4, ip, lsr #16
+#endif
+	ldr	r5, [r1], #0x04
+	pld	[r1, #0x018]
+	ldr	r6, [r1], #0x04
+	ldr	r7, [r1], #0x04
+	ldr	ip, [r1], #0x04
+#ifdef __ARMEB__
+	orr	r4, r4, r5, lsr #16
+	mov	r5, r5, lsl #16
+	orr	r5, r5, r6, lsr #16
+	mov	r6, r6, lsl #16
+	orr	r6, r6, r7, lsr #16
+	mov	r7, r7, lsl #16
+	orr	r7, r7, ip, lsr #16
+#else
+	orr	r4, r4, r5, lsl #16
+	mov	r5, r5, lsr #16
+	orr	r5, r5, r6, lsl #16
+	mov	r6, r6, lsr #16
+	orr	r6, r6, r7, lsl #16
+	mov	r7, r7, lsr #16
+	orr	r7, r7, ip, lsl #16
+#endif
+	str	r4, [r3], #0x04
+	str	r5, [r3], #0x04
+	str	r6, [r3], #0x04
+	str	r7, [r3], #0x04
+.Lmemcpy_bad2:
+	subs	r2, r2, #0x10         
+	bge	.Lmemcpy_bad2_loop16
+
+	adds	r2, r2, #0x10         
+	ldmeqfd	sp!, {r4-r7}
+	moveq	pc, lr			/* Return now if done */
+	subs	r2, r2, #0x04
+	sublt	r1, r1, #0x02
+	blt	.Lmemcpy_bad_done
+
+.Lmemcpy_bad2_loop4:
+#ifdef __ARMEB__
+	mov	r4, ip, lsl #16
+#else
+	mov	r4, ip, lsr #16
+#endif
+	ldr	ip, [r1], #0x04
+	subs	r2, r2, #0x04
+#ifdef __ARMEB__
+	orr	r4, r4, ip, lsr #16
+#else
+	orr	r4, r4, ip, lsl #16
+#endif
+	str	r4, [r3], #0x04
+	bge	.Lmemcpy_bad2_loop4
+	sub	r1, r1, #0x02
+	b	.Lmemcpy_bad_done
+
+.Lmemcpy_bad3_loop16:
+#ifdef __ARMEB__
+	mov	r4, ip, lsl #24
+#else
+	mov	r4, ip, lsr #24
+#endif
+	ldr	r5, [r1], #0x04
+	pld	[r1, #0x018]
+	ldr	r6, [r1], #0x04
+	ldr	r7, [r1], #0x04
+	ldr	ip, [r1], #0x04
+#ifdef __ARMEB__
+	orr	r4, r4, r5, lsr #8
+	mov	r5, r5, lsl #24
+	orr	r5, r5, r6, lsr #8
+	mov	r6, r6, lsl #24
+	orr	r6, r6, r7, lsr #8
+	mov	r7, r7, lsl #24
+	orr	r7, r7, ip, lsr #8
+#else
+	orr	r4, r4, r5, lsl #8
+	mov	r5, r5, lsr #24
+	orr	r5, r5, r6, lsl #8
+	mov	r6, r6, lsr #24
+	orr	r6, r6, r7, lsl #8
+	mov	r7, r7, lsr #24
+	orr	r7, r7, ip, lsl #8
+#endif
+	str	r4, [r3], #0x04
+	str	r5, [r3], #0x04
+	str	r6, [r3], #0x04
+	str	r7, [r3], #0x04
+.Lmemcpy_bad3:
+	subs	r2, r2, #0x10         
+	bge	.Lmemcpy_bad3_loop16
+
+	adds	r2, r2, #0x10         
+	ldmeqfd	sp!, {r4-r7}
+	moveq	pc, lr			/* Return now if done */
+	subs	r2, r2, #0x04
+	sublt	r1, r1, #0x01
+	blt	.Lmemcpy_bad_done
+
+.Lmemcpy_bad3_loop4:
+#ifdef __ARMEB__
+	mov	r4, ip, lsl #24
+#else
+	mov	r4, ip, lsr #24
+#endif
+	ldr	ip, [r1], #0x04
+	subs	r2, r2, #0x04
+#ifdef __ARMEB__
+	orr	r4, r4, ip, lsr #8
+#else
+	orr	r4, r4, ip, lsl #8
+#endif
+	str	r4, [r3], #0x04
+	bge	.Lmemcpy_bad3_loop4
+	sub	r1, r1, #0x01
+
+.Lmemcpy_bad_done:
+	ldmfd	sp!, {r4-r7}
+	adds	r2, r2, #0x04
+	moveq	pc, lr
+	ldrb	ip, [r1], #0x01
+	cmp	r2, #0x02
+	ldrgeb	r2, [r1], #0x01
+	strb	ip, [r3], #0x01
+	ldrgtb	ip, [r1]
+	strgeb	r2, [r3], #0x01
+	strgtb	ip, [r3]
+	mov	pc, lr
+
+
+/*
+ * Handle short copies (less than 16 bytes), possibly misaligned.
+ * Some of these are *very* common, thanks to the network stack,
+ * and so are handled specially.
+ */
+.Lmemcpy_short:
+#ifndef _STANDALONE
+	add	pc, pc, r2, lsl #2
+	nop
+	mov	pc, lr			/* 0x00 */
+	b	.Lmemcpy_bytewise	/* 0x01 */
+	b	.Lmemcpy_bytewise	/* 0x02 */
+	b	.Lmemcpy_bytewise	/* 0x03 */
+	b	.Lmemcpy_4		/* 0x04 */
+	b	.Lmemcpy_bytewise	/* 0x05 */
+	b	.Lmemcpy_6		/* 0x06 */
+	b	.Lmemcpy_bytewise	/* 0x07 */
+	b	.Lmemcpy_8		/* 0x08 */
+	b	.Lmemcpy_bytewise	/* 0x09 */
+	b	.Lmemcpy_bytewise	/* 0x0a */
+	b	.Lmemcpy_bytewise	/* 0x0b */
+	b	.Lmemcpy_c		/* 0x0c */
+#endif
+.Lmemcpy_bytewise:
+	mov	r3, r0			/* We must not clobber r0 */
+	ldrb	ip, [r1], #0x01
+1:	subs	r2, r2, #0x01
+	strb	ip, [r3], #0x01
+	ldrneb	ip, [r1], #0x01
+	bne	1b
+	mov	pc, lr
+
+#ifndef _STANDALONE
+/******************************************************************************
+ * Special case for 4 byte copies
+ */
+#define	LMEMCPY_4_LOG2	6	/* 64 bytes */
+#define	LMEMCPY_4_PAD	.align LMEMCPY_4_LOG2
+	LMEMCPY_4_PAD
+.Lmemcpy_4:
+	and	r2, r1, #0x03
+	orr	r2, r2, r0, lsl #2
+	ands	r2, r2, #0x0f
+	sub	r3, pc, #0x14
+	addne	pc, r3, r2, lsl #LMEMCPY_4_LOG2
+
+/*
+ * 0000: dst is 32-bit aligned, src is 32-bit aligned
+ */
+	ldr	r2, [r1]
+	str	r2, [r0]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 0001: dst is 32-bit aligned, src is 8-bit aligned
+ */
+	ldr	r3, [r1, #-1]		/* BE:r3 = x012  LE:r3 = 210x */
+	ldr	r2, [r1, #3]		/* BE:r2 = 3xxx  LE:r2 = xxx3 */
+#ifdef __ARMEB__
+	mov	r3, r3, lsl #8		/* r3 = 012. */
+	orr	r3, r3, r2, lsr #24	/* r3 = 0123 */
+#else
+	mov	r3, r3, lsr #8		/* r3 = .210 */
+	orr	r3, r3, r2, lsl #24	/* r3 = 3210 */
+#endif
+	str	r3, [r0]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 0010: dst is 32-bit aligned, src is 16-bit aligned
+ */
+#ifdef __ARMEB__
+	ldrh	r3, [r1]
+	ldrh	r2, [r1, #0x02]
+#else
+	ldrh	r3, [r1, #0x02]
+	ldrh	r2, [r1]
+#endif
+	orr	r3, r2, r3, lsl #16
+	str	r3, [r0]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 0011: dst is 32-bit aligned, src is 8-bit aligned
+ */
+	ldr	r3, [r1, #-3]		/* BE:r3 = xxx0  LE:r3 = 0xxx */
+	ldr	r2, [r1, #1]		/* BE:r2 = 123x  LE:r2 = x321 */
+#ifdef __ARMEB__
+	mov	r3, r3, lsl #24		/* r3 = 0... */
+	orr	r3, r3, r2, lsr #8	/* r3 = 0123 */
+#else
+	mov	r3, r3, lsr #24		/* r3 = ...0 */
+	orr	r3, r3, r2, lsl #8	/* r3 = 3210 */
+#endif
+	str	r3, [r0]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 0100: dst is 8-bit aligned, src is 32-bit aligned
+ */
+	ldr	r2, [r1]
+#ifdef __ARMEB__
+	strb	r2, [r0, #0x03]
+	mov	r3, r2, lsr #8
+	mov	r1, r2, lsr #24
+	strb	r1, [r0]
+#else
+	strb	r2, [r0]
+	mov	r3, r2, lsr #8
+	mov	r1, r2, lsr #24
+	strb	r1, [r0, #0x03]
+#endif
+	strh	r3, [r0, #0x01]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 0101: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]
+	ldrh	r3, [r1, #0x01]
+	ldrb	r1, [r1, #0x03]
+	strb	r2, [r0]
+	strh	r3, [r0, #0x01]
+	strb	r1, [r0, #0x03]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 0110: dst is 8-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+	ldrh	r3, [r1, #0x02]		/* LE:r3 = ..23  LE:r3 = ..32 */
+#ifdef __ARMEB__
+	mov	r1, r2, lsr #8		/* r1 = ...0 */
+	strb	r1, [r0]
+	mov	r2, r2, lsl #8		/* r2 = .01. */
+	orr	r2, r2, r3, lsr #8	/* r2 = .012 */
+#else
+	strb	r2, [r0]
+	mov	r2, r2, lsr #8		/* r2 = ...1 */
+	orr	r2, r2, r3, lsl #8	/* r2 = .321 */
+	mov	r3, r3, lsr #8		/* r3 = ...3 */
+#endif
+	strh	r2, [r0, #0x01]
+	strb	r3, [r0, #0x03]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 0111: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]
+	ldrh	r3, [r1, #0x01]
+	ldrb	r1, [r1, #0x03]
+	strb	r2, [r0]
+	strh	r3, [r0, #0x01]
+	strb	r1, [r0, #0x03]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 1000: dst is 16-bit aligned, src is 32-bit aligned
+ */
+	ldr	r2, [r1]
+#ifdef __ARMEB__
+	strh	r2, [r0, #0x02]
+	mov	r3, r2, lsr #16
+	strh	r3, [r0]
+#else
+	strh	r2, [r0]
+	mov	r3, r2, lsr #16
+	strh	r3, [r0, #0x02]
+#endif
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 1001: dst is 16-bit aligned, src is 8-bit aligned
+ */
+	ldr	r2, [r1, #-1]		/* BE:r2 = x012  LE:r2 = 210x */
+	ldr	r3, [r1, #3]		/* BE:r3 = 3xxx  LE:r3 = xxx3 */
+	mov	r1, r2, lsr #8		/* BE:r1 = .x01  LE:r1 = .210 */
+	strh	r1, [r0]
+#ifdef __ARMEB__
+	mov	r2, r2, lsl #8		/* r2 = 012. */
+	orr	r2, r2, r3, lsr #24	/* r2 = 0123 */
+#else
+	mov	r2, r2, lsr #24		/* r2 = ...2 */
+	orr	r2, r2, r3, lsl #8	/* r2 = xx32 */
+#endif
+	strh	r2, [r0, #0x02]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 1010: dst is 16-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]
+	ldrh	r3, [r1, #0x02]
+	strh	r2, [r0]
+	strh	r3, [r0, #0x02]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 1011: dst is 16-bit aligned, src is 8-bit aligned
+ */
+	ldr	r3, [r1, #1]		/* BE:r3 = 123x  LE:r3 = x321 */
+	ldr	r2, [r1, #-3]		/* BE:r2 = xxx0  LE:r2 = 0xxx */
+	mov	r1, r3, lsr #8		/* BE:r1 = .123  LE:r1 = .x32 */
+	strh	r1, [r0, #0x02]
+#ifdef __ARMEB__
+	mov	r3, r3, lsr #24		/* r3 = ...1 */
+	orr	r3, r3, r2, lsl #8	/* r3 = xx01 */
+#else
+	mov	r3, r3, lsl #8		/* r3 = 321. */
+	orr	r3, r3, r2, lsr #24	/* r3 = 3210 */
+#endif
+	strh	r3, [r0]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 1100: dst is 8-bit aligned, src is 32-bit aligned
+ */
+	ldr	r2, [r1]		/* BE:r2 = 0123  LE:r2 = 3210 */
+#ifdef __ARMEB__
+	strb	r2, [r0, #0x03]
+	mov	r3, r2, lsr #8
+	mov	r1, r2, lsr #24
+	strh	r3, [r0, #0x01]
+	strb	r1, [r0]
+#else
+	strb	r2, [r0]
+	mov	r3, r2, lsr #8
+	mov	r1, r2, lsr #24
+	strh	r3, [r0, #0x01]
+	strb	r1, [r0, #0x03]
+#endif
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 1101: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]
+	ldrh	r3, [r1, #0x01]
+	ldrb	r1, [r1, #0x03]
+	strb	r2, [r0]
+	strh	r3, [r0, #0x01]
+	strb	r1, [r0, #0x03]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 1110: dst is 8-bit aligned, src is 16-bit aligned
+ */
+#ifdef __ARMEB__
+	ldrh	r3, [r1, #0x02]		/* BE:r3 = ..23  LE:r3 = ..32 */
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+	strb	r3, [r0, #0x03]
+	mov	r3, r3, lsr #8		/* r3 = ...2 */
+	orr	r3, r3, r2, lsl #8	/* r3 = ..12 */
+	strh	r3, [r0, #0x01]
+	mov	r2, r2, lsr #8		/* r2 = ...0 */
+	strb	r2, [r0]
+#else
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+	ldrh	r3, [r1, #0x02]		/* BE:r3 = ..23  LE:r3 = ..32 */
+	strb	r2, [r0]
+	mov	r2, r2, lsr #8		/* r2 = ...1 */
+	orr	r2, r2, r3, lsl #8	/* r2 = .321 */
+	strh	r2, [r0, #0x01]
+	mov	r3, r3, lsr #8		/* r3 = ...3 */
+	strb	r3, [r0, #0x03]
+#endif
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+/*
+ * 1111: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]
+	ldrh	r3, [r1, #0x01]
+	ldrb	r1, [r1, #0x03]
+	strb	r2, [r0]
+	strh	r3, [r0, #0x01]
+	strb	r1, [r0, #0x03]
+	mov	pc, lr
+	LMEMCPY_4_PAD
+
+
+/******************************************************************************
+ * Special case for 6 byte copies
+ */
+#define	LMEMCPY_6_LOG2	6	/* 64 bytes */
+#define	LMEMCPY_6_PAD	.align LMEMCPY_6_LOG2
+	LMEMCPY_6_PAD
+.Lmemcpy_6:
+	and	r2, r1, #0x03
+	orr	r2, r2, r0, lsl #2
+	ands	r2, r2, #0x0f
+	sub	r3, pc, #0x14
+	addne	pc, r3, r2, lsl #LMEMCPY_6_LOG2
+
+/*
+ * 0000: dst is 32-bit aligned, src is 32-bit aligned
+ */
+	ldr	r2, [r1]
+	ldrh	r3, [r1, #0x04]
+	str	r2, [r0]
+	strh	r3, [r0, #0x04]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 0001: dst is 32-bit aligned, src is 8-bit aligned
+ */
+	ldr	r2, [r1, #-1]		/* BE:r2 = x012  LE:r2 = 210x */
+	ldr	r3, [r1, #0x03]		/* BE:r3 = 345x  LE:r3 = x543 */
+#ifdef __ARMEB__
+	mov	r2, r2, lsl #8		/* r2 = 012. */
+	orr	r2, r2, r3, lsr #24	/* r2 = 0123 */
+#else
+	mov	r2, r2, lsr #8		/* r2 = .210 */
+	orr	r2, r2, r3, lsl #24	/* r2 = 3210 */
+#endif
+	mov	r3, r3, lsr #8		/* BE:r3 = .345  LE:r3 = .x54 */
+	str	r2, [r0]
+	strh	r3, [r0, #0x04]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 0010: dst is 32-bit aligned, src is 16-bit aligned
+ */
+	ldr	r3, [r1, #0x02]		/* BE:r3 = 2345  LE:r3 = 5432 */
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+#ifdef __ARMEB__
+	mov	r1, r3, lsr #16		/* r1 = ..23 */
+	orr	r1, r1, r2, lsl #16	/* r1 = 0123 */
+	str	r1, [r0]
+	strh	r3, [r0, #0x04]
+#else
+	mov	r1, r3, lsr #16		/* r1 = ..54 */
+	orr	r2, r2, r3, lsl #16	/* r2 = 3210 */
+	str	r2, [r0]
+	strh	r1, [r0, #0x04]
+#endif
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 0011: dst is 32-bit aligned, src is 8-bit aligned
+ */
+	ldr	r2, [r1, #-3]		/* BE:r2 = xxx0  LE:r2 = 0xxx */
+	ldr	r3, [r1, #1]		/* BE:r3 = 1234  LE:r3 = 4321 */
+	ldr	r1, [r1, #5]		/* BE:r1 = 5xxx  LE:r3 = xxx5 */
+#ifdef __ARMEB__
+	mov	r2, r2, lsl #24		/* r2 = 0... */
+	orr	r2, r2, r3, lsr #8	/* r2 = 0123 */
+	mov	r3, r3, lsl #8		/* r3 = 234. */
+	orr	r1, r3, r1, lsr #24	/* r1 = 2345 */
+#else
+	mov	r2, r2, lsr #24		/* r2 = ...0 */
+	orr	r2, r2, r3, lsl #8	/* r2 = 3210 */
+	mov	r1, r1, lsl #8		/* r1 = xx5. */
+	orr	r1, r1, r3, lsr #24	/* r1 = xx54 */
+#endif
+	str	r2, [r0]
+	strh	r1, [r0, #0x04]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 0100: dst is 8-bit aligned, src is 32-bit aligned
+ */
+	ldr	r3, [r1]		/* BE:r3 = 0123  LE:r3 = 3210 */
+	ldrh	r2, [r1, #0x04]		/* BE:r2 = ..45  LE:r2 = ..54 */
+	mov	r1, r3, lsr #8		/* BE:r1 = .012  LE:r1 = .321 */
+	strh	r1, [r0, #0x01]
+#ifdef __ARMEB__
+	mov	r1, r3, lsr #24		/* r1 = ...0 */
+	strb	r1, [r0]
+	mov	r3, r3, lsl #8		/* r3 = 123. */
+	orr	r3, r3, r2, lsr #8	/* r3 = 1234 */
+#else
+	strb	r3, [r0]
+	mov	r3, r3, lsr #24		/* r3 = ...3 */
+	orr	r3, r3, r2, lsl #8	/* r3 = .543 */
+	mov	r2, r2, lsr #8		/* r2 = ...5 */
+#endif
+	strh	r3, [r0, #0x03]
+	strb	r2, [r0, #0x05]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 0101: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]
+	ldrh	r3, [r1, #0x01]
+	ldrh	ip, [r1, #0x03]
+	ldrb	r1, [r1, #0x05]
+	strb	r2, [r0]
+	strh	r3, [r0, #0x01]
+	strh	ip, [r0, #0x03]
+	strb	r1, [r0, #0x05]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 0110: dst is 8-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+	ldr	r1, [r1, #0x02]		/* BE:r1 = 2345  LE:r1 = 5432 */
+#ifdef __ARMEB__
+	mov	r3, r2, lsr #8		/* r3 = ...0 */
+	strb	r3, [r0]
+	strb	r1, [r0, #0x05]
+	mov	r3, r1, lsr #8		/* r3 = .234 */
+	strh	r3, [r0, #0x03]
+	mov	r3, r2, lsl #8		/* r3 = .01. */
+	orr	r3, r3, r1, lsr #24	/* r3 = .012 */
+	strh	r3, [r0, #0x01]
+#else
+	strb	r2, [r0]
+	mov	r3, r1, lsr #24
+	strb	r3, [r0, #0x05]
+	mov	r3, r1, lsr #8		/* r3 = .543 */
+	strh	r3, [r0, #0x03]
+	mov	r3, r2, lsr #8		/* r3 = ...1 */
+	orr	r3, r3, r1, lsl #8	/* r3 = 4321 */
+	strh	r3, [r0, #0x01]
+#endif
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 0111: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]
+	ldrh	r3, [r1, #0x01]
+	ldrh	ip, [r1, #0x03]
+	ldrb	r1, [r1, #0x05]
+	strb	r2, [r0]
+	strh	r3, [r0, #0x01]
+	strh	ip, [r0, #0x03]
+	strb	r1, [r0, #0x05]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 1000: dst is 16-bit aligned, src is 32-bit aligned
+ */
+#ifdef __ARMEB__
+	ldr	r2, [r1]		/* r2 = 0123 */
+	ldrh	r3, [r1, #0x04]		/* r3 = ..45 */
+	mov	r1, r2, lsr #16		/* r1 = ..01 */
+	orr	r3, r3, r2, lsl#16	/* r3 = 2345 */
+	strh	r1, [r0]
+	str	r3, [r0, #0x02]
+#else
+	ldrh	r2, [r1, #0x04]		/* r2 = ..54 */
+	ldr	r3, [r1]		/* r3 = 3210 */
+	mov	r2, r2, lsl #16		/* r2 = 54.. */
+	orr	r2, r2, r3, lsr #16	/* r2 = 5432 */
+	strh	r3, [r0]
+	str	r2, [r0, #0x02]
+#endif
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 1001: dst is 16-bit aligned, src is 8-bit aligned
+ */
+	ldr	r3, [r1, #-1]		/* BE:r3 = x012  LE:r3 = 210x */
+	ldr	r2, [r1, #3]		/* BE:r2 = 345x  LE:r2 = x543 */
+	mov	r1, r3, lsr #8		/* BE:r1 = .x01  LE:r1 = .210 */
+#ifdef __ARMEB__
+	mov	r2, r2, lsr #8		/* r2 = .345 */
+	orr	r2, r2, r3, lsl #24	/* r2 = 2345 */
+#else
+	mov	r2, r2, lsl #8		/* r2 = 543. */
+	orr	r2, r2, r3, lsr #24	/* r2 = 5432 */
+#endif
+	strh	r1, [r0]
+	str	r2, [r0, #0x02]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 1010: dst is 16-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]
+	ldr	r3, [r1, #0x02]
+	strh	r2, [r0]
+	str	r3, [r0, #0x02]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 1011: dst is 16-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r3, [r1]		/* r3 = ...0 */
+	ldr	r2, [r1, #0x01]		/* BE:r2 = 1234  LE:r2 = 4321 */
+	ldrb	r1, [r1, #0x05]		/* r1 = ...5 */
+#ifdef __ARMEB__
+	mov	r3, r3, lsl #8		/* r3 = ..0. */
+	orr	r3, r3, r2, lsr #24	/* r3 = ..01 */
+	orr	r1, r1, r2, lsl #8	/* r1 = 2345 */
+#else
+	orr	r3, r3, r2, lsl #8	/* r3 = 3210 */
+	mov	r1, r1, lsl #24		/* r1 = 5... */
+	orr	r1, r1, r2, lsr #8	/* r1 = 5432 */
+#endif
+	strh	r3, [r0]
+	str	r1, [r0, #0x02]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 1100: dst is 8-bit aligned, src is 32-bit aligned
+ */
+	ldr	r2, [r1]		/* BE:r2 = 0123  LE:r2 = 3210 */
+	ldrh	r1, [r1, #0x04]		/* BE:r1 = ..45  LE:r1 = ..54 */
+#ifdef __ARMEB__
+	mov	r3, r2, lsr #24		/* r3 = ...0 */
+	strb	r3, [r0]
+	mov	r2, r2, lsl #8		/* r2 = 123. */
+	orr	r2, r2, r1, lsr #8	/* r2 = 1234 */
+#else
+	strb	r2, [r0]
+	mov	r2, r2, lsr #8		/* r2 = .321 */
+	orr	r2, r2, r1, lsl #24	/* r2 = 4321 */
+	mov	r1, r1, lsr #8		/* r1 = ...5 */
+#endif
+	str	r2, [r0, #0x01]
+	strb	r1, [r0, #0x05]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 1101: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]
+	ldrh	r3, [r1, #0x01]
+	ldrh	ip, [r1, #0x03]
+	ldrb	r1, [r1, #0x05]
+	strb	r2, [r0]
+	strh	r3, [r0, #0x01]
+	strh	ip, [r0, #0x03]
+	strb	r1, [r0, #0x05]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 1110: dst is 8-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+	ldr	r1, [r1, #0x02]		/* BE:r1 = 2345  LE:r1 = 5432 */
+#ifdef __ARMEB__
+	mov	r3, r2, lsr #8		/* r3 = ...0 */
+	strb	r3, [r0]
+	mov	r2, r2, lsl #24		/* r2 = 1... */
+	orr	r2, r2, r1, lsr #8	/* r2 = 1234 */
+#else
+	strb	r2, [r0]
+	mov	r2, r2, lsr #8		/* r2 = ...1 */
+	orr	r2, r2, r1, lsl #8	/* r2 = 4321 */
+	mov	r1, r1, lsr #24		/* r1 = ...5 */
+#endif
+	str	r2, [r0, #0x01]
+	strb	r1, [r0, #0x05]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+/*
+ * 1111: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]
+	ldr	r3, [r1, #0x01]
+	ldrb	r1, [r1, #0x05]
+	strb	r2, [r0]
+	str	r3, [r0, #0x01]
+	strb	r1, [r0, #0x05]
+	mov	pc, lr
+	LMEMCPY_6_PAD
+
+
+/******************************************************************************
+ * Special case for 8 byte copies
+ */
+#define	LMEMCPY_8_LOG2	6	/* 64 bytes */
+#define	LMEMCPY_8_PAD	.align LMEMCPY_8_LOG2
+	LMEMCPY_8_PAD
+.Lmemcpy_8:
+	and	r2, r1, #0x03
+	orr	r2, r2, r0, lsl #2
+	ands	r2, r2, #0x0f
+	sub	r3, pc, #0x14
+	addne	pc, r3, r2, lsl #LMEMCPY_8_LOG2
+
+/*
+ * 0000: dst is 32-bit aligned, src is 32-bit aligned
+ */
+	ldr	r2, [r1]
+	ldr	r3, [r1, #0x04]
+	str	r2, [r0]
+	str	r3, [r0, #0x04]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 0001: dst is 32-bit aligned, src is 8-bit aligned
+ */
+	ldr	r3, [r1, #-1]		/* BE:r3 = x012  LE:r3 = 210x */
+	ldr	r2, [r1, #0x03]		/* BE:r2 = 3456  LE:r2 = 6543 */
+	ldrb	r1, [r1, #0x07]		/* r1 = ...7 */
+#ifdef __ARMEB__
+	mov	r3, r3, lsl #8		/* r3 = 012. */
+	orr	r3, r3, r2, lsr #24	/* r3 = 0123 */
+	orr	r2, r1, r2, lsl #8	/* r2 = 4567 */
+#else
+	mov	r3, r3, lsr #8		/* r3 = .210 */
+	orr	r3, r3, r2, lsl #24	/* r3 = 3210 */
+	mov	r1, r1, lsl #24		/* r1 = 7... */
+	orr	r2, r1, r2, lsr #8	/* r2 = 7654 */
+#endif
+	str	r3, [r0]
+	str	r2, [r0, #0x04]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 0010: dst is 32-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+	ldr	r3, [r1, #0x02]		/* BE:r3 = 2345  LE:r3 = 5432 */
+	ldrh	r1, [r1, #0x06]		/* BE:r1 = ..67  LE:r1 = ..76 */
+#ifdef __ARMEB__
+	mov	r2, r2, lsl #16		/* r2 = 01.. */
+	orr	r2, r2, r3, lsr #16	/* r2 = 0123 */
+	orr	r3, r1, r3, lsl #16	/* r3 = 4567 */
+#else
+	orr	r2, r2, r3, lsl #16	/* r2 = 3210 */
+	mov	r3, r3, lsr #16		/* r3 = ..54 */
+	orr	r3, r3, r1, lsl #16	/* r3 = 7654 */
+#endif
+	str	r2, [r0]
+	str	r3, [r0, #0x04]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 0011: dst is 32-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r3, [r1]		/* r3 = ...0 */
+	ldr	r2, [r1, #0x01]		/* BE:r2 = 1234  LE:r2 = 4321 */
+	ldr	r1, [r1, #0x05]		/* BE:r1 = 567x  LE:r1 = x765 */
+#ifdef __ARMEB__
+	mov	r3, r3, lsl #24		/* r3 = 0... */
+	orr	r3, r3, r2, lsr #8	/* r3 = 0123 */
+	mov	r2, r2, lsl #24		/* r2 = 4... */
+	orr	r2, r2, r1, lsr #8	/* r2 = 4567 */
+#else
+	orr	r3, r3, r2, lsl #8	/* r3 = 3210 */
+	mov	r2, r2, lsr #24		/* r2 = ...4 */
+	orr	r2, r2, r1, lsl #8	/* r2 = 7654 */
+#endif
+	str	r3, [r0]
+	str	r2, [r0, #0x04]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 0100: dst is 8-bit aligned, src is 32-bit aligned
+ */
+	ldr	r3, [r1]		/* BE:r3 = 0123  LE:r3 = 3210 */
+	ldr	r2, [r1, #0x04]		/* BE:r2 = 4567  LE:r2 = 7654 */
+#ifdef __ARMEB__
+	mov	r1, r3, lsr #24		/* r1 = ...0 */
+	strb	r1, [r0]
+	mov	r1, r3, lsr #8		/* r1 = .012 */
+	strb	r2, [r0, #0x07]
+	mov	r3, r3, lsl #24		/* r3 = 3... */
+	orr	r3, r3, r2, lsr #8	/* r3 = 3456 */
+#else
+	strb	r3, [r0]
+	mov	r1, r2, lsr #24		/* r1 = ...7 */
+	strb	r1, [r0, #0x07]
+	mov	r1, r3, lsr #8		/* r1 = .321 */
+	mov	r3, r3, lsr #24		/* r3 = ...3 */
+	orr	r3, r3, r2, lsl #8	/* r3 = 6543 */
+#endif
+	strh	r1, [r0, #0x01]
+	str	r3, [r0, #0x03]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 0101: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]
+	ldrh	r3, [r1, #0x01]
+	ldr	ip, [r1, #0x03]
+	ldrb	r1, [r1, #0x07]
+	strb	r2, [r0]
+	strh	r3, [r0, #0x01]
+	str	ip, [r0, #0x03]
+	strb	r1, [r0, #0x07]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 0110: dst is 8-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+	ldr	r3, [r1, #0x02]		/* BE:r3 = 2345  LE:r3 = 5432 */
+	ldrh	r1, [r1, #0x06]		/* BE:r1 = ..67  LE:r1 = ..76 */
+#ifdef __ARMEB__
+	mov	ip, r2, lsr #8		/* ip = ...0 */
+	strb	ip, [r0]
+	mov	ip, r2, lsl #8		/* ip = .01. */
+	orr	ip, ip, r3, lsr #24	/* ip = .012 */
+	strb	r1, [r0, #0x07]
+	mov	r3, r3, lsl #8		/* r3 = 345. */
+	orr	r3, r3, r1, lsr #8	/* r3 = 3456 */
+#else
+	strb	r2, [r0]		/* 0 */
+	mov	ip, r1, lsr #8		/* ip = ...7 */
+	strb	ip, [r0, #0x07]		/* 7 */
+	mov	ip, r2, lsr #8		/* ip = ...1 */
+	orr	ip, ip, r3, lsl #8	/* ip = 4321 */
+	mov	r3, r3, lsr #8		/* r3 = .543 */
+	orr	r3, r3, r1, lsl #24	/* r3 = 6543 */
+#endif
+	strh	ip, [r0, #0x01]
+	str	r3, [r0, #0x03]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 0111: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r3, [r1]		/* r3 = ...0 */
+	ldr	ip, [r1, #0x01]		/* BE:ip = 1234  LE:ip = 4321 */
+	ldrh	r2, [r1, #0x05]		/* BE:r2 = ..56  LE:r2 = ..65 */
+	ldrb	r1, [r1, #0x07]		/* r1 = ...7 */
+	strb	r3, [r0]
+	mov	r3, ip, lsr #16		/* BE:r3 = ..12  LE:r3 = ..43 */
+#ifdef __ARMEB__
+	strh	r3, [r0, #0x01]
+	orr	r2, r2, ip, lsl #16	/* r2 = 3456 */
+#else
+	strh	ip, [r0, #0x01]
+	orr	r2, r3, r2, lsl #16	/* r2 = 6543 */
+#endif
+	str	r2, [r0, #0x03]
+	strb	r1, [r0, #0x07]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 1000: dst is 16-bit aligned, src is 32-bit aligned
+ */
+	ldr	r2, [r1]		/* BE:r2 = 0123  LE:r2 = 3210 */
+	ldr	r3, [r1, #0x04]		/* BE:r3 = 4567  LE:r3 = 7654 */
+	mov	r1, r2, lsr #16		/* BE:r1 = ..01  LE:r1 = ..32 */
+#ifdef __ARMEB__
+	strh	r1, [r0]
+	mov	r1, r3, lsr #16		/* r1 = ..45 */
+	orr	r2, r1 ,r2, lsl #16	/* r2 = 2345 */
+#else
+	strh	r2, [r0]
+	orr	r2, r1, r3, lsl #16	/* r2 = 5432 */
+	mov	r3, r3, lsr #16		/* r3 = ..76 */
+#endif
+	str	r2, [r0, #0x02]
+	strh	r3, [r0, #0x06]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 1001: dst is 16-bit aligned, src is 8-bit aligned
+ */
+	ldr	r2, [r1, #-1]		/* BE:r2 = x012  LE:r2 = 210x */
+	ldr	r3, [r1, #0x03]		/* BE:r3 = 3456  LE:r3 = 6543 */
+	ldrb	ip, [r1, #0x07]		/* ip = ...7 */
+	mov	r1, r2, lsr #8		/* BE:r1 = .x01  LE:r1 = .210 */
+	strh	r1, [r0]
+#ifdef __ARMEB__
+	mov	r1, r2, lsl #24		/* r1 = 2... */
+	orr	r1, r1, r3, lsr #8	/* r1 = 2345 */
+	orr	r3, ip, r3, lsl #8	/* r3 = 4567 */
+#else
+	mov	r1, r2, lsr #24		/* r1 = ...2 */
+	orr	r1, r1, r3, lsl #8	/* r1 = 5432 */
+	mov	r3, r3, lsr #24		/* r3 = ...6 */
+	orr	r3, r3, ip, lsl #8	/* r3 = ..76 */
+#endif
+	str	r1, [r0, #0x02]
+	strh	r3, [r0, #0x06]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 1010: dst is 16-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]
+	ldr	ip, [r1, #0x02]
+	ldrh	r3, [r1, #0x06]
+	strh	r2, [r0]
+	str	ip, [r0, #0x02]
+	strh	r3, [r0, #0x06]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 1011: dst is 16-bit aligned, src is 8-bit aligned
+ */
+	ldr	r3, [r1, #0x05]		/* BE:r3 = 567x  LE:r3 = x765 */
+	ldr	r2, [r1, #0x01]		/* BE:r2 = 1234  LE:r2 = 4321 */
+	ldrb	ip, [r1]		/* ip = ...0 */
+	mov	r1, r3, lsr #8		/* BE:r1 = .567  LE:r1 = .x76 */
+	strh	r1, [r0, #0x06]
+#ifdef __ARMEB__
+	mov	r3, r3, lsr #24		/* r3 = ...5 */
+	orr	r3, r3, r2, lsl #8	/* r3 = 2345 */
+	mov	r2, r2, lsr #24		/* r2 = ...1 */
+	orr	r2, r2, ip, lsl #8	/* r2 = ..01 */
+#else
+	mov	r3, r3, lsl #24		/* r3 = 5... */
+	orr	r3, r3, r2, lsr #8	/* r3 = 5432 */
+	orr	r2, ip, r2, lsl #8	/* r2 = 3210 */
+#endif
+	str	r3, [r0, #0x02]
+	strh	r2, [r0]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 1100: dst is 8-bit aligned, src is 32-bit aligned
+ */
+	ldr	r3, [r1, #0x04]		/* BE:r3 = 4567  LE:r3 = 7654 */
+	ldr	r2, [r1]		/* BE:r2 = 0123  LE:r2 = 3210 */
+	mov	r1, r3, lsr #8		/* BE:r1 = .456  LE:r1 = .765 */
+	strh	r1, [r0, #0x05]
+#ifdef __ARMEB__
+	strb	r3, [r0, #0x07]
+	mov	r1, r2, lsr #24		/* r1 = ...0 */
+	strb	r1, [r0]
+	mov	r2, r2, lsl #8		/* r2 = 123. */
+	orr	r2, r2, r3, lsr #24	/* r2 = 1234 */
+	str	r2, [r0, #0x01]
+#else
+	strb	r2, [r0]
+	mov	r1, r3, lsr #24		/* r1 = ...7 */
+	strb	r1, [r0, #0x07]
+	mov	r2, r2, lsr #8		/* r2 = .321 */
+	orr	r2, r2, r3, lsl #24	/* r2 = 4321 */
+	str	r2, [r0, #0x01]
+#endif
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 1101: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r3, [r1]		/* r3 = ...0 */
+	ldrh	r2, [r1, #0x01]		/* BE:r2 = ..12  LE:r2 = ..21 */
+	ldr	ip, [r1, #0x03]		/* BE:ip = 3456  LE:ip = 6543 */
+	ldrb	r1, [r1, #0x07]		/* r1 = ...7 */
+	strb	r3, [r0]
+	mov	r3, ip, lsr #16		/* BE:r3 = ..34  LE:r3 = ..65 */
+#ifdef __ARMEB__
+	strh	ip, [r0, #0x05]
+	orr	r2, r3, r2, lsl #16	/* r2 = 1234 */
+#else
+	strh	r3, [r0, #0x05]
+	orr	r2, r2, ip, lsl #16	/* r2 = 4321 */
+#endif
+	str	r2, [r0, #0x01]
+	strb	r1, [r0, #0x07]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 1110: dst is 8-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+	ldr	r3, [r1, #0x02]		/* BE:r3 = 2345  LE:r3 = 5432 */
+	ldrh	r1, [r1, #0x06]		/* BE:r1 = ..67  LE:r1 = ..76 */
+#ifdef __ARMEB__
+	mov	ip, r2, lsr #8		/* ip = ...0 */
+	strb	ip, [r0]
+	mov	ip, r2, lsl #24		/* ip = 1... */
+	orr	ip, ip, r3, lsr #8	/* ip = 1234 */
+	strb	r1, [r0, #0x07]
+	mov	r1, r1, lsr #8		/* r1 = ...6 */
+	orr	r1, r1, r3, lsl #8	/* r1 = 3456 */
+#else
+	strb	r2, [r0]
+	mov	ip, r2, lsr #8		/* ip = ...1 */
+	orr	ip, ip, r3, lsl #8	/* ip = 4321 */
+	mov	r2, r1, lsr #8		/* r2 = ...7 */
+	strb	r2, [r0, #0x07]
+	mov	r1, r1, lsl #8		/* r1 = .76. */
+	orr	r1, r1, r3, lsr #24	/* r1 = .765 */
+#endif
+	str	ip, [r0, #0x01]
+	strh	r1, [r0, #0x05]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/*
+ * 1111: dst is 8-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]
+	ldr	ip, [r1, #0x01]
+	ldrh	r3, [r1, #0x05]
+	ldrb	r1, [r1, #0x07]
+	strb	r2, [r0]
+	str	ip, [r0, #0x01]
+	strh	r3, [r0, #0x05]
+	strb	r1, [r0, #0x07]
+	mov	pc, lr
+	LMEMCPY_8_PAD
+
+/******************************************************************************
+ * Special case for 12 byte copies
+ */
+#define	LMEMCPY_C_LOG2	7	/* 128 bytes */
+#define	LMEMCPY_C_PAD	.align LMEMCPY_C_LOG2
+	LMEMCPY_C_PAD
+.Lmemcpy_c:
+	and	r2, r1, #0x03
+	orr	r2, r2, r0, lsl #2
+	ands	r2, r2, #0x0f
+	sub	r3, pc, #0x14
+	addne	pc, r3, r2, lsl #LMEMCPY_C_LOG2
+
+/*
+ * 0000: dst is 32-bit aligned, src is 32-bit aligned
+ */
+	ldr	r2, [r1]
+	ldr	r3, [r1, #0x04]
+	ldr	r1, [r1, #0x08]
+	str	r2, [r0]
+	str	r3, [r0, #0x04]
+	str	r1, [r0, #0x08]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 0001: dst is 32-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1, #0xb]		/* r2 = ...B */
+	ldr	ip, [r1, #0x07]		/* BE:ip = 789A  LE:ip = A987 */
+	ldr	r3, [r1, #0x03]		/* BE:r3 = 3456  LE:r3 = 6543 */
+	ldr	r1, [r1, #-1]		/* BE:r1 = x012  LE:r1 = 210x */
+#ifdef __ARMEB__
+	orr	r2, r2, ip, lsl #8	/* r2 = 89AB */
+	str	r2, [r0, #0x08]
+	mov	r2, ip, lsr #24		/* r2 = ...7 */
+	orr	r2, r2, r3, lsl #8	/* r2 = 4567 */
+	mov	r1, r1, lsl #8		/* r1 = 012. */
+	orr	r1, r1, r3, lsr #24	/* r1 = 0123 */
+#else
+	mov	r2, r2, lsl #24		/* r2 = B... */
+	orr	r2, r2, ip, lsr #8	/* r2 = BA98 */
+	str	r2, [r0, #0x08]
+	mov	r2, ip, lsl #24		/* r2 = 7... */
+	orr	r2, r2, r3, lsr #8	/* r2 = 7654 */
+	mov	r1, r1, lsr #8		/* r1 = .210 */
+	orr	r1, r1, r3, lsl #24	/* r1 = 3210 */
+#endif
+	str	r2, [r0, #0x04]
+	str	r1, [r0]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 0010: dst is 32-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+	ldr	r3, [r1, #0x02]		/* BE:r3 = 2345  LE:r3 = 5432 */
+	ldr	ip, [r1, #0x06]		/* BE:ip = 6789  LE:ip = 9876 */
+	ldrh	r1, [r1, #0x0a]		/* BE:r1 = ..AB  LE:r1 = ..BA */
+#ifdef __ARMEB__
+	mov	r2, r2, lsl #16		/* r2 = 01.. */
+	orr	r2, r2, r3, lsr #16	/* r2 = 0123 */
+	str	r2, [r0]
+	mov	r3, r3, lsl #16		/* r3 = 45.. */
+	orr	r3, r3, ip, lsr #16	/* r3 = 4567 */
+	orr	r1, r1, ip, lsl #16	/* r1 = 89AB */
+#else
+	orr	r2, r2, r3, lsl #16	/* r2 = 3210 */
+	str	r2, [r0]
+	mov	r3, r3, lsr #16		/* r3 = ..54 */
+	orr	r3, r3, ip, lsl #16	/* r3 = 7654 */
+	mov	r1, r1, lsl #16		/* r1 = BA.. */
+	orr	r1, r1, ip, lsr #16	/* r1 = BA98 */
+#endif
+	str	r3, [r0, #0x04]
+	str	r1, [r0, #0x08]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 0011: dst is 32-bit aligned, src is 8-bit aligned
+ */
+	ldrb	r2, [r1]		/* r2 = ...0 */
+	ldr	r3, [r1, #0x01]		/* BE:r3 = 1234  LE:r3 = 4321 */
+	ldr	ip, [r1, #0x05]		/* BE:ip = 5678  LE:ip = 8765 */
+	ldr	r1, [r1, #0x09]		/* BE:r1 = 9ABx  LE:r1 = xBA9 */
+#ifdef __ARMEB__
+	mov	r2, r2, lsl #24		/* r2 = 0... */
+	orr	r2, r2, r3, lsr #8	/* r2 = 0123 */
+	str	r2, [r0]
+	mov	r3, r3, lsl #24		/* r3 = 4... */
+	orr	r3, r3, ip, lsr #8	/* r3 = 4567 */
+	mov	r1, r1, lsr #8		/* r1 = .9AB */
+	orr	r1, r1, ip, lsl #24	/* r1 = 89AB */
+#else
+	orr	r2, r2, r3, lsl #8	/* r2 = 3210 */
+	str	r2, [r0]
+	mov	r3, r3, lsr #24		/* r3 = ...4 */
+	orr	r3, r3, ip, lsl #8	/* r3 = 7654 */
+	mov	r1, r1, lsl #8		/* r1 = BA9. */
+	orr	r1, r1, ip, lsr #24	/* r1 = BA98 */
+#endif
+	str	r3, [r0, #0x04]
+	str	r1, [r0, #0x08]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 0100: dst is 8-bit aligned (byte 1), src is 32-bit aligned
+ */
+	ldr	r2, [r1]		/* BE:r2 = 0123  LE:r2 = 3210 */
+	ldr	r3, [r1, #0x04]		/* BE:r3 = 4567  LE:r3 = 7654 */
+	ldr	ip, [r1, #0x08]		/* BE:ip = 89AB  LE:ip = BA98 */
+	mov	r1, r2, lsr #8		/* BE:r1 = .012  LE:r1 = .321 */
+	strh	r1, [r0, #0x01]
+#ifdef __ARMEB__
+	mov	r1, r2, lsr #24		/* r1 = ...0 */
+	strb	r1, [r0]
+	mov	r1, r2, lsl #24		/* r1 = 3... */
+	orr	r2, r1, r3, lsr #8	/* r1 = 3456 */
+	mov	r1, r3, lsl #24		/* r1 = 7... */
+	orr	r1, r1, ip, lsr #8	/* r1 = 789A */
+#else
+	strb	r2, [r0]
+	mov	r1, r2, lsr #24		/* r1 = ...3 */
+	orr	r2, r1, r3, lsl #8	/* r1 = 6543 */
+	mov	r1, r3, lsr #24		/* r1 = ...7 */
+	orr	r1, r1, ip, lsl #8	/* r1 = A987 */
+	mov	ip, ip, lsr #24		/* ip = ...B */
+#endif
+	str	r2, [r0, #0x03]
+	str	r1, [r0, #0x07]
+	strb	ip, [r0, #0x0b]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 0101: dst is 8-bit aligned (byte 1), src is 8-bit aligned (byte 1)
+ */
+	ldrb	r2, [r1]
+	ldrh	r3, [r1, #0x01]
+	ldr	ip, [r1, #0x03]
+	strb	r2, [r0]
+	ldr	r2, [r1, #0x07]
+	ldrb	r1, [r1, #0x0b]
+	strh	r3, [r0, #0x01]
+	str	ip, [r0, #0x03]
+	str	r2, [r0, #0x07]
+	strb	r1, [r0, #0x0b]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 0110: dst is 8-bit aligned (byte 1), src is 16-bit aligned
+ */
+	ldrh	r2, [r1]		/* BE:r2 = ..01  LE:r2 = ..10 */
+	ldr	r3, [r1, #0x02]		/* BE:r3 = 2345  LE:r3 = 5432 */
+	ldr	ip, [r1, #0x06]		/* BE:ip = 6789  LE:ip = 9876 */
+	ldrh	r1, [r1, #0x0a]		/* BE:r1 = ..AB  LE:r1 = ..BA */
+#ifdef __ARMEB__
+	mov	r2, r2, ror #8		/* r2 = 1..0 */
+	strb	r2, [r0]
+	mov	r2, r2, lsr #16		/* r2 = ..1. */
+	orr	r2, r2, r3, lsr #24	/* r2 = ..12 */
+	strh	r2, [r0, #0x01]
+	mov	r2, r3, lsl #8		/* r2 = 345. */
+	orr	r3, r2, ip, lsr #24	/* r3 = 3456 */
+	mov	r2, ip, lsl #8		/* r2 = 789. */
+	orr	r2, r2, r1, lsr #8	/* r2 = 789A */
+#else
+	strb	r2, [r0]
+	mov	r2, r2, lsr #8		/* r2 = ...1 */
+	orr	r2, r2, r3, lsl #8	/* r2 = 4321 */
+	strh	r2, [r0, #0x01]
+	mov	r2, r3, lsr #8		/* r2 = .543 */
+	orr	r3, r2, ip, lsl #24	/* r3 = 6543 */
+	mov	r2, ip, lsr #8		/* r2 = .987 */
+	orr	r2, r2, r1, lsl #24	/* r2 = A987 */
+	mov	r1, r1, lsr #8		/* r1 = ...B */
+#endif
+	str	r3, [r0, #0x03]
+	str	r2, [r0, #0x07]
+	strb	r1, [r0, #0x0b]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 0111: dst is 8-bit aligned (byte 1), src is 8-bit aligned (byte 3)
+ */
+	ldrb	r2, [r1]
+	ldr	r3, [r1, #0x01]		/* BE:r3 = 1234  LE:r3 = 4321 */
+	ldr	ip, [r1, #0x05]		/* BE:ip = 5678  LE:ip = 8765 */
+	ldr	r1, [r1, #0x09]		/* BE:r1 = 9ABx  LE:r1 = xBA9 */
+	strb	r2, [r0]
+#ifdef __ARMEB__
+	mov	r2, r3, lsr #16		/* r2 = ..12 */
+	strh	r2, [r0, #0x01]
+	mov	r3, r3, lsl #16		/* r3 = 34.. */
+	orr	r3, r3, ip, lsr #16	/* r3 = 3456 */
+	mov	ip, ip, lsl #16		/* ip = 78.. */
+	orr	ip, ip, r1, lsr #16	/* ip = 789A */
+	mov	r1, r1, lsr #8		/* r1 = .9AB */
+#else
+	strh	r3, [r0, #0x01]
+	mov	r3, r3, lsr #16		/* r3 = ..43 */
+	orr	r3, r3, ip, lsl #16	/* r3 = 6543 */
+	mov	ip, ip, lsr #16		/* ip = ..87 */
+	orr	ip, ip, r1, lsl #16	/* ip = A987 */
+	mov	r1, r1, lsr #16		/* r1 = ..xB */
+#endif
+	str	r3, [r0, #0x03]
+	str	ip, [r0, #0x07]
+	strb	r1, [r0, #0x0b]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 1000: dst is 16-bit aligned, src is 32-bit aligned
+ */
+	ldr	ip, [r1]		/* BE:ip = 0123  LE:ip = 3210 */
+	ldr	r3, [r1, #0x04]		/* BE:r3 = 4567  LE:r3 = 7654 */
+	ldr	r2, [r1, #0x08]		/* BE:r2 = 89AB  LE:r2 = BA98 */
+	mov	r1, ip, lsr #16		/* BE:r1 = ..01  LE:r1 = ..32 */
+#ifdef __ARMEB__
+	strh	r1, [r0]
+	mov	r1, ip, lsl #16		/* r1 = 23.. */
+	orr	r1, r1, r3, lsr #16	/* r1 = 2345 */
+	mov	r3, r3, lsl #16		/* r3 = 67.. */
+	orr	r3, r3, r2, lsr #16	/* r3 = 6789 */
+#else
+	strh	ip, [r0]
+	orr	r1, r1, r3, lsl #16	/* r1 = 5432 */
+	mov	r3, r3, lsr #16		/* r3 = ..76 */
+	orr	r3, r3, r2, lsl #16	/* r3 = 9876 */
+	mov	r2, r2, lsr #16		/* r2 = ..BA */
+#endif
+	str	r1, [r0, #0x02]
+	str	r3, [r0, #0x06]
+	strh	r2, [r0, #0x0a]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 1001: dst is 16-bit aligned, src is 8-bit aligned (byte 1)
+ */
+	ldr	r2, [r1, #-1]		/* BE:r2 = x012  LE:r2 = 210x */
+	ldr	r3, [r1, #0x03]		/* BE:r3 = 3456  LE:r3 = 6543 */
+	mov	ip, r2, lsr #8		/* BE:ip = .x01  LE:ip = .210 */
+	strh	ip, [r0]
+	ldr	ip, [r1, #0x07]		/* BE:ip = 789A  LE:ip = A987 */
+	ldrb	r1, [r1, #0x0b]		/* r1 = ...B */
+#ifdef __ARMEB__
+	mov	r2, r2, lsl #24		/* r2 = 2... */
+	orr	r2, r2, r3, lsr #8	/* r2 = 2345 */
+	mov	r3, r3, lsl #24		/* r3 = 6... */
+	orr	r3, r3, ip, lsr #8	/* r3 = 6789 */
+	orr	r1, r1, ip, lsl #8	/* r1 = 89AB */
+#else
+	mov	r2, r2, lsr #24		/* r2 = ...2 */
+	orr	r2, r2, r3, lsl #8	/* r2 = 5432 */
+	mov	r3, r3, lsr #24		/* r3 = ...6 */
+	orr	r3, r3, ip, lsl #8	/* r3 = 9876 */
+	mov	r1, r1, lsl #8		/* r1 = ..B. */
+	orr	r1, r1, ip, lsr #24	/* r1 = ..BA */
+#endif
+	str	r2, [r0, #0x02]
+	str	r3, [r0, #0x06]
+	strh	r1, [r0, #0x0a]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 1010: dst is 16-bit aligned, src is 16-bit aligned
+ */
+	ldrh	r2, [r1]
+	ldr	r3, [r1, #0x02]
+	ldr	ip, [r1, #0x06]
+	ldrh	r1, [r1, #0x0a]
+	strh	r2, [r0]
+	str	r3, [r0, #0x02]
+	str	ip, [r0, #0x06]
+	strh	r1, [r0, #0x0a]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 1011: dst is 16-bit aligned, src is 8-bit aligned (byte 3)
+ */
+	ldr	r2, [r1, #0x09]		/* BE:r2 = 9ABx  LE:r2 = xBA9 */
+	ldr	r3, [r1, #0x05]		/* BE:r3 = 5678  LE:r3 = 8765 */
+	mov	ip, r2, lsr #8		/* BE:ip = .9AB  LE:ip = .xBA */
+	strh	ip, [r0, #0x0a]
+	ldr	ip, [r1, #0x01]		/* BE:ip = 1234  LE:ip = 4321 */
+	ldrb	r1, [r1]		/* r1 = ...0 */
+#ifdef __ARMEB__
+	mov	r2, r2, lsr #24		/* r2 = ...9 */
+	orr	r2, r2, r3, lsl #8	/* r2 = 6789 */
+	mov	r3, r3, lsr #24		/* r3 = ...5 */
+	orr	r3, r3, ip, lsl #8	/* r3 = 2345 */
+	mov	r1, r1, lsl #8		/* r1 = ..0. */
+	orr	r1, r1, ip, lsr #24	/* r1 = ..01 */
+#else
+	mov	r2, r2, lsl #24		/* r2 = 9... */
+	orr	r2, r2, r3, lsr #8	/* r2 = 9876 */
+	mov	r3, r3, lsl #24		/* r3 = 5... */
+	orr	r3, r3, ip, lsr #8	/* r3 = 5432 */
+	orr	r1, r1, ip, lsl #8	/* r1 = 3210 */
+#endif
+	str	r2, [r0, #0x06]
+	str	r3, [r0, #0x02]
+	strh	r1, [r0]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 1100: dst is 8-bit aligned (byte 3), src is 32-bit aligned
+ */
+	ldr	r2, [r1]		/* BE:r2 = 0123  LE:r2 = 3210 */
+	ldr	ip, [r1, #0x04]		/* BE:ip = 4567  LE:ip = 7654 */
+	ldr	r1, [r1, #0x08]		/* BE:r1 = 89AB  LE:r1 = BA98 */
+#ifdef __ARMEB__
+	mov	r3, r2, lsr #24		/* r3 = ...0 */
+	strb	r3, [r0]
+	mov	r2, r2, lsl #8		/* r2 = 123. */
+	orr	r2, r2, ip, lsr #24	/* r2 = 1234 */
+	str	r2, [r0, #0x01]
+	mov	r2, ip, lsl #8		/* r2 = 567. */
+	orr	r2, r2, r1, lsr #24	/* r2 = 5678 */
+	str	r2, [r0, #0x05]
+	mov	r2, r1, lsr #8		/* r2 = ..9A */
+	strh	r2, [r0, #0x09]
+	strb	r1, [r0, #0x0b]
+#else
+	strb	r2, [r0]
+	mov	r3, r2, lsr #8		/* r3 = .321 */
+	orr	r3, r3, ip, lsl #24	/* r3 = 4321 */
+	str	r3, [r0, #0x01]
+	mov	r3, ip, lsr #8		/* r3 = .765 */
+	orr	r3, r3, r1, lsl #24	/* r3 = 8765 */
+	str	r3, [r0, #0x05]
+	mov	r1, r1, lsr #8		/* r1 = .BA9 */
+	strh	r1, [r0, #0x09]
+	mov	r1, r1, lsr #16		/* r1 = ...B */
+	strb	r1, [r0, #0x0b]
+#endif
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 1101: dst is 8-bit aligned (byte 3), src is 8-bit aligned (byte 1)
+ */
+	ldrb	r2, [r1, #0x0b]		/* r2 = ...B */
+	ldr	r3, [r1, #0x07]		/* BE:r3 = 789A  LE:r3 = A987 */
+	ldr	ip, [r1, #0x03]		/* BE:ip = 3456  LE:ip = 6543 */
+	ldr	r1, [r1, #-1]		/* BE:r1 = x012  LE:r1 = 210x */
+	strb	r2, [r0, #0x0b]
+#ifdef __ARMEB__
+	strh	r3, [r0, #0x09]
+	mov	r3, r3, lsr #16		/* r3 = ..78 */
+	orr	r3, r3, ip, lsl #16	/* r3 = 5678 */
+	mov	ip, ip, lsr #16		/* ip = ..34 */
+	orr	ip, ip, r1, lsl #16	/* ip = 1234 */
+	mov	r1, r1, lsr #16		/* r1 = ..x0 */
+#else
+	mov	r2, r3, lsr #16		/* r2 = ..A9 */
+	strh	r2, [r0, #0x09]
+	mov	r3, r3, lsl #16		/* r3 = 87.. */
+	orr	r3, r3, ip, lsr #16	/* r3 = 8765 */
+	mov	ip, ip, lsl #16		/* ip = 43.. */
+	orr	ip, ip, r1, lsr #16	/* ip = 4321 */
+	mov	r1, r1, lsr #8		/* r1 = .210 */
+#endif
+	str	r3, [r0, #0x05]
+	str	ip, [r0, #0x01]
+	strb	r1, [r0]
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 1110: dst is 8-bit aligned (byte 3), src is 16-bit aligned
+ */
+#ifdef __ARMEB__
+	ldrh	r2, [r1, #0x0a]		/* r2 = ..AB */
+	ldr	ip, [r1, #0x06]		/* ip = 6789 */
+	ldr	r3, [r1, #0x02]		/* r3 = 2345 */
+	ldrh	r1, [r1]		/* r1 = ..01 */
+	strb	r2, [r0, #0x0b]
+	mov	r2, r2, lsr #8		/* r2 = ...A */
+	orr	r2, r2, ip, lsl #8	/* r2 = 789A */
+	mov	ip, ip, lsr #8		/* ip = .678 */
+	orr	ip, ip, r3, lsl #24	/* ip = 5678 */
+	mov	r3, r3, lsr #8		/* r3 = .234 */
+	orr	r3, r3, r1, lsl #24	/* r3 = 1234 */
+	mov	r1, r1, lsr #8		/* r1 = ...0 */
+	strb	r1, [r0]
+	str	r3, [r0, #0x01]
+	str	ip, [r0, #0x05]
+	strh	r2, [r0, #0x09]
+#else
+	ldrh	r2, [r1]		/* r2 = ..10 */
+	ldr	r3, [r1, #0x02]		/* r3 = 5432 */
+	ldr	ip, [r1, #0x06]		/* ip = 9876 */
+	ldrh	r1, [r1, #0x0a]		/* r1 = ..BA */
+	strb	r2, [r0]
+	mov	r2, r2, lsr #8		/* r2 = ...1 */
+	orr	r2, r2, r3, lsl #8	/* r2 = 4321 */
+	mov	r3, r3, lsr #24		/* r3 = ...5 */
+	orr	r3, r3, ip, lsl #8	/* r3 = 8765 */
+	mov	ip, ip, lsr #24		/* ip = ...9 */
+	orr	ip, ip, r1, lsl #8	/* ip = .BA9 */
+	mov	r1, r1, lsr #8		/* r1 = ...B */
+	str	r2, [r0, #0x01]
+	str	r3, [r0, #0x05]
+	strh	ip, [r0, #0x09]
+	strb	r1, [r0, #0x0b]
+#endif
+	mov	pc, lr
+	LMEMCPY_C_PAD
+
+/*
+ * 1111: dst is 8-bit aligned (byte 3), src is 8-bit aligned (byte 3)
+ */
+	ldrb	r2, [r1]
+	ldr	r3, [r1, #0x01]
+	ldr	ip, [r1, #0x05]
+	strb	r2, [r0]
+	ldrh	r2, [r1, #0x09]
+	ldrb	r1, [r1, #0x0b]
+	str	r3, [r0, #0x01]
+	str	ip, [r0, #0x05]
+	strh	r2, [r0, #0x09]
+	strb	r1, [r0, #0x0b]
+	mov	pc, lr
+#endif	/* !_STANDALONE */
diff --git a/lib/libc/arm/string/memmove.S b/lib/libc/arm/string/memmove.S
new file mode 100644
index 000000000000..fff961897f57
--- /dev/null
+++ b/lib/libc/arm/string/memmove.S
@@ -0,0 +1,589 @@
+/*	$NetBSD: memmove.S,v 1.4 2003/10/14 07:51:45 scw Exp $	*/
+
+/*-
+ * Copyright (c) 1997 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Neil A. Carson and Mark Brinicombe
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#ifndef _BCOPY
+/* LINTSTUB: Func: void *memmove(void *, const void *, size_t) */
+ENTRY(memmove)
+#else
+/* bcopy = memcpy/memmove with arguments reversed. */
+/* LINTSTUB: Func: void bcopy(void *, void *, size_t) */
+ENTRY(bcopy)
+	/* switch the source and destination registers */
+	eor     r0, r1, r0 
+	eor     r1, r0, r1 
+	eor     r0, r1, r0 
+#endif
+	/* Do the buffers overlap? */
+	cmp	r0, r1
+	moveq	pc, lr		/* Bail now if src/dst are the same */
+	subcc	r3, r0, r1	/* if (dst > src) r3 = dst - src */
+	subcs	r3, r1, r0	/* if (src > dsr) r3 = src - dst */
+	cmp	r3, r2		/* if (r3 < len) we have an overlap */
+	bcc	PIC_SYM(_C_LABEL(memcpy), PLT)
+
+	/* Determine copy direction */
+	cmp	r1, r0
+	bcc	.Lmemmove_backwards
+
+	moveq	r0, #0			/* Quick abort for len=0 */
+	moveq	pc, lr
+
+	stmdb	sp!, {r0, lr}		/* memmove() returns dest addr */
+	subs	r2, r2, #4
+	blt	.Lmemmove_fl4		/* less than 4 bytes */
+	ands	r12, r0, #3
+	bne	.Lmemmove_fdestul	/* oh unaligned destination addr */
+	ands	r12, r1, #3
+	bne	.Lmemmove_fsrcul		/* oh unaligned source addr */
+
+.Lmemmove_ft8:
+	/* We have aligned source and destination */
+	subs	r2, r2, #8
+	blt	.Lmemmove_fl12		/* less than 12 bytes (4 from above) */
+	subs	r2, r2, #0x14         
+	blt	.Lmemmove_fl32		/* less than 32 bytes (12 from above) */
+	stmdb	sp!, {r4}		/* borrow r4 */
+
+	/* blat 32 bytes at a time */
+	/* XXX for really big copies perhaps we should use more registers */
+.Lmemmove_floop32:	
+	ldmia	r1!, {r3, r4, r12, lr}
+	stmia	r0!, {r3, r4, r12, lr}
+	ldmia	r1!, {r3, r4, r12, lr}
+	stmia	r0!, {r3, r4, r12, lr}
+	subs	r2, r2, #0x20         
+	bge	.Lmemmove_floop32
+
+	cmn	r2, #0x10
+	ldmgeia	r1!, {r3, r4, r12, lr}	/* blat a remaining 16 bytes */
+	stmgeia	r0!, {r3, r4, r12, lr}
+	subge	r2, r2, #0x10         
+	ldmia	sp!, {r4}		/* return r4 */
+
+.Lmemmove_fl32:
+	adds	r2, r2, #0x14         
+
+	/* blat 12 bytes at a time */
+.Lmemmove_floop12:
+	ldmgeia	r1!, {r3, r12, lr}
+	stmgeia	r0!, {r3, r12, lr}
+	subges	r2, r2, #0x0c         
+	bge	.Lmemmove_floop12
+
+.Lmemmove_fl12:
+	adds	r2, r2, #8
+	blt	.Lmemmove_fl4
+
+	subs	r2, r2, #4
+	ldrlt	r3, [r1], #4
+	strlt	r3, [r0], #4
+	ldmgeia	r1!, {r3, r12}
+	stmgeia	r0!, {r3, r12}
+	subge	r2, r2, #4
+
+.Lmemmove_fl4:
+	/* less than 4 bytes to go */
+	adds	r2, r2, #4
+	ldmeqia	sp!, {r0, pc}		/* done */
+
+	/* copy the crud byte at a time */
+	cmp	r2, #2
+	ldrb	r3, [r1], #1
+	strb	r3, [r0], #1
+	ldrgeb	r3, [r1], #1
+	strgeb	r3, [r0], #1
+	ldrgtb	r3, [r1], #1
+	strgtb	r3, [r0], #1
+	ldmia	sp!, {r0, pc}
+
+	/* erg - unaligned destination */
+.Lmemmove_fdestul:
+	rsb	r12, r12, #4
+	cmp	r12, #2
+
+	/* align destination with byte copies */
+	ldrb	r3, [r1], #1
+	strb	r3, [r0], #1
+	ldrgeb	r3, [r1], #1
+	strgeb	r3, [r0], #1
+	ldrgtb	r3, [r1], #1
+	strgtb	r3, [r0], #1
+	subs	r2, r2, r12
+	blt	.Lmemmove_fl4		/* less the 4 bytes */
+
+	ands	r12, r1, #3
+	beq	.Lmemmove_ft8		/* we have an aligned source */
+
+	/* erg - unaligned source */
+	/* This is where it gets nasty ... */
+.Lmemmove_fsrcul:
+	bic	r1, r1, #3
+	ldr	lr, [r1], #4
+	cmp	r12, #2
+	bgt	.Lmemmove_fsrcul3
+	beq	.Lmemmove_fsrcul2
+	cmp	r2, #0x0c            
+	blt	.Lmemmove_fsrcul1loop4
+	sub	r2, r2, #0x0c         
+	stmdb	sp!, {r4, r5}
+
+.Lmemmove_fsrcul1loop16:
+#ifdef __ARMEB__
+	mov	r3, lr, lsl #8
+#else
+	mov	r3, lr, lsr #8
+#endif
+	ldmia	r1!, {r4, r5, r12, lr}
+#ifdef __ARMEB__
+	orr	r3, r3, r4, lsr #24
+	mov	r4, r4, lsl #8
+	orr	r4, r4, r5, lsr #24
+	mov	r5, r5, lsl #8
+	orr	r5, r5, r12, lsr #24
+	mov	r12, r12, lsl #8
+	orr	r12, r12, lr, lsr #24
+#else
+	orr	r3, r3, r4, lsl #24
+	mov	r4, r4, lsr #8
+	orr	r4, r4, r5, lsl #24
+	mov	r5, r5, lsr #8
+	orr	r5, r5, r12, lsl #24
+	mov	r12, r12, lsr #8
+	orr	r12, r12, lr, lsl #24
+#endif
+	stmia	r0!, {r3-r5, r12}
+	subs	r2, r2, #0x10         
+	bge	.Lmemmove_fsrcul1loop16
+	ldmia	sp!, {r4, r5}
+	adds	r2, r2, #0x0c         
+	blt	.Lmemmove_fsrcul1l4
+
+.Lmemmove_fsrcul1loop4:
+#ifdef __ARMEB__
+	mov	r12, lr, lsl #8
+#else
+	mov	r12, lr, lsr #8
+#endif
+	ldr	lr, [r1], #4
+#ifdef __ARMEB__
+	orr	r12, r12, lr, lsr #24
+#else
+	orr	r12, r12, lr, lsl #24
+#endif
+	str	r12, [r0], #4
+	subs	r2, r2, #4
+	bge	.Lmemmove_fsrcul1loop4
+
+.Lmemmove_fsrcul1l4:
+	sub	r1, r1, #3
+	b	.Lmemmove_fl4
+
+.Lmemmove_fsrcul2:
+	cmp	r2, #0x0c            
+	blt	.Lmemmove_fsrcul2loop4
+	sub	r2, r2, #0x0c         
+	stmdb	sp!, {r4, r5}
+
+.Lmemmove_fsrcul2loop16:
+#ifdef __ARMEB__
+	mov	r3, lr, lsl #16
+#else
+	mov	r3, lr, lsr #16
+#endif
+	ldmia	r1!, {r4, r5, r12, lr}
+#ifdef __ARMEB__
+	orr	r3, r3, r4, lsr #16
+	mov	r4, r4, lsl #16
+	orr	r4, r4, r5, lsr #16
+	mov	r5, r5, lsl #16
+	orr	r5, r5, r12, lsr #16
+	mov	r12, r12, lsl #16
+	orr	r12, r12, lr, lsr #16
+#else
+	orr	r3, r3, r4, lsl #16
+	mov	r4, r4, lsr #16
+	orr	r4, r4, r5, lsl #16
+	mov	r5, r5, lsr #16
+	orr	r5, r5, r12, lsl #16
+	mov	r12, r12, lsr #16
+	orr	r12, r12, lr, lsl #16
+#endif
+	stmia	r0!, {r3-r5, r12}
+	subs	r2, r2, #0x10         
+	bge	.Lmemmove_fsrcul2loop16
+	ldmia	sp!, {r4, r5}
+	adds	r2, r2, #0x0c         
+	blt	.Lmemmove_fsrcul2l4
+
+.Lmemmove_fsrcul2loop4:
+#ifdef __ARMEB__
+	mov	r12, lr, lsl #16
+#else
+	mov	r12, lr, lsr #16
+#endif
+	ldr	lr, [r1], #4
+#ifdef __ARMEB__
+	orr	r12, r12, lr, lsr #16
+#else
+	orr	r12, r12, lr, lsl #16
+#endif
+	str	r12, [r0], #4
+	subs	r2, r2, #4
+	bge	.Lmemmove_fsrcul2loop4
+
+.Lmemmove_fsrcul2l4:
+	sub	r1, r1, #2
+	b	.Lmemmove_fl4
+
+.Lmemmove_fsrcul3:
+	cmp	r2, #0x0c            
+	blt	.Lmemmove_fsrcul3loop4
+	sub	r2, r2, #0x0c         
+	stmdb	sp!, {r4, r5}
+
+.Lmemmove_fsrcul3loop16:
+#ifdef __ARMEB__
+	mov	r3, lr, lsl #24
+#else
+	mov	r3, lr, lsr #24
+#endif
+	ldmia	r1!, {r4, r5, r12, lr}
+#ifdef __ARMEB__
+	orr	r3, r3, r4, lsr #8
+	mov	r4, r4, lsl #24
+	orr	r4, r4, r5, lsr #8
+	mov	r5, r5, lsl #24
+	orr	r5, r5, r12, lsr #8
+	mov	r12, r12, lsl #24
+	orr	r12, r12, lr, lsr #8
+#else
+	orr	r3, r3, r4, lsl #8
+	mov	r4, r4, lsr #24
+	orr	r4, r4, r5, lsl #8
+	mov	r5, r5, lsr #24
+	orr	r5, r5, r12, lsl #8
+	mov	r12, r12, lsr #24
+	orr	r12, r12, lr, lsl #8
+#endif
+	stmia	r0!, {r3-r5, r12}
+	subs	r2, r2, #0x10         
+	bge	.Lmemmove_fsrcul3loop16
+	ldmia	sp!, {r4, r5}
+	adds	r2, r2, #0x0c         
+	blt	.Lmemmove_fsrcul3l4
+
+.Lmemmove_fsrcul3loop4:
+#ifdef __ARMEB__
+	mov	r12, lr, lsl #24
+#else
+	mov	r12, lr, lsr #24
+#endif
+	ldr	lr, [r1], #4
+#ifdef __ARMEB__
+	orr	r12, r12, lr, lsr #8
+#else
+	orr	r12, r12, lr, lsl #8
+#endif
+	str	r12, [r0], #4
+	subs	r2, r2, #4
+	bge	.Lmemmove_fsrcul3loop4
+
+.Lmemmove_fsrcul3l4:
+	sub	r1, r1, #1
+	b	.Lmemmove_fl4
+
+.Lmemmove_backwards:
+	add	r1, r1, r2
+	add	r0, r0, r2
+	subs	r2, r2, #4
+	blt	.Lmemmove_bl4		/* less than 4 bytes */
+	ands	r12, r0, #3
+	bne	.Lmemmove_bdestul	/* oh unaligned destination addr */
+	ands	r12, r1, #3
+	bne	.Lmemmove_bsrcul		/* oh unaligned source addr */
+
+.Lmemmove_bt8:
+	/* We have aligned source and destination */
+	subs	r2, r2, #8
+	blt	.Lmemmove_bl12		/* less than 12 bytes (4 from above) */
+	stmdb	sp!, {r4, lr}
+	subs	r2, r2, #0x14		/* less than 32 bytes (12 from above) */
+	blt	.Lmemmove_bl32
+
+	/* blat 32 bytes at a time */
+	/* XXX for really big copies perhaps we should use more registers */
+.Lmemmove_bloop32:
+	ldmdb	r1!, {r3, r4, r12, lr}
+	stmdb	r0!, {r3, r4, r12, lr}
+	ldmdb	r1!, {r3, r4, r12, lr}
+	stmdb	r0!, {r3, r4, r12, lr}
+	subs	r2, r2, #0x20         
+	bge	.Lmemmove_bloop32
+
+.Lmemmove_bl32:
+	cmn	r2, #0x10            
+	ldmgedb	r1!, {r3, r4, r12, lr}	/* blat a remaining 16 bytes */
+	stmgedb	r0!, {r3, r4, r12, lr}
+	subge	r2, r2, #0x10         
+	adds	r2, r2, #0x14         
+	ldmgedb	r1!, {r3, r12, lr}	/* blat a remaining 12 bytes */
+	stmgedb	r0!, {r3, r12, lr}
+	subge	r2, r2, #0x0c         
+	ldmia	sp!, {r4, lr}
+
+.Lmemmove_bl12:
+	adds	r2, r2, #8
+	blt	.Lmemmove_bl4
+	subs	r2, r2, #4
+	ldrlt	r3, [r1, #-4]!
+	strlt	r3, [r0, #-4]!
+	ldmgedb	r1!, {r3, r12}
+	stmgedb	r0!, {r3, r12}
+	subge	r2, r2, #4
+
+.Lmemmove_bl4:
+	/* less than 4 bytes to go */
+	adds	r2, r2, #4
+	moveq	pc, lr			/* done */
+
+	/* copy the crud byte at a time */
+	cmp	r2, #2
+	ldrb	r3, [r1, #-1]!
+	strb	r3, [r0, #-1]!
+	ldrgeb	r3, [r1, #-1]!
+	strgeb	r3, [r0, #-1]!
+	ldrgtb	r3, [r1, #-1]!
+	strgtb	r3, [r0, #-1]!
+	mov	pc, lr
+
+	/* erg - unaligned destination */
+.Lmemmove_bdestul:
+	cmp	r12, #2
+
+	/* align destination with byte copies */
+	ldrb	r3, [r1, #-1]!
+	strb	r3, [r0, #-1]!
+	ldrgeb	r3, [r1, #-1]!
+	strgeb	r3, [r0, #-1]!
+	ldrgtb	r3, [r1, #-1]!
+	strgtb	r3, [r0, #-1]!
+	subs	r2, r2, r12
+	blt	.Lmemmove_bl4		/* less than 4 bytes to go */
+	ands	r12, r1, #3
+	beq	.Lmemmove_bt8		/* we have an aligned source */
+
+	/* erg - unaligned source */
+	/* This is where it gets nasty ... */
+.Lmemmove_bsrcul:
+	bic	r1, r1, #3
+	ldr	r3, [r1, #0]
+	cmp	r12, #2
+	blt	.Lmemmove_bsrcul1
+	beq	.Lmemmove_bsrcul2
+	cmp	r2, #0x0c            
+	blt	.Lmemmove_bsrcul3loop4
+	sub	r2, r2, #0x0c         
+	stmdb	sp!, {r4, r5, lr}
+
+.Lmemmove_bsrcul3loop16:
+#ifdef __ARMEB__
+	mov	lr, r3, lsr #8
+#else
+	mov	lr, r3, lsl #8
+#endif
+	ldmdb	r1!, {r3-r5, r12}
+#ifdef __ARMEB__
+	orr	lr, lr, r12, lsl #24
+	mov	r12, r12, lsr #8
+	orr	r12, r12, r5, lsl #24
+	mov	r5, r5, lsr #8
+	orr	r5, r5, r4, lsl #24
+	mov	r4, r4, lsr #8
+	orr	r4, r4, r3, lsl #24
+#else
+	orr	lr, lr, r12, lsr #24
+	mov	r12, r12, lsl #8
+	orr	r12, r12, r5, lsr #24
+	mov	r5, r5, lsl #8
+	orr	r5, r5, r4, lsr #24
+	mov	r4, r4, lsl #8
+	orr	r4, r4, r3, lsr #24
+#endif
+	stmdb	r0!, {r4, r5, r12, lr}
+	subs	r2, r2, #0x10         
+	bge	.Lmemmove_bsrcul3loop16
+	ldmia	sp!, {r4, r5, lr}
+	adds	r2, r2, #0x0c         
+	blt	.Lmemmove_bsrcul3l4
+
+.Lmemmove_bsrcul3loop4:
+#ifdef __ARMEB__
+	mov	r12, r3, lsr #8
+#else
+	mov	r12, r3, lsl #8
+#endif
+	ldr	r3, [r1, #-4]!
+#ifdef __ARMEB__
+	orr	r12, r12, r3, lsl #24
+#else
+	orr	r12, r12, r3, lsr #24
+#endif
+	str	r12, [r0, #-4]!
+	subs	r2, r2, #4
+	bge	.Lmemmove_bsrcul3loop4
+
+.Lmemmove_bsrcul3l4:
+	add	r1, r1, #3
+	b	.Lmemmove_bl4
+
+.Lmemmove_bsrcul2:
+	cmp	r2, #0x0c            
+	blt	.Lmemmove_bsrcul2loop4
+	sub	r2, r2, #0x0c         
+	stmdb	sp!, {r4, r5, lr}
+
+.Lmemmove_bsrcul2loop16:
+#ifdef __ARMEB__
+	mov	lr, r3, lsr #16
+#else
+	mov	lr, r3, lsl #16
+#endif
+	ldmdb	r1!, {r3-r5, r12}
+#ifdef __ARMEB__
+	orr	lr, lr, r12, lsl #16
+	mov	r12, r12, lsr #16
+	orr	r12, r12, r5, lsl #16
+	mov	r5, r5, lsr #16
+	orr	r5, r5, r4, lsl #16
+	mov	r4, r4, lsr #16
+	orr	r4, r4, r3, lsl #16
+#else
+	orr	lr, lr, r12, lsr #16
+	mov	r12, r12, lsl #16
+	orr	r12, r12, r5, lsr #16
+	mov	r5, r5, lsl #16
+	orr	r5, r5, r4, lsr #16
+	mov	r4, r4, lsl #16
+	orr	r4, r4, r3, lsr #16
+#endif
+	stmdb	r0!, {r4, r5, r12, lr}
+	subs	r2, r2, #0x10         
+	bge	.Lmemmove_bsrcul2loop16
+	ldmia	sp!, {r4, r5, lr}
+	adds	r2, r2, #0x0c         
+	blt	.Lmemmove_bsrcul2l4
+
+.Lmemmove_bsrcul2loop4:
+#ifdef __ARMEB__
+	mov	r12, r3, lsr #16
+#else
+	mov	r12, r3, lsl #16
+#endif
+	ldr	r3, [r1, #-4]!
+#ifdef __ARMEB__
+	orr	r12, r12, r3, lsl #16
+#else
+	orr	r12, r12, r3, lsr #16
+#endif
+	str	r12, [r0, #-4]!
+	subs	r2, r2, #4
+	bge	.Lmemmove_bsrcul2loop4
+
+.Lmemmove_bsrcul2l4:
+	add	r1, r1, #2
+	b	.Lmemmove_bl4
+
+.Lmemmove_bsrcul1:
+	cmp	r2, #0x0c            
+	blt	.Lmemmove_bsrcul1loop4
+	sub	r2, r2, #0x0c         
+	stmdb	sp!, {r4, r5, lr}
+
+.Lmemmove_bsrcul1loop32:
+#ifdef __ARMEB__
+	mov	lr, r3, lsr #24
+#else
+	mov	lr, r3, lsl #24
+#endif
+	ldmdb	r1!, {r3-r5, r12}
+#ifdef __ARMEB__
+	orr	lr, lr, r12, lsl #8
+	mov	r12, r12, lsr #24
+	orr	r12, r12, r5, lsl #8
+	mov	r5, r5, lsr #24
+	orr	r5, r5, r4, lsl #8
+	mov	r4, r4, lsr #24
+	orr	r4, r4, r3, lsl #8
+#else
+	orr	lr, lr, r12, lsr #8
+	mov	r12, r12, lsl #24
+	orr	r12, r12, r5, lsr #8
+	mov	r5, r5, lsl #24
+	orr	r5, r5, r4, lsr #8
+	mov	r4, r4, lsl #24
+	orr	r4, r4, r3, lsr #8
+#endif
+	stmdb	r0!, {r4, r5, r12, lr}
+	subs	r2, r2, #0x10         
+	bge	.Lmemmove_bsrcul1loop32
+	ldmia	sp!, {r4, r5, lr}
+	adds	r2, r2, #0x0c         
+	blt	.Lmemmove_bsrcul1l4
+
+.Lmemmove_bsrcul1loop4:
+#ifdef __ARMEB__
+	mov	r12, r3, lsr #24
+#else
+	mov	r12, r3, lsl #24
+#endif
+	ldr	r3, [r1, #-4]!
+#ifdef __ARMEB__
+	orr	r12, r12, r3, lsl #8
+#else
+	orr	r12, r12, r3, lsr #8
+#endif
+	str	r12, [r0, #-4]!
+	subs	r2, r2, #4
+	bge	.Lmemmove_bsrcul1loop4
+
+.Lmemmove_bsrcul1l4:
+	add	r1, r1, #1
+	b	.Lmemmove_bl4
diff --git a/lib/libc/arm/string/memset.S b/lib/libc/arm/string/memset.S
new file mode 100644
index 000000000000..fbe85816f343
--- /dev/null
+++ b/lib/libc/arm/string/memset.S
@@ -0,0 +1,236 @@
+/*	$NetBSD: memset.S,v 1.4 2003/10/14 07:51:45 scw Exp $	*/
+
+/*
+ * Copyright 2003 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Steve C. Woodford for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed for the NetBSD Project by
+ *      Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *    or promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 1995 Mark Brinicombe.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * memset: Sets a block of memory to the specified value
+ *
+ * On entry:
+ *   r0 - dest address
+ *   r1 - byte to write
+ *   r2 - number of bytes to write
+ *
+ * On exit:
+ *   r0 - dest address
+ */
+#ifdef _BZERO
+/* LINTSTUB: Func: void bzero(void *, size_t) */
+ENTRY(bzero)
+	mov	r3, #0x00
+#else
+/* LINTSTUB: Func: void *memset(void *, int, size_t) */
+ENTRY(memset)
+	and	r3, r1, #0xff		/* We deal with bytes */
+	mov	r1, r2
+#endif
+	cmp	r1, #0x04		/* Do we have less than 4 bytes */
+	mov	ip, r0
+	blt	.Lmemset_lessthanfour
+
+	/* Ok first we will word align the address */
+	ands	r2, ip, #0x03		/* Get the bottom two bits */
+	bne	.Lmemset_wordunaligned	/* The address is not word aligned */
+
+	/* We are now word aligned */
+.Lmemset_wordaligned:
+#ifndef _BZERO
+	orr	r3, r3, r3, lsl #8	/* Extend value to 16-bits */
+#endif
+#ifdef __XSCALE__
+	tst	ip, #0x04		/* Quad-align for Xscale */
+#else
+	cmp	r1, #0x10
+#endif
+#ifndef _BZERO
+	orr	r3, r3, r3, lsl #16	/* Extend value to 32-bits */
+#endif
+#ifdef __XSCALE__
+	subne	r1, r1, #0x04		/* Quad-align if necessary */
+	strne	r3, [ip], #0x04
+	cmp	r1, #0x10
+#endif
+	blt	.Lmemset_loop4		/* If less than 16 then use words */
+	mov	r2, r3			/* Duplicate data */
+	cmp	r1, #0x80		/* If < 128 then skip the big loop */
+	blt	.Lmemset_loop32
+
+	/* Do 128 bytes at a time */
+.Lmemset_loop128:
+	subs	r1, r1, #0x80
+#ifdef __XSCALE__
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+#else
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+#endif
+	bgt	.Lmemset_loop128
+	moveq	pc, lr			/* Zero length so just exit */
+
+	add	r1, r1, #0x80		/* Adjust for extra sub */
+
+	/* Do 32 bytes at a time */
+.Lmemset_loop32:
+	subs	r1, r1, #0x20
+#ifdef __XSCALE__
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+#else
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+#endif
+	bgt	.Lmemset_loop32
+	moveq	pc, lr			/* Zero length so just exit */
+
+	adds	r1, r1, #0x10		/* Partially adjust for extra sub */
+
+	/* Deal with 16 bytes or more */
+#ifdef __XSCALE__
+	strged	r2, [ip], #0x08
+	strged	r2, [ip], #0x08
+#else
+	stmgeia	ip!, {r2-r3}
+	stmgeia	ip!, {r2-r3}
+#endif
+	moveq	pc, lr			/* Zero length so just exit */
+
+	addlt	r1, r1, #0x10		/* Possibly adjust for extra sub */
+
+	/* We have at least 4 bytes so copy as words */
+.Lmemset_loop4:
+	subs	r1, r1, #0x04
+	strge	r3, [ip], #0x04
+	bgt	.Lmemset_loop4
+	moveq	pc, lr			/* Zero length so just exit */
+
+#ifdef __XSCALE__
+	/* Compensate for 64-bit alignment check */
+	adds	r1, r1, #0x04
+	moveq	pc, lr
+	cmp	r1, #2
+#else
+	cmp	r1, #-2
+#endif
+
+	strb	r3, [ip], #0x01		/* Set 1 byte */
+	strgeb	r3, [ip], #0x01		/* Set another byte */
+	strgtb	r3, [ip]		/* and a third */
+	mov	pc, lr			/* Exit */
+
+.Lmemset_wordunaligned:
+	rsb	r2, r2, #0x004
+	strb	r3, [ip], #0x01		/* Set 1 byte */
+	cmp	r2, #0x02
+	strgeb	r3, [ip], #0x01		/* Set another byte */
+	sub	r1, r1, r2
+	strgtb	r3, [ip], #0x01		/* and a third */
+	cmp	r1, #0x04		/* More than 4 bytes left? */
+	bge	.Lmemset_wordaligned	/* Yup */
+
+.Lmemset_lessthanfour:
+	cmp	r1, #0x00
+	moveq	pc, lr			/* Zero length so exit */
+	strb	r3, [ip], #0x01		/* Set 1 byte */
+	cmp	r1, #0x02
+	strgeb	r3, [ip], #0x01		/* Set another byte */
+	strgtb	r3, [ip]		/* and a third */
+	mov	pc, lr			/* Exit */
diff --git a/lib/libc/arm/string/strcmp.S b/lib/libc/arm/string/strcmp.S
new file mode 100644
index 000000000000..3debd7558f4a
--- /dev/null
+++ b/lib/libc/arm/string/strcmp.S
@@ -0,0 +1,43 @@
+/*      $NetBSD: strcmp.S,v 1.3 2003/04/05 23:08:52 bjh21 Exp $ */
+
+/*
+ * Copyright (c) 2002 ARM Ltd
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+
+__FBSDID("$FreeBSD$");
+
+ENTRY(strcmp)
+1:
+	ldrb	r2, [r0], #1
+	ldrb	r3, [r1], #1
+	cmp	r2, #1
+	cmpcs	r2, r3
+	beq	1b
+	sub	r0, r2, r3
+	mov	pc, lr
diff --git a/lib/libc/arm/string/strncmp.S b/lib/libc/arm/string/strncmp.S
new file mode 100644
index 000000000000..33396f643b2f
--- /dev/null
+++ b/lib/libc/arm/string/strncmp.S
@@ -0,0 +1,51 @@
+/*      $NetBSD: strncmp.S,v 1.2 2003/04/05 23:08:52 bjh21 Exp $ */
+
+/*
+ * Copyright (c) 2002 ARM Ltd
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+
+__FBSDID("$FreeBSD$");
+
+ENTRY(strncmp)
+/* if ((len - 1) < 0) return 0 */
+	subs	r2, r2, #1
+	movmi	r0, #0
+	movmi	pc, lr
+
+/* ip == last src address to compare */
+	add	ip, r0, r2
+1:
+	ldrb	r2, [r0], #1
+	ldrb	r3, [r1], #1
+	cmp	ip, r0
+	cmpcs	r2, #1
+	cmpcs	r2, r3
+	beq	1b
+	sub	r0, r2, r3
+	mov	pc, lr
diff --git a/lib/libc/arm/sys/Makefile.inc b/lib/libc/arm/sys/Makefile.inc
new file mode 100644
index 000000000000..e7b9669de06b
--- /dev/null
+++ b/lib/libc/arm/sys/Makefile.inc
@@ -0,0 +1,9 @@
+# $FreeBSD$
+
+MDASM= Ovfork.S brk.S cerror.S getcontext.S pipe.S ptrace.S sbrk.S shmat.S sigreturn.S syscall.S
+
+# Don't generate default code for these syscalls:
+NOASM=	break.o exit.o ftruncate.o getdomainname.o getlogin.o \
+	lseek.o mmap.o openbsd_poll.o pread.o \
+	pwrite.o setdomainname.o sstk.o truncate.o uname.o vfork.o yield.o
+PSEUDO= _exit.o _getlogin.o
diff --git a/lib/libc/arm/sys/Ovfork.S b/lib/libc/arm/sys/Ovfork.S
new file mode 100644
index 000000000000..0082bbc5217b
--- /dev/null
+++ b/lib/libc/arm/sys/Ovfork.S
@@ -0,0 +1,57 @@
+/*	$NetBSD: Ovfork.S,v 1.6 2003/08/07 16:42:03 agc Exp $	*/
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)Ovfork.s	5.1 (Berkeley) 4/23/90
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+WARN_REFERENCES(vfork, \
+    "warning: reference to compatibility vfork(); include <unistd.h> for correct reference")
+
+/*
+ * pid = vfork();
+ *
+ * On return from the SWI:
+ * r1 == 0 in parent process, r1 == 1 in child process.
+ * r0 == pid of child in parent, r0 == pid of parent in child.
+ */
+	.text
+	.align	0
+
+ENTRY(vfork)
+	mov	r2, r14
+	SYSTRAP(vfork)
+	bcs	PIC_SYM(CERROR, PLT)
+	sub	r1, r1, #1	/* r1 == 0xffffffff if parent, 0 if child */
+	and	r0, r0, r1	/* r0 == 0 if child, else unchanged */
+	mov	r15, r2
diff --git a/lib/libc/arm/sys/brk.S b/lib/libc/arm/sys/brk.S
new file mode 100644
index 000000000000..8112e91d93d9
--- /dev/null
+++ b/lib/libc/arm/sys/brk.S
@@ -0,0 +1,100 @@
+/*	$NetBSD: brk.S,v 1.6 2003/08/07 16:42:04 agc Exp $	*/
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)brk.s	5.2 (Berkeley) 12/17/90
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+	.globl	_C_LABEL(end)
+	.globl	CURBRK
+
+#ifdef WEAK_ALIAS
+WEAK_ALIAS(brk, _brk)
+#endif
+
+	.data
+	.align	0
+	.globl	_C_LABEL(minbrk)
+	.type	_C_LABEL(minbrk),#object
+_C_LABEL(minbrk):
+	.word	_C_LABEL(end)
+
+/*
+ * Change the data segment size
+ */
+ENTRY(_brk)
+#ifdef PIC
+	/* Setup the GOT */
+	ldr	r3, .Lgot
+	add	r3, pc, r3
+.L1:
+	ldr	r1, .Lminbrk
+	ldr	r1, [r3, r1]
+#else
+	ldr	r1, .Lminbrk
+#endif
+	/* Get the minimum allowable brk address */
+	ldr	r1, [r1]
+
+	/*
+	 * Valid the address specified and set to the minimum
+	 * if the address is below minbrk.
+	 */
+	cmp	r0, r1
+	movlt	r0, r1
+	mov	r2, r0
+	SYSTRAP(break)
+	bcs	PIC_SYM(CERROR, PLT)
+
+#ifdef PIC
+	ldr	r1, .Lcurbrk
+	ldr	r1, [r3, r1]
+#else
+	ldr	r1, .Lcurbrk
+#endif
+	/* Store the new address in curbrk */
+	str	r2, [r1]
+
+	/* Return 0 for success */
+	mov	r0, #0x00000000
+	mov	r15, r14
+
+	.align	2
+#ifdef PIC
+.Lgot:
+	.word	_GLOBAL_OFFSET_TABLE_ - (.L1+4)
+#endif
+.Lminbrk:
+	.word	PIC_SYM(_C_LABEL(minbrk), GOT)
+.Lcurbrk:
+	.word	PIC_SYM(CURBRK, GOT)
diff --git a/lib/libc/arm/sys/cerror.S b/lib/libc/arm/sys/cerror.S
new file mode 100644
index 000000000000..b0f04a63f305
--- /dev/null
+++ b/lib/libc/arm/sys/cerror.S
@@ -0,0 +1,76 @@
+/*	$NetBSD: cerror.S,v 1.5 2003/08/07 16:42:04 agc Exp $	*/
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)cerror.s	5.1 (Berkeley) 4/23/90
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+.globl  _C_LABEL(__error)
+.type   _C_LABEL(__error),%function
+		
+ASENTRY(CERROR)
+#if 1
+	stmfd	sp!, {r4, lr}
+	mov	r4, r0
+	bl	PIC_SYM(_C_LABEL(__error), PLT)
+	str	r4, [r0]
+	mvn	r0, #0x00000000
+	mvn	r1, #0x00000000
+	ldmfd	sp!, {r4, pc}
+#else
+#ifdef PIC
+	/* Setup the GOT */
+	ldr	r3, .Lgot
+	add	r3, pc, r3
+.L1:
+	ldr	r1, .Lerrno
+	ldr	r1, [r3, r1]
+#else
+	ldr	r1, .Lerrno
+#endif /* PIC */
+	str	r0, [r1]
+	mvn	r0, #0x00000000
+	mvn	r1, #0x00000000
+	mov	pc, lr
+
+#if 0
+	.align	0
+.Lgot:
+	.word	_C_LABEL(_GLOBAL_OFFSET_TABLE_) + (. - (.L1+4))
+#endif /* PIC */
+
+	.globl	_C_LABEL(errno)
+
+.Lerrno:
+	.word	PIC_SYM(_C_LABEL(errno), GOT)
+#endif /* _REENTRANT */
diff --git a/lib/libc/arm/sys/fork.S b/lib/libc/arm/sys/fork.S
new file mode 100644
index 000000000000..fb07c8787d55
--- /dev/null
+++ b/lib/libc/arm/sys/fork.S
@@ -0,0 +1,49 @@
+/*	$NetBSD: fork.S,v 1.5 2003/08/07 16:42:04 agc Exp $	*/
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)fork.s	5.1 (Berkeley) 4/23/90
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+/*
+ * pid = fork();
+ *
+ * On return from the SWI:
+ * r1 == 0 in parent process, r1 == 1 in child process.
+ * r0 == pid of child in parent, r0 == pid of parent in child.
+ */
+
+_SYSCALL(fork)
+	sub	r1, r1, #1	/* r1 == 0xffffffff if parent, 0 if child */
+	and	r0, r0, r1	/* r0 == 0 if child, else unchanged */
+	mov	r15, r14
diff --git a/lib/libc/arm/sys/getcontext.S b/lib/libc/arm/sys/getcontext.S
new file mode 100644
index 000000000000..e9052596d739
--- /dev/null
+++ b/lib/libc/arm/sys/getcontext.S
@@ -0,0 +1,63 @@
+/*	$NetBSD: getcontext.S,v 1.3 2003/04/05 23:08:52 bjh21 Exp $	*/
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Klaus Klein.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+#if defined(SYSLIBC_SCCS) && !defined(lint)
+	RCSID("$NetBSD: getcontext.S,v 1.3 2003/04/05 23:08:52 bjh21 Exp $")
+#endif /* SYSLIBC_SCCS && !lint */
+
+#ifdef WEAK_ALIAS
+WEAK_ALIAS(getcontext, _getcontext)
+#endif
+
+ENTRY(_getcontext)
+	mov	r2, r0			/* Must save argument pointer. */
+	swi	SYS_getcontext
+	bcs	PIC_SYM(CERROR, PLT)
+	str	lr, [r2, #(36 + 15*4)]	/* Adjust PC. */
+#ifdef SOFTFLOAT
+	/* Ahem. */
+	/* Judging from the softfloat code we should at least save
+	   the exception codes and rounding mode here. */
+#endif
+	mov	r0, #0
+	str	r0, [r2, #(36 + 0*4)]	/* Return 0. */
+	mov	pc, lr
diff --git a/lib/libc/arm/sys/pipe.S b/lib/libc/arm/sys/pipe.S
new file mode 100644
index 000000000000..59ddd8815c22
--- /dev/null
+++ b/lib/libc/arm/sys/pipe.S
@@ -0,0 +1,49 @@
+/*	$NetBSD: pipe.S,v 1.5 2003/08/07 16:42:04 agc Exp $	*/
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)pipe.s	5.1 (Berkeley) 4/23/90
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+#ifdef WEAK_ALIAS
+WEAK_ALIAS(pipe, _pipe)
+#endif
+
+ENTRY(_pipe)
+	mov	r2, r0
+	SYSTRAP(pipe)
+	bcs	PIC_SYM(CERROR, PLT)
+	str	r0, [r2, #0x0000]
+	str	r1, [r2, #0x0004]
+	mov	r0, #0x00000000
+	mov	r15, r14
diff --git a/lib/libc/arm/sys/ptrace.S b/lib/libc/arm/sys/ptrace.S
new file mode 100644
index 000000000000..0aa11221dd42
--- /dev/null
+++ b/lib/libc/arm/sys/ptrace.S
@@ -0,0 +1,77 @@
+/*	$NetBSD: ptrace.S,v 1.7 2003/08/07 16:42:04 agc Exp $ */
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)ptrace.s	5.1 (Berkeley) 4/23/90
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+ENTRY(ptrace)
+#ifdef _REENTRANT
+	stmfd	sp!, {r0-r3, lr}
+	sub	sp, sp, #4	/* align stack */
+	bl	PIC_SYM(_C_LABEL(__errno), PLT)
+	add	sp, sp, #4	/* unalign stack */
+	mov	r1, #0x00000000
+	str	r1, [r0]
+	ldmfd	sp!, {r0-r3, lr}
+#else
+	stmfd	sp!, {r0, r1}
+#ifdef PIC
+	/* Setup the GOT */
+	ldr	r0, .Lgot
+	add	r0, pc, r0
+.L1:
+	ldr	r1, .Lerrno
+	ldr	r1, [r0, r1]
+#else
+	ldr	r1, .Lerrno
+#endif /* PIC */
+	mov	r0, #0x00000000
+	str	r0, [r1]
+	ldmfd	sp!, {r0, r1}
+#endif /* _REENTRANT */
+
+	SYSTRAP(ptrace)
+	bcs	PIC_SYM(CERROR, PLT)
+	mov	pc, lr
+
+#ifndef _REENTRANT
+#ifdef PIC
+	.align	0
+.Lgot:
+	.word	_C_LABEL(_GLOBAL_OFFSET_TABLE_) + (. - (.L1+4))
+#endif /* PIC */
+
+.Lerrno:
+	.word	PIC_SYM(_C_LABEL(errno), GOT)
+#endif /* !_REENTRANT */
diff --git a/lib/libc/arm/sys/sbrk.S b/lib/libc/arm/sys/sbrk.S
new file mode 100644
index 000000000000..cca380da64e0
--- /dev/null
+++ b/lib/libc/arm/sys/sbrk.S
@@ -0,0 +1,88 @@
+/*	$NetBSD: sbrk.S,v 1.7 2003/08/07 16:42:05 agc Exp $	*/
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)sbrk.s	5.1 (Berkeley) 4/23/90
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+	.globl	_C_LABEL(end)
+
+#ifdef WEAK_ALIAS
+WEAK_ALIAS(sbrk, _sbrk)
+#endif
+
+	.data
+	.align	0
+	.globl	CURBRK
+	.type	CURBRK,#object
+CURBRK:
+	.word	_C_LABEL(end)
+
+/*
+ * Change the data segment size
+ */
+ENTRY(_sbrk)
+#ifdef PIC
+	/* Setup the GOT */
+	ldr	r3, .Lgot
+	add	r3, pc, r3
+.L1:
+	ldr	r2, .Lcurbrk
+	ldr	r2, [r3, r2]
+#else
+	ldr	r2, .Lcurbrk
+#endif
+	/* Get the current brk address */
+	ldr	r1, [r2]
+
+	/* Calculate new value */
+	mov	r3, r0
+	add	r0, r0, r1
+	SYSTRAP(break)
+	bcs	PIC_SYM(CERROR, PLT)
+
+	/* Store new curbrk value */
+	ldr	r0, [r2]
+	add	r1, r0, r3
+	str	r1, [r2]
+
+	/* Return old curbrk value */
+	mov	r15, r14
+
+	.align	0
+#ifdef PIC
+.Lgot:
+	.word	_GLOBAL_OFFSET_TABLE_ - (.L1+4)
+#endif
+.Lcurbrk:
+	.word	PIC_SYM(CURBRK, GOT)
diff --git a/lib/libc/arm/sys/shmat.S b/lib/libc/arm/sys/shmat.S
new file mode 100644
index 000000000000..3fc3d02c6e47
--- /dev/null
+++ b/lib/libc/arm/sys/shmat.S
@@ -0,0 +1,7 @@
+/*	$NetBSD: shmat.S,v 1.1 2000/12/29 20:14:04 bjh21 Exp $	*/
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+RSYSCALL(shmat)
diff --git a/lib/libc/arm/sys/sigreturn.S b/lib/libc/arm/sys/sigreturn.S
new file mode 100644
index 000000000000..1e0f245a5efc
--- /dev/null
+++ b/lib/libc/arm/sys/sigreturn.S
@@ -0,0 +1,42 @@
+/*	$NetBSD: __sigreturn14.S,v 1.3 2003/08/07 16:42:03 agc Exp $	*/
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)sigreturn.s	5.2 (Berkeley) 12/17/90"
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+/*
+ * We must preserve the state of the registers as the user has set them up.
+ */
+
+RSYSCALL(sigreturn)
diff --git a/lib/libc/arm/sys/syscall.S b/lib/libc/arm/sys/syscall.S
new file mode 100644
index 000000000000..73e6b8318182
--- /dev/null
+++ b/lib/libc/arm/sys/syscall.S
@@ -0,0 +1,38 @@
+/*	$NetBSD: syscall.S,v 1.4 2003/08/07 16:42:05 agc Exp $	*/
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)syscall.s	5.1 (Berkeley) 4/23/90
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+#include "SYS.h"
+
+RSYSCALL(syscall)