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authorJake Burkholder <jake@FreeBSD.org>2003-04-29 21:30:59 +0000
committerJake Burkholder <jake@FreeBSD.org>2003-04-29 21:30:59 +0000
commit2d5d213f82071004fb339aa4d1a9b5848361d8ec (patch)
treeb4937ee7896137b6f391d6f1a3b621ea8ae78e6e
parent5723e501abb675701352eb3e9fd58bb3cc2c649d (diff)
downloadsrc-2d5d213f82071004fb339aa4d1a9b5848361d8ec.tar.gz
src-2d5d213f82071004fb339aa4d1a9b5848361d8ec.zip
Allow fast instruction and data access mmu miss traps to be handled by
user trap handlers.
Notes
Notes: svn path=/head/; revision=114257
-rw-r--r--sys/sparc64/include/trap.h12
-rw-r--r--sys/sparc64/include/utrap.h4
-rw-r--r--sys/sparc64/sparc64/exception.S4
3 files changed, 11 insertions, 9 deletions
diff --git a/sys/sparc64/include/trap.h b/sys/sparc64/include/trap.h
index 2c485b52e39b..28929f4d3519 100644
--- a/sys/sparc64/include/trap.h
+++ b/sys/sparc64/include/trap.h
@@ -65,13 +65,13 @@
#define T_TRAP_INSTRUCTION_29 31
#define T_TRAP_INSTRUCTION_30 32
#define T_TRAP_INSTRUCTION_31 33
+#define T_INSTRUCTION_MISS 34
+#define T_DATA_MISS 35
-#define T_INTERRUPT 34
-#define T_PA_WATCHPOINT 35
-#define T_VA_WATCHPOINT 36
-#define T_CORRECTED_ECC_ERROR 37
-#define T_INSTRUCTION_MISS 38
-#define T_DATA_MISS 39
+#define T_INTERRUPT 36
+#define T_PA_WATCHPOINT 37
+#define T_VA_WATCHPOINT 38
+#define T_CORRECTED_ECC_ERROR 39
#define T_SPILL 40
#define T_FILL 41
#define T_FILL_RET 42
diff --git a/sys/sparc64/include/utrap.h b/sys/sparc64/include/utrap.h
index 8ce792577203..38a40b0166e5 100644
--- a/sys/sparc64/include/utrap.h
+++ b/sys/sparc64/include/utrap.h
@@ -62,7 +62,9 @@
#define UT_TRAP_INSTRUCTION_29 31
#define UT_TRAP_INSTRUCTION_30 32
#define UT_TRAP_INSTRUCTION_31 33
-#define UT_MAX 34
+#define UT_INSTRUCTION_MISS 34
+#define UT_DATA_MISS 35
+#define UT_MAX 36
#define ST_SUNOS_SYSCALL 0
#define ST_BREAKPOINT 1
diff --git a/sys/sparc64/sparc64/exception.S b/sys/sparc64/sparc64/exception.S
index 6ac303fdbf54..e33e90203ea2 100644
--- a/sys/sparc64/sparc64/exception.S
+++ b/sys/sparc64/sparc64/exception.S
@@ -726,7 +726,7 @@ ENTRY(tl0_immu_miss_trap)
clr %o1
set trap, %o2
mov %g2, %o3
- b %xcc, tl0_trap
+ ba %xcc, tl0_utrap
mov T_INSTRUCTION_MISS, %o0
END(tl0_immu_miss_trap)
@@ -891,7 +891,7 @@ ENTRY(tl0_dmmu_miss_trap)
clr %o1
set trap, %o2
mov %g2, %o3
- b %xcc, tl0_trap
+ ba %xcc, tl0_utrap
mov T_DATA_MISS, %o0
/*