diff options
| author | Andrew Turner <andrew@FreeBSD.org> | 2023-09-08 13:27:15 +0000 |
|---|---|---|
| committer | Andrew Turner <andrew@FreeBSD.org> | 2024-02-19 12:38:03 +0000 |
| commit | 371bcfc8a2450fbf0dd741dd0f25a5dccbc4b984 (patch) | |
| tree | b1a82db65c61d6bd3b29682b3ddd7ea88fc20c3f | |
| parent | 9fbac657f11b868186ea4ad52af203d9c94ebb51 (diff) | |
arm64: Fix the TCR_TBI0 macro to use UL
This needs to be 1UL to ensure the type is large enough for the shift.
Sponsored by: Arm Ltd
(cherry picked from commit aea540538991dd9e8cf21c6ca06e09f706bf2d18)
| -rw-r--r-- | sys/arm64/include/armreg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 314330021495..be070a451691 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -2086,7 +2086,7 @@ #define TCR_TBI1_SHIFT 38 #define TCR_TBI1 (1UL << TCR_TBI1_SHIFT) #define TCR_TBI0_SHIFT 37 -#define TCR_TBI0 (1U << TCR_TBI0_SHIFT) +#define TCR_TBI0 (1UL << TCR_TBI0_SHIFT) #define TCR_ASID_SHIFT 36 #define TCR_ASID_WIDTH 1 #define TCR_ASID_16 (1UL << TCR_ASID_SHIFT) |