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authorJohn Baldwin <jhb@FreeBSD.org>2023-09-01 21:18:30 +0000
committerJohn Baldwin <jhb@FreeBSD.org>2023-09-01 21:18:38 +0000
commit7063f94283af60818429a0c2d70e80ae4ad5c146 (patch)
tree3b95c6e051ed5503b4544488a00184240be94b69
parentb7000cadfbf312b6a8acff6b7a3bbbbe55509565 (diff)
downloadsrc-7063f94283af60818429a0c2d70e80ae4ad5c146.tar.gz
src-7063f94283af60818429a0c2d70e80ae4ad5c146.zip
pci_iov: Refuse to create VFs which require ARI if ARI is not available
If a parent downstream port doesn't support ARI, the code would try to create VFs anyway but then all PCI config space access to those VFs would fail. Tested by: np Sponsored by: Chelsio Communications
-rw-r--r--sys/dev/pci/pci_iov.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/sys/dev/pci/pci_iov.c b/sys/dev/pci/pci_iov.c
index db7210cb729a..ff3ac0e64271 100644
--- a/sys/dev/pci/pci_iov.c
+++ b/sys/dev/pci/pci_iov.c
@@ -435,7 +435,7 @@ out:
* affects all PFs on the device.
*/
static int
-pci_iov_set_ari(device_t bus)
+pci_iov_set_ari(device_t bus, bool *ari_enabled)
{
device_t lowest;
device_t *devlist;
@@ -443,8 +443,10 @@ pci_iov_set_ari(device_t bus)
uint16_t iov_ctl;
/* If ARI is disabled on the downstream port there is nothing to do. */
- if (!PCIB_ARI_ENABLED(device_get_parent(bus)))
+ if (!PCIB_ARI_ENABLED(device_get_parent(bus))) {
+ *ari_enabled = false;
return (0);
+ }
error = device_get_children(bus, &devlist, &devcount);
@@ -480,6 +482,7 @@ pci_iov_set_ari(device_t bus)
device_printf(lowest, "failed to enable ARI\n");
return (ENXIO);
}
+ *ari_enabled = true;
return (0);
}
@@ -683,6 +686,7 @@ pci_iov_config(struct cdev *cdev, struct pci_iov_arg *arg)
uint16_t iov_ctl;
uint16_t num_vfs, total_vfs;
int iov_inited;
+ bool ari_enabled;
mtx_lock(&Giant);
dinfo = cdev->si_drv1;
@@ -713,7 +717,7 @@ pci_iov_config(struct cdev *cdev, struct pci_iov_arg *arg)
if (error != 0)
goto out;
- error = pci_iov_set_ari(bus);
+ error = pci_iov_set_ari(bus, &ari_enabled);
if (error != 0)
goto out;
@@ -736,6 +740,11 @@ pci_iov_config(struct cdev *cdev, struct pci_iov_arg *arg)
goto out;
}
+ if (!ari_enabled && PCI_RID2SLOT(last_rid) != 0) {
+ error = ENOSPC;
+ goto out;
+ }
+
iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2);
iov_ctl &= ~(PCIM_SRIOV_VF_EN | PCIM_SRIOV_VF_MSE);
IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov_ctl, 2);