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authorAndrew Turner <andrew@FreeBSD.org>2024-07-23 09:18:36 +0000
committerAndrew Turner <andrew@FreeBSD.org>2024-09-02 08:48:54 +0000
commit75861a57b6fd721e47c8a7cb43c4882c200cca1d (patch)
tree266ce38ecc779bc9db6e6576a8260612b3274204
parent0fbb9df20dd88ba448ea622cf40b3855959653fe (diff)
downloadsrc-75861a57b6fd721e47c8a7cb43c4882c200cca1d.tar.gz
src-75861a57b6fd721e47c8a7cb43c4882c200cca1d.zip
dev/uart: Add APMC0D08 as found in the Intel E2100
This uart has the requirement for 32-bit sized and aligned memory accesses. It is also described in the Serial Port Console Redirection Table (SPCR) with a different interface type value. Reviewed by: imp Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D45834 (cherry picked from commit 9840598aa31f2a89272f5bef6545e316f254f0c6)
-rw-r--r--sys/dev/uart/uart_dev_ns8250.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/dev/uart/uart_dev_ns8250.c b/sys/dev/uart/uart_dev_ns8250.c
index a49215218830..ced3b44b5749 100644
--- a/sys/dev/uart/uart_dev_ns8250.c
+++ b/sys/dev/uart/uart_dev_ns8250.c
@@ -447,6 +447,7 @@ struct uart_class uart_ns8250_class = {
static struct acpi_uart_compat_data acpi_compat_data[] = {
{"AMD0020", &uart_ns8250_class, 0, 2, 0, 48000000, UART_F_BUSY_DETECT, "AMD / Synopsys Designware UART"},
{"AMDI0020", &uart_ns8250_class, 0, 2, 0, 48000000, UART_F_BUSY_DETECT, "AMD / Synopsys Designware UART"},
+ {"APMC0D08", &uart_ns8250_class, ACPI_DBG2_16550_COMPATIBLE, 2, 4, 0, 0, "APM compatible UART"},
{"MRVL0001", &uart_ns8250_class, ACPI_DBG2_16550_SUBSET, 2, 0, 200000000, UART_F_BUSY_DETECT, "Marvell / Synopsys Designware UART"},
{"SCX0006", &uart_ns8250_class, 0, 2, 0, 62500000, UART_F_BUSY_DETECT, "SynQuacer / Synopsys Designware UART"},
{"HISI0031", &uart_ns8250_class, 0, 2, 0, 200000000, UART_F_BUSY_DETECT, "HiSilicon / Synopsys Designware UART"},