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authorKyle Evans <kevans@FreeBSD.org>2024-04-21 03:04:04 +0000
committerKyle Evans <kevans@FreeBSD.org>2024-04-25 03:58:58 +0000
commit7c3092e343c368ce4988f7aca3a49fe13e5ff6dc (patch)
tree6654868f7a9cd4865051af19d6a02e79191272e0
parent9857f824ec77cdc27c82e0871356eb2e9662fc86 (diff)
downloadsrc-7c3092e343c368ce4988f7aca3a49fe13e5ff6dc.tar.gz
src-7c3092e343c368ce4988f7aca3a49fe13e5ff6dc.zip
ahc(4)/ahd(4): fix target mode on ARM
One of the comments in ahc_execute_scb() notes that the CAM direction is actually w.r.t. the initiator. As a consequence, all of our sync ops end up being wrong because the direction is flipped from that of the transfer. Fix it to do proper invalidation and avoid spewing random garbage out on the SCSI bus. Reported and tested by: HP van Braam <hp@tmm.cx> Reviewed by: imp, mav (cherry picked from commit 9dcf39575efb2ff32f955d9e04e04af28d45d798)
-rw-r--r--sys/dev/aic7xxx/aic79xx_osm.c35
-rw-r--r--sys/dev/aic7xxx/aic7xxx_osm.c35
2 files changed, 42 insertions, 28 deletions
diff --git a/sys/dev/aic7xxx/aic79xx_osm.c b/sys/dev/aic7xxx/aic79xx_osm.c
index df73b3fadfa4..4a1e3336fe5f 100644
--- a/sys/dev/aic7xxx/aic79xx_osm.c
+++ b/sys/dev/aic7xxx/aic79xx_osm.c
@@ -303,6 +303,25 @@ ahd_platform_intr(void *arg)
ahd_unlock(ahd);
}
+static void
+ahd_sync_ccb(struct ahd_softc *ahd, struct scb *scb, union ccb *ccb, bool post)
+{
+ bus_dmasync_op_t op;
+ uint32_t rdmask;
+
+ if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO)
+ rdmask = CAM_DIR_OUT;
+ else
+ rdmask = CAM_DIR_IN;
+
+ if ((ccb->ccb_h.flags & CAM_DIR_MASK) == rdmask)
+ op = post ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_PREREAD;
+ else
+ op = post ? BUS_DMASYNC_POSTWRITE : BUS_DMASYNC_PREWRITE;
+
+ bus_dmamap_sync(ahd->buffer_dmat, scb->dmamap, op);
+}
+
/*
* We have an scb which has been processed by the
* adaptor, now we look to see how the operation
@@ -324,13 +343,7 @@ ahd_done(struct ahd_softc *ahd, struct scb *scb)
callout_stop(&scb->io_timer);
if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
- bus_dmasync_op_t op;
-
- if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
- op = BUS_DMASYNC_POSTREAD;
- else
- op = BUS_DMASYNC_POSTWRITE;
- bus_dmamap_sync(ahd->buffer_dmat, scb->dmamap, op);
+ ahd_sync_ccb(ahd, scb, ccb, true);
bus_dmamap_unload(ahd->buffer_dmat, scb->dmamap);
}
@@ -961,7 +974,6 @@ ahd_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nsegments,
scb->sg_count = 0;
if (nsegments != 0) {
void *sg;
- bus_dmasync_op_t op;
u_int i;
/* Copy the segments into our SG list */
@@ -971,13 +983,8 @@ ahd_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nsegments,
/*last*/i == 1);
dm_segs++;
}
-
- if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
- op = BUS_DMASYNC_PREREAD;
- else
- op = BUS_DMASYNC_PREWRITE;
- bus_dmamap_sync(ahd->buffer_dmat, scb->dmamap, op);
+ ahd_sync_ccb(ahd, scb, ccb, false);
if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
struct target_data *tdata;
diff --git a/sys/dev/aic7xxx/aic7xxx_osm.c b/sys/dev/aic7xxx/aic7xxx_osm.c
index 46c87defa3a5..04037773c528 100644
--- a/sys/dev/aic7xxx/aic7xxx_osm.c
+++ b/sys/dev/aic7xxx/aic7xxx_osm.c
@@ -302,6 +302,25 @@ ahc_platform_intr(void *arg)
ahc_unlock(ahc);
}
+static void
+ahc_sync_ccb(struct ahc_softc *ahc, struct scb *scb, union ccb *ccb, bool post)
+{
+ bus_dmasync_op_t op;
+ uint32_t rdmask;
+
+ if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO)
+ rdmask = CAM_DIR_OUT;
+ else
+ rdmask = CAM_DIR_IN;
+
+ if ((ccb->ccb_h.flags & CAM_DIR_MASK) == rdmask)
+ op = post ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_PREREAD;
+ else
+ op = post ? BUS_DMASYNC_POSTWRITE : BUS_DMASYNC_PREWRITE;
+
+ bus_dmamap_sync(ahc->buffer_dmat, scb->dmamap, op);
+}
+
/*
* We have an scb which has been processed by the
* adaptor, now we look to see how the operation
@@ -333,13 +352,7 @@ ahc_done(struct ahc_softc *ahc, struct scb *scb)
callout_stop(&scb->io_timer);
if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
- bus_dmasync_op_t op;
-
- if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
- op = BUS_DMASYNC_POSTREAD;
- else
- op = BUS_DMASYNC_POSTWRITE;
- bus_dmamap_sync(ahc->buffer_dmat, scb->dmamap, op);
+ ahc_sync_ccb(ahc, scb, ccb, true);
bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
}
@@ -943,7 +956,6 @@ ahc_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nsegments,
if (nsegments != 0) {
struct ahc_dma_seg *sg;
bus_dma_segment_t *end_seg;
- bus_dmasync_op_t op;
end_seg = dm_segs + nsegments;
@@ -968,12 +980,7 @@ ahc_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nsegments,
*/
scb->hscb->sgptr = aic_htole32(scb->sg_list_phys|SG_FULL_RESID);
- if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
- op = BUS_DMASYNC_PREREAD;
- else
- op = BUS_DMASYNC_PREWRITE;
-
- bus_dmamap_sync(ahc->buffer_dmat, scb->dmamap, op);
+ ahc_sync_ccb(ahc, scb, ccb, false);
if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
struct target_data *tdata;